TWL6041 SWCS058B – AUGUST 2010 – REVISED DECEMBER 2011 www.ti.com 8-CHANNEL HIGH_QUALITY LOW-POWER AUDIO CODEC FOR PORTABLE APPLICATIONS FEATURES 1 • • • • • • • • • • • • Four Audio DAC Channels Stereo Capless Headphone Drivers – Up to 104-dB DR – Power Tune for performance/power consumption tradeoff Stereo 8Ω, 1.5 W per Channel Speaker Drivers also with 4Ω support capablity Differential Earpiece Driver Stereo Line-Out Two Audio ADC Channels – 96-dBA SNR Four Audio Inputs – Three Differential Microphone Inputs – Stereo Line-In/FM Input Two Vibra/Haptics Feedback Channels – Differential H-bridge Drivers Two Low-Noise Analog Microphone Bias Outputs Two Digital Microphone Bias Outputs Analog Low-Power Loop from Line-in to Headphone/Speaker Outputs Dual PLL for Flexible Clock Support – 32-kHz Sleep Clock Input for System • • • • • • Low-Power Playback Mode – 12/19.2/26/38.4 MHz System Clock Input Accessory Plug/Unplug Detection, Accessory Button Press Detection Integrated Power Supplies – Negative Charge Pump for Capless Headphone Driver – Two LDOs for High PSRR I2C Control Thermal Protection – Host Interrupt Power Supplies: – Analog: 2.1 V – Digital I/O: 1.8 V – Battery 2.3 V–5.5 V Package 3.8-mm × 3.8-mm 81-pin WCSP APPLICATIONS • • • Mobile and Smart Phones MP3 Players Handheld Devices 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. Copyright © 2010–2011, Texas Instruments Incorporated PRODUCT PREVIEW Check for Samples: TWL6041 TWL6041 SWCS058B – AUGUST 2010 – REVISED DECEMBER 2011 www.ti.com DESCRIPTION The TWL6041 is an audio codec with a high level of integration providing analog audio codec functions for portable applications, as shown in Figure 1. It contains multiple audio analog inputs and outputs, as well as microphone biases and accessory detection. It is connected to the OMAP4 host processor through a proprietary PDM interface for audio data communication enabling partitioning with optimized power consumption and performance. Multichannel audio data is multiplexed to a single wire for downlink (PDML) and uplink (PDMUL). The OMAP4 device provides a TWL6041 with five PDM audio-input channels (DL0–DL4). Channels DL0–DL3 are connected to four parallel DAC channels multiplexed to stereo headphone (HSL, HSR), stereo speaker (HFL, HFR), and earpiece (EAR) or stereo line outputs (AUXL, AUXR). The stereo headphone path has a low-power (LP) mode operating from a 32-kHz sleep clock to enable over 100 hours of MP3 playback time. Very-high dynamic range of 104 dBA is achieved when using the system clock input and DAC path high-performance (HP) mode. Class-AB headphone drivers provide a 1-Vrms output and are ground centered for capless connection to headphone, thus enabling system size and cost reduction. The earpiece driver is a differential class-AB driver with 2-Vrms capability to a typical 32-Ω load or 1.4-Vrms to a typical 16-Ω load. Stereo speaker path has filterless class-D outputs with 1.5-W capability per channel. Additionally, the 4-Ω load is supported. For output power maximization supply connection to an external boost is supported. Speaker drivers support also hearing aid coil loads. PRODUCT PREVIEW For vibrator and haptic feedback support TWL6041 has two PWM channels with independent input signals from DL4 or I2C. Vibra drivers are differential H-bridge outputs, enabling fast acceleration and deceleration of vibra motor. An external driver for a hearing aid coil or a piezo speaker requiring high voltage can be connected to line outputs. The TWL6041 supports three differential microphone inputs (MMIC, HMIC, SMIC) and a stereo line-input (AFML, AFMR) multiplexed to two parallel analog-to-digital converters (ADCs). The PDM output from the ADCs is transmitted to the OMAP4 through UL0 and UL1. AFML, AFMR inputs can also be looped to analog outputs (LB0, LB1). Two LDOs provide a voltage of 2.1 V to bias analog microphones (MBIAS and HBIAS). The maximum output current is 2 mA for each analog bias, allowing up to 2 microphones on one bias. Two LDOs provide a voltage of 1.8 V/1.85 V to bias digital microphones (DBIAS1 and DBIAS2). One bias generator can bias up several digital microphones at the same time, with a total maximum output current of 10 mA. The TWL6041 has an integrated negative charge pump and two LDOs (HS LDO and LS LDO) for high PSRR. The only external supply needed is 2.1 V, which is available from the 2.1-V DC-DC of TWL6030/6032 PMIC of OMAP. By powering audio from low-noise 2.1-V DC-DC of low power consumption, high dynamic range and high output swing at headset output are achieved. All other supply inputs can be directly connected to battery or system 1.8-V I/O. Two integrated phase-locked loops (PLLs) enable operatation from a 12/19.2/26/38.4-MHz system clock (MCLK) or, in LP playback mode, from a 32-kHz sleep clock (CLK32K). The frequency plan is based on a 48-kS/s audio data rate for all channels, and host processor uses sample-rate converters to interface with different sample rates (that is, 44.1 kHz). In the specific case of low-power audio playback, the 44.1-kS/s and 48-kS/s rates are supported by the TWL6041. Transitions between sample rates or input clocks are seamless. Accessory plug and unplug detections are submitting send/end signal to the terminal periodic accessory button press detection properties can be programmed according to supported (PLUGDET). Some headsets have a manual switch for through the microphone input pin. This feature is supported by a to minimize current consumption in sleep mode. Detection cycle system requirements. Figure 1 shows a simplified block diagram of the device. 2 Copyright © 2010–2011, Texas Instruments Incorporated TWL6041 SWCS058B – AUGUST 2010 – REVISED DECEMBER 2011 www.ti.com AAFL VDDMBIAS HBIAS HMBIAS MBIAS DBIAS1 MMICN ADCL 1 GNDMIC MMICP MicAmpL HMICP HMICN 0:30 dB MMBIAS UpLink VSSUL AAFR DMBIAS1 1 MicAmpR ADCR SMICP SMICN DBIAS2 DMBIAS2 0:30 dB LineInAmpR UL0 UL1 DL0 PDMUP PDMCLK PDMCLKLB PDMFRAME SCL LB0 AFML DL3 –18:24 dB DL4 VDDVIO SDA AFMR LineInAmpL DL1 DL2 PDM Interface GNDDIGIO GPO LB1 EarDrv EARP Interface EARN –24:6 dB HSLDrv 2 I C Registers PRODUCT PREVIEW PDMDN VDDEAR HSL PBKG 1 HSDACL –30:0 dB VDDV2V1 HSRDrv VDDULLDO HS LDO VSSEARLDO LS LDO VDDHS VSSHS GNDHS HSR 1 HSDACR –30:0 dB GNDLDO AUXLN CFLYP GNDNCP CFLYN VSSDL AUXLP VDDREGNCP Negative Charge Pump AUXRP DownLink AUXRN PGAL NCPOUT HFLDrv VDDHFL HFLP VDDRF REF REFP REFN Power Reference Temp Sense 1 HFLN HFDACL GNDHFL –52:6 dB PGAR GNDREF HFRDrv VDDHFR HFRP PLUGDET ACCONN Accessory Connector Detection HFRN HFDACR PDM to 1 PCM VDDDLPLL MCLK 1 8 8 HP PLL PCM to PWM 8 CLK32K VSSPLL GNDHFR –52:6 dB VIBLDrv VIBLP 1 VIBLN 1 GNDVIB LP PLL Clock System 8 8 Osc 8 PCM to PWM VIBRDrv VDDVIB VIBRP 1 VIBRN 1 SWCS056-001 Figure 1. SIMPLIFIED BLOCK DIAGRAM Copyright © 2010–2011, Texas Instruments Incorporated 3 TWL6041 SWCS058B – AUGUST 2010 – REVISED DECEMBER 2011 www.ti.com space For the complete TWL60xx data sheet, contact your TI sales representative. The document is internally available for download on ESP under the corresponding TWL60xx product folders and can be shared with customers. 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According to our best knowledge of the state and end-use of this product or technology, and in compliance with the export control regulations of dual-use goods in force in the origin and exporting countries, this technology is classified as follows: US ECCN: EAR99 EU ECCN: EAR99 And may require export or re-export license for shipping it in compliance with the applicable regulations of certain countries. PACKAGE OPTION ADDENDUM www.ti.com 25-Jan-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) TWL6041BYFFR ACTIVE DSBGA YFF 81 3000 Green (RoHS & no Sb/Br) Call TI Level-1-260C-UNLIM TWL6041BYFFT ACTIVE DSBGA YFF 81 250 Green (RoHS & no Sb/Br) Call TI Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 3-Feb-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) TWL6041BYFFR DSBGA YFF 81 3000 330.0 12.4 TWL6041BYFFT DSBGA YFF 81 250 180.0 12.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.86 3.86 0.69 8.0 12.0 Q1 3.86 3.86 0.69 8.0 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 3-Feb-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TWL6041BYFFR DSBGA YFF 81 3000 346.0 346.0 29.0 TWL6041BYFFT DSBGA YFF 81 250 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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