TI SN74CBT1G384

Little Logic Guide
Gates
Configurables
Signal Switches
Translators
www.ti.com/littlelogic
2012
Little Logic Guide
➔ Table of Contents
Overview
3
Little Logic Products by Performance
4
Logic Migration to 1.8-V Future . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Performance Comparisons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Gate Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Signal Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configurables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
AUP1T Translators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Packaging
7
Advanced Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Little Logic Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Little Logic Package Cross Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Selection Tables
9
Single-Gate Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Dual-Gate Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Triple-Gate Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Signal-Switch Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Configurable Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Translation Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Cross-Reference
16
Competitor Cross-Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Part Number Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Competitor Part Prefixes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Resources and Support
23
TI Worldwide Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Little Logic Guide
2
Texas Instruments 2012
Little Logic Guide
➔ Overview
saving packages are easy to
implement, stay closer to the circuitry
and help simplify board designs.
Without time-consuming invention
of new silicon, designers can reach
better performance with ASIC designs
by using Little Logic functions.
BE FASTER
WIN not only today’s race,
but tomorrow’s with TI Little
Logic
Better engine, customer centric
With TI’s broad technical experience
and application support in logic,
analog and mixed signal designs,
we provide our customers with gate
functions, buffers/registers, level
translators and switches in state of
the art packaging. To better meet your
growing needs, TI works close with
you to get your engine started.
Faster time-to-market, easy-to-use
Reaching faster time-to-market
requires easier design routing and
minimized development risk.
Little Logic devices in TI’s space
More performance, one-stop selection
TI’s large portfolio includes single-,
dual- and triple-gates of the most
popular functions in space saving
packages to allow you the space you
need. By replacing multiple devices
through single configurable functions,
Little Logic helps to reduce inventory.
No pit-stop, ever
TI Logic’s stable no end-of-life policy
secures that all products in our
portfolio will always be available. This
means more than 10,000 devices are
orderable to support the widest range
of applications and end-equipment at
any time you need them. Little Logic’s
stable delivery culture is nothing new;
it has lasted for more than 40 years.
We help you to keep going and solve
delivery issues.
Before
WIN with best-in-class support
For more information on TI’s Little
Logic, call your local TI Field Sales
office, your authorized TI distributor,
or visit us at www.ti.com/littlelogic.
TI Logic Forces:
• Worldwide #1 vendor in the logic market
• Broadest portfolio of function and package combinations
• No end-of-life policy, the product you need is always available
• Biggest capacity in the market,
no delivery pit-stop
• Best-in-class support for easier
and faster design
After
Simplified routing
Buffer
Single
gate
Little Logic Guide Single
gate
µP
3
µP
Single
gate
Texas Instruments 2012
Little Logic Products by Performance
➔ Logic Migration to 1.8-V Future
Keep the pace, even longer!
5
AHC–7.0 ns
AHCT–7.1 ns
LVC–3.4 ns
+
TI’s numerous logic technologies with
low power help designers extend battery
life easily. With a varied operating voltage
of 5.5V down to 0.8V, this graph shows
how our devices work to keep your
system running faster and longer.
Supply voltage (VCC)
5V
4
AHC–10.5 ns
AUP–4.3 ns
LVC–3.6 ns
+
3
LVC–4.4 ns
AUP–5.5 ns
AUC–2.0 ns
3.3 V
+
2
2.5 V
LVC–7.2 ns
AUP–8.2 ns
AUC–2.4 ns
+
+
1.8 V
1
AUC–2.3 ns
AUP–10.3 ns
AUC–3.3 ns
AUP–15.6 ns
AUC–4.7 ns
AUP–18.0 ns
+
1.5 V
+
1.2 V
0.8 V
0
Technology advancement
➔ Performance Comparisons
Performance Comparisons
Family
Operating
voltage range
(V)
Optimized
voltage
(V)
Propagation
delay - tpd
(typ) (ns)
Output
drive
(mA)
Input
tolerance
(V)
IOFF
protection
AUP
0.8 to 3.6
3.3
3.5
4
3.6
Yes
AUC
0.8 to 2.7
1.8
2.0
8
3.6
Yes
Yes
LVC
1.65 to 5.5
3.3
3.0
24
5.5
AHC
2.0 to 5.5
5.0
5.0
8
5.5
No
AHCT
4.5 to 5.5
5.0
5.0
8
5.5
No
CBT
4.5 to 5.5
5.0
0.25†
–‡
5.5
Yes
CBTD
4.5 to 5.5
5.0
0.25†
–‡
5.5
Yes
CBTLV
2.3 to 3.6
3.3
0.25†
–‡
3.6
Yes
CB3T
2.5 to 3.6
3.3
0.25†
–‡
5.5
Yes
†The progagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
The value listed is a maximum.
‡The FET switch has no output drive. The drive current at the output terminal is determined by the drive current of the device connected at the input terminal of the FET switch.
➔ Gate Functions
Little logic gates have all the features
of their bigger cousins but in single,
double, and triple gate functions.
They cover the full range of voltages
from 0.8V to 5.5V. They come in tiny
packages making them excellent for
handheld and any other equipment
where space is a concern.
Standard gates include:
•
•
•
•
•
•
•
•
•
2- and 3-input gates
Schmitt Trigger Input gates
3-state output buffer
Open drain output
Power off Hi-Z
Buffer decoder and multiplexer
Latch and flip-flop
Dual power rail translator
Gate translations
Little Logic Guide
Advantages:
LVC (high drive)
• Ioff supports hot insertion
• Ioff allows voltages on the inputs or
outputs when Vcc is at 0V
• Over-voltage tolerant on input
allows down translation
• Open drain output enables up or
down translation
• AUP1Txxx devices support up
translation
• Shcmitt trigger input allows any
slope on the rise and fall times
• Operating range 1.65V to 5.5V
• Drive 24mA at 3.3V, 32mA at 5.0V
• Speed 250MHz at 5V typical
AHC (low power)
• Operating range 0.8V to 2.7V
• Drive 5mA at 1.5V, 9mA at 2.5V
• Speed 350MHz at 2.5V typical
• Operating range 2.0V to 5.5V
• Drive 4mA at 3.3V, 8mA at 5V
• Speed 150MHz at 5V typical
4
AUP (lowest power – less than 0.9µA
at 3.3V)
• Operating range 0.8V to 3.6V
• Drive 1.9mA at 1.5V, 4mA at 3.3V
• Speed 190MHz at 3.3V typical
AUC (fastest speed)
Texas Instruments 2012
Little Logic Products by Performance
➔ Signal Switches
CBT (Bus switch)
• Operating range: 4-V to 5.5-V VCC
• 0.25-ns typical tpd
CB3T (low-voltage translation bus switch)
• Operating range: 2.3-V to 3.6-V VCC
• 0.25-ns typical tpd
AUC (advanced ultra-low-voltage CMOS)
• Operating range: 0.8-V to 2.7-V VCC
• 2.0-ns typical tpd
SN74CBT1G125
SN74CBTD1G125
SN74CB3T1G125
SN74AUC1G66
SN74AUC2G53
SN74CBT1G384
SN74CBTD1G384
CBTLV (low-voltage bus switch)
• Operating range: 2.3-V to 3.6-V VCC
• 0.25-ns typical tpd
SN74CBTLV1G125
SN74AUC2G66
LVC (low-voltage CMOS)
• Operating range: 1.65-V to 5.5-V VCC
• 3.0-ns typical tpd
SN74LVC1G66
SN74LVC1G3157
SN74LVC2G53
SN74LVC2G66
3.3 V
LVTTL
LVC1G66 TTL-to-LVTTL level shifter
The LVC1G66 can be used for simple
translation from 5-V TTL levels to
LVTTL.
The control pin is tolerant to 5.5V and,
with a maximum rON of 15Ω at VCC =
3.3V, the voltage drop across
the switch is only 0.36V with 24mA of
through current.
GND B
C
5-V TTL
Signal
A
VCC
LVC1G66
Visit www.ti.com/signalswitches for the application report, “Selecting the Right TI Signal Switch.”
Little Logic Guide
5
Texas Instruments 2012
Little Logic Products by Performance
➔ Configurables
AUP (advanced ultra-low-power CMOS)
• Operating range: 0.8-V to 3.6-V VCC
• 3.5-ns typical tpd
SN74AUP1G57
SN74AUP1G97
SN74AUP1G99
SN74AUP1G58
SN74AUP1G98
LVC (low-voltage CMOS)
• Operating range: 1.8-V to 5.5-V VCC
• 3.0-ns typical tpd
SN74LVC1G57
SN74LVC1G97
SN74LVC1G99
The next-generation configurable
devices in the Little Logic portfolio
are the 1G97/98/99 functions in
both the LVC and AUP technologies.
By providing nine single-gate logic
solutions in the 1G97/98 and 60
functions in the 1G99, the devices
allow reductions in device inventory
and simplify part management.
SN74LVC1G58
SN74LVC1G98
C04
C08
C14
Inverter
AND
Inverter
C17
C32
C157
Buffer
OR
C00
C02
C04
NAND
NOR
Inverter
C14
C17
C158
Inverter
Buffer
Selector
with
Inverter
1G97
C97
Selector
1G98
C98
➔ AUP1T Translators
AUP technology is the industry’s
lowest power logic technology
designed for extending battery life.
AUP1T inputs will accept 1.8-V
LVCMOS signals while operating
from either a single 3.3V or 2.5V. This
product maintains excellent signal
integrity through the wide VCC range
of 2.3V to 3.6V, providing clean output
levels to controllers or processors.
Little Logic Guide Schmitt-trigger inputs (ΔVT = 210
mV between positive and negative
input transitions) offer improved noise
immunity during switching transitions.
This feature provides noise rejection
for better signal integrity and allows for
slow input signal transition. Another
included feature is IOFF.
IOFF is a feature where when
6
VCC = 0V, signals from 0V to 3.6V can
be applied to the inputs. This feature
is important in portable and mobile
applications and also allows for live
insertion applications.
AUP1T is a perfect fit for tiny, lowpower, clean, single VCC, up-translation
applications.
Texas Instruments 2012
Packaging
➔ Advanced Packaging
Electronic development continues to
grow into new and innovative markets.
Since innovation often means shrinking
size, packaging finds itself in the
forefront of enabling new features.
The ability to further customize
packaging for medical, automotive
and industrial applications is playing
a bigger role meeting new desires
and enabling solutions that were not
possible in the past. Meeting today’s
dynamic market needs for advanced
package solutions like size, thermal,
electrical, and cost is more exciting
than ever.
performance at a smaller size to solve
design issues. TI has developed and
qualified fine pitch options in both
package nodes.
Our latest NanoStarTM­­ additions include
small, 0.3mm pitch offerings such
as 0.6mm x 0.9mm x 0.5mm, 6-pin
packages that are easy-to-use in
smaller and thinner end applications.
The μQFN portfolio now includes a
1.0mm x 1.0mm x 0.4mm (0.35mm
pitch) package, with a 0.8mm x 0.8mm
x 0.35mm (0.3mm pitch) offering
coming the end of 2012.
TI continues to invest in innovative
solutions to be a leader in package
development and offers two distinct
package type solutions to address
today’s, as well as tomorrow’s,
market needs. The broad
TI NanoStarTM and μQFN
package portfolio
continues to offer more
µQFN (0.35mm pitch DSF package)
• Smallest !ne pitch, µQFN package
in full production today
• Over 30% smaller than the original,
0.5mm pitch µQFN package
WCSP (Wafer Chip Scale Package) –
(0.30mm pitch YHA package)
• NanoStar™ (WCSP) is the only
package that allows 100% footprint
efficiency of a CSP design as the
package size is the same as the
Si size
• 0.3mm pitch miniaturization allows
even further PWB space savings
and increased “exibility of the
customer’s footprint needs
• Nearly 60% board space savings
over it’s 0.5mm pitch predecessor
(6 bump package comparison
Little Logic Package Trend
QFN
(DRY)
1 x 1.45 x 0.6 (H)
Lead Pitch 0.5
µQFN
(DSF)
1 x 1 x 0.35 (H)
Lead Pitch 0.3
1.6 x 1.6 x 0.6 (H)
Lead Pitch 0.5
WCSP
(YZP)
0.9 x 1.45 x 0.5 (H)
Lead Pitch 0.5
WCSP
(YZV)
0.9 x 0.9 x 0.5 (H)
Lead Pitch 0.5
WCSP
(YFP)
0.77 x 1.57 x 0.5 (H)
Lead Pitch 0.4
WCSP
(YFP)
0.77 x 1.17 x 0.5 (H)
Lead Pitch 0.4
WCSP
(YFP)
0.77 x .77 x 0.5 (H)
Lead Pitch 0.4
SOT-23
(DBV)
2.9 x 2.8 x 1.45 (H)
Lead Pitch 0.95
DRL
SC-70
(DCK)
2 x 2.1 x 1.1 (H)
Lead Pitch 0.65
µQFN
(DNB)
0.8 x 0.8 x 0.4 (H)
Lead Pitch 0.3
WCSP
(YHA)
0.59 x 0.89 x 0.5 (H)
Lead Pitch 0.3
Development
Little Logic Guide 7
Texas Instruments 2012
Packaging
➔ Little Logic Packaging
YFP
DCK
YZP
DBV
DCT
DCU
8-Ball 6-Ball 4-Ball 8-Ball 5-/6-Ball 5-/6-Pin 5-/6-Pin 8-Pin 8-Pin
YFP
YZP
DCK
DBV
DCT
DCU
8-Ball 6-Ball 4-Ball 8-Ball 5-/6-Ball 5-/6-Pin 5-/6-Pin 8-Pin 8-Pin
Height (inches) 0.020 0.020
(mm) (0,50) (0,50)
Area (inches) 0.002 0.001
(mm) (1,29) (0,89)
Pitch (inches) 0.016 0.016
(mm) (0,40) (0,40)
Length (inches) 0.062 0.046
(mm) (1,57) (1,17)
Width (inches) 0.030 0.030
(mm) (0,77) (0,77)
0.020
(0,50)
0.009
(0,58)
0.016
(0,40)
0.030
(0,77)
0.030
(0,77)
0.020
(0,50)
0.003
(1,85)
0.020
(0,50)
0.075
(1,90)
0.035
(0,90)
0.020
(0,50)
0.002
(1,26)
0.020
(0,50)
0.039
(1,40)
0.035
(0,90)
0.037
(0,95)
0.008
(4,95)
0.026
(0,65)
0.083
(2,10)
0.079
(2,00)
0.047
(1,20)
0.014
(9)
0.037
(0,95)
0.110
(2,80)
0.114
(2,90)
0.051
(1,30)
0.010
(6,72)
0.026
(0,65)
0.157
(4,00)
0.116
(2,95)
0.035
(0,90)
0.010
(6,72)
0.020
(0,50)
0.122
(3,10)
0.079
(2,00)
DRY
DSF
DQE
RSE
6-Pin 6-Pin
8-Pin
8-Pin 4-Ball 5-/6-Pin
DSF
DQE
RSE
6-Pin 6-Pin
8-Pin
8-Pin 4-Ball 5-/6-Pin
0.022
(0,55)
0.002
(1,29)
0.020
(0,50)
0.039
(1,00)
0.057
(1,45)
0.014
(0,37)
0.002
(1,29)
0.014
(0,35)
0.039
(1,00)
0.055
(1,40)
0.022
(0,55)
0.003
(1,94)
0.020
(0,50)
0.059
(1,50)
0.059
(1,50)
DRY
0.014
(0,37)
0.001
(0,645)
0.014
(0,35)
0.039
(1,00)
0.039
(1,00)
YZV
YZV
0.020
(0,50)
0.001
(0,65)
0.020
(0,50)
0.035
(0,90)
0.035
(0,90)
DRL
DRL
0.020
(0,50)
0.003
(1,94)
0.020
(0,50)
0.047
(1,20)
0.063
(1,60)
➔ Little Logic Package Cross-Reference
Cross-Reference
Package
TI
Fairchild
ON
Toshiba
NXP
Pericom
STMicro
NanoStar™ Package WCSP
YZP
L6
—
—
—
—
—
SOT-23 (5-pin)
DBV
M5
DT
F
GV
TX
ST
SC-70 (5-pin)
DCK
P5
DF
FU
GW
CX
CT
SOT-23 (6-pin)
DBV
DT
—
—
GV
—
—
SC-70 (6-pin)
DCK
P6
DF
—
DW
—
—
SSOP (8-pin)
DCT
—
—
FU
—
—
—
VSSOP (8-pin)
DCU
K8
US
FK
DC
—
—
SOT563 (6-pin)
DRL
—
XV5T2
ESV
—
—
—
NanoStar (4-ball)
YZV
—
—
—
—
—
—
Micro QFN (8-pin)
DQE
—
—
—
—
—
—
Micro QFN (8-pin)
RSE
L8
MU
—
GM
—
—
Micro QFN (6-pin)
DRY
L6
AM
—
GM
—
—
GF
—
—
DSF
Micro QFN (6-pin)
TI package
suffix decoder
YZP is NanoStar package
YZV is NanoStar package
Little Logic Guide FH
CM
DBV is 5- and 6-pin leadframe
DCK is 5- and 6-pin leadframe, slightly smaller than DBV
8
—
DCT is 8-pin leadframe
DCU is 8-pin leadframe, slightly smaller than DCT
DRL is 6-pin plastic
small-outline
Texas Instruments 2012
Selection Tables
➔ Single-Gate Functions
Single Gates
Function
LVC1G00
LVC1G02
LVC1G04
LVC1Gu04
LVC1Gx04
LVC1G06
LVC1G07
LVC1G08
LVC1G10
LVC1G11
LVC1G14
LVC1G17
LVC1G18
LVC1G19
LVC1G27
LVC1G29
LVC1G32
LVC1G34
LVC1G38
LVC1G74
LVC1G79
LVC1G80
LVC1G86
LVC1G123
LVC1G125
LVC1G126
LVC1G139
LVC1G175
LVC1G240
LVC1G332
LVC1G373
LVC1G374
LVC1G386
LVC1G0832
LVC1G3208
Description
Single 2-Input NAND Gate
Single 2-Input NOR Gate
Single Inverter
Single Unbuffered Inverter
Crystal Oscillator Driver
Single Inverter Buffer/Driver w/Open Drain Output
Single Buffer/Driver w/Open Drain Output
Single 2-Input AND Gate
Single 3-Input NAND Gate
Single 3-Input AND Gate
Single Schmitt Trigger Inverter
Single Schmitt Trigger Buffer
1 of 2 Non-Inverting MUX
1 of 2 Decoder/Demultiplexer
Single 3-Input NOR Gate
2 of 3 Decoder/Demultiplexer
Single 2-Input OR Gate
Single Buffer Gate
Single 2-Input NAND Gate w/Open Drain Output
Single Positive-Edge-Triggered D-Type Flip-Flop
Single D-Type Flip-Flop
Single D-Type Flip-Flop
Single 2-Input Exclusive-OR Gate
Single Retrig Monostable w/Schmitt Trigger Inputs
Single Bus Buffer Gate w/3-State Output
Single Bus Buffer Gate w/3-State Output
2-Line to 4-Line Decoder
Single D-Type Flip-Flop w/Asynch Clr
Single Buffer/Driver w/3-State Output
Single 3-Input OR Gate
Single D-Type Latch w/3-State Output
Single D-Type Flip-Flop w/3-State Output
Single 3-Input Exclusive-OR Gate
Single 3-Input Positive AND-OR Gate
Single 3-Input Positive OR-AND Gate
AHC1G00
AHC1G02
AHC1G04
AHC1GU04
AHC1G08
AHC1G14
AHC1G32
AHC1G86
AHC1G125
AHC1G126
AUC1G00
AUC1G02
AUC1G04
AUC1Gu04
AUC1G06
AUC1G07
AUC1G08
SOT-23
(DBV)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SC70
(DCK)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SM8
(DCT)
US8
(DCU)
X2SON
(DQE)
SOT
(DRL)
X
X
X
X
X
X
X
X
USON
(DRY)
X
X
X
X
X2SON
(DSF)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
P
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Single 2-Input NAND Gate
Single 2-Input NOR Gate
Single Inverter
Single Unbuffered Inverter
Single 2-Input AND Gate
Single Schmitt Trigger Inverter
Single 2-Input OR Gate
Single 2-Input Exclusive-OR Gate
Single Bus Buffer Gate w/3-State Output
Single Bus Buffer Gate w/3-State Output
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Single 2-Input NAND Gate
Single 2-Input NOR Gate
Single Inverter
Single Unbuffered Inverter
Single Inverter Buffer/Driver w/Open Drain Output
Single Buffer/Driver w/Open Drain Output
Single 2-Input AND Gate
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
P
X
X
DSBGA
(YFP)
X
X
X
X
UQFN
(RSE)
X
X
X
X
X
X
X
X
X
X
X
DSBGA
(YZP)
X
X
X
X
DSBGA
(YZV)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
P indicates that this device is Product Preview.
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Little Logic Guide
9
Texas Instruments 2012
Selection Tables
➔ Single-Gate Functions
Single Gates (continued)
Function
AUC1G14
AUC1G17
AUC1G19
AUC1G32
AUC1G74
AUC1G79
AUC1G80
AUC1G86
AUC1G125
AUC1G126
AUC1G240
Description
Single Schmitt Trigger Inverter
Single Schmitt Trigger Buffer
1 of 2 Decoder/Demultiplexer
Single 2-Input OR Gate
Single Positive-Edge-Triggered D-Type Flip-Flop
Single D-Type Flip-Flop
Single D-Type Flip-Flop
Single 2-Input Exclusive-OR Gate
Single Bus Buffer Gate w/3-State Output
Single Bus Buffer Gate w/3-State Output
Single Buffer/Driver w/3-State Output
AUP1G00
AUP1G02
AUP1G04
AUP1G06
AUP1G07
AUP1G08
AUP1G14
AUP1G17
AUP1G32
AUP1G34
AUP1G57
AUP1G74
AUP1G79
AUP1G80
AUP1G125
AUP1G126
AUP1G240
Single 2-Input NAND Gate
Single 2-Input NOR Gate
Single Inverter
Single Inverter Buffer/Driver w/Open Drain Output
Single Buffer/Driver w/Open Drain Output
Single 2-Input AND Gate
Single Schmitt Trigger Inverter
Single Schmitt Trigger Buffer
Single 2-Input OR Gate
Single Buffer Gate
2-Input Non-Inverting MUX
Single Positive-Edge-Triggered D-Type Flip-Flop
Single D-Type Flip-Flop
Single D-Type Flip-Flop
Single Bus Buffer Gate w/3-State Output
Single Bus Buffer Gate w/3-State Output
Single Buffer/Driver w/3-State Output
SOT-23
(DBV)
X
X
X
X
SC70
(DCK)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SM8
(DCT)
US8
(DCU)
X2SON
(DQE)
SOT
(DRL)
USON
(DRY)
X2SON
(DSF)
UQFN
(RSE)
DSBGA
(YFP)
DSBGA
(YZP)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
DSBGA
(YZV)
X
X
X
X
X
X
X
X
X
X
X
X
X
P indicates that this device is Product Preview.
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Single-Gate Diagram
5
4
1
2
AHC
AHCT
LVC
AUC
AUP
3
1G00
5
4
1
2
AHC
AHCT
LVC
AUC
AUP
3
1G14
8
6
5
2
1
4
3
4
1
2
1G02
5
1
2
5
2
1G175
3
Q
D
C
CLK
2
3
5
1
LVC
AUC
AUP
Little Logic Guide 2
4
3
5
4
1
2
1
2
3
1
1GX04
5
4
D
D
1
C
2
LVC
AUC
AUP
CLK
2
3
5
1
2
6
2
1G332
3
C
1
3
2
8
5
Q
2
1G373
6
5
4
1
1
2
1G374
10
3
4
2
3
6
5
2
1
AHC
AHCT
LVC
AUC
AUP
3
1G32
AHC
AHCT
LVC
AUC
AUP
1G125
4
C1 Q D
D
5
4
3
2
5
4
3
2
3
LVC
R
LVC
3
5
LVC
Q
2
AHC
AHCT
LVC
AUC
AUP
1G08
6
7
4
1
1G29
6
7
1
4
3
1G07
1
1G123
5
2
5
LVC
AUC
AUP
LVC
AHC
AHCT
LVC
AUC
3
1
4
8
4
1G27
1G86
4
3
5
1
4
LVC
1
3
5
Q
2
1G06
6
1G19
4
LVC
AUC
AUP
AUC
LVC
1
3
5
4
LVC
LVC
AUC
6
LVC
AUC
AUP
5
6
6
1G80
4
1G240
5
5
4
LVC
3
1G04/1GU04
AHC
AHCT
LVC
AUC
AUP
1G18
1G79
4
R Q
C1 D
1
LVC
AUC
AUP
3
2
1
1G17
D
1
4
5
6
4
1G74
6
AHC
AHCT
LVC
AUC
AUP
3
5
AUC
AUP
S Q
C
D
R Q
7
5
4
5
2
AHC
AHCT
LVC
AUC
AUP
3
1G126
6
5
4
1
2
1G386
3
3
2
1
1
2
1G0832
3
5
4
LVC
1
1G10
5
2
3
1G11
5
4
4
LVC
LVC
AUP
2
1
3
1
6
7
2
3
1G38
1G34
5
6
5
4
LVC
1
6
5
AUP
1
4
3
2
2
3
1G157
1G139
4
LVC
LVC
LVC
6
4
LVC
8
4
1
5
6
LVC
1
3
2
1G3208
Texas Instruments 2012
Selection Tables
➔ Dual-Gate Functions
Dual Gates
Function
Description
LVC2G00
Dual 2-Input NAND Gate
SOT-23
(DBV)-6
SC70
(DCK)
SM8
(DCT)
US8
(DCU)
X
X
X
X
SOT
(DRL)
USON
(DRY)
X2SON
(DSF)
X2SON
(DQE)
UQFN
(RSE)
DSBGA
(YFP)
DSBGA
(YZP)
X
LVC2G02
Dual 2-Input NOR Gate
LVC2G04
Dual Inverter
X
X
LVC2GU04
Dual Unbuffered Inverter
X
X
LVC2G06
Dual Inverter w/Open Drain Output
X
X
P
P
X
LVC2G07
Dual Non-Inverter w/Open Drain Output
X
X
P
P
X
LVC2G08
Dual 2-Input AND Gate
LVC2G14
Dual Schmitt Inverter
X
X
X
X
LVC2G17
Dual Schmitt Trigger Input Buffers
LVC2G32
Dual 2-Input OR Gate
LVC2G34
Dual Non-Inverter
X
X
X
X
X
X
P
X
X
X
X
P
X
X
X
X
X
X
LVC2G38
Dual 2-Input NAND Gate w/Open Drain Output
X
X
X
LVC2G53
2:1 Analog Multiplexer/Demultiplexer
X
X
X
LVC2G79
Dual Positive-Edge-Triggered D-Type Flip-Flop
X
X
X
LVC2G80
Dual Positive-Edge-Triggered D-Type Flip-Flop
X
X
X
LVC2G86
Dual 2-Input Exclusive-OR Gate
X
X
X
LVC2G125
Dual Bus Buffer Gate w/3-State Outputs
X
X
X
LVC2G126
Dual Bus Buffer Gate w/3-State Outputs
X
X
X
LVC2G157
Single 2 Line to 1 Line Data Selector/Multiplexer
X
X
X
LVC2G240
Dual Bus Buffer Gate w/3-State Outputs
X
X
X
LVC2G241
Dual Buffer/Driver w/3-State Outputs
X
X
X
AUC2G00
Dual 2-Input NAND Gate
X
X
X
X
X
AUC2G02
Dual 2-Input NOR Gate
AUC2G04
Dual Inverter
X
X
AUC2GU04
Dual Unbuffered Inverter
X
X
X
X
X
X
AUC2G06
Dual Inverter w/Open Drain Output
X
X
X
AUC2G07
Dual Non-Inverter w/Open Drain Output
X
X
X
AUC2G08
Dual 2-Input AND Gate
X
X
X
AUC2G32
Dual 2-Input OR Gate
X
X
X
AUC2G34
Dual Non-Inverter
X
X
X
X
AUC2G53
2:1 Analog Multiplexer/Demultiplexer
X
X
X
AUC2G79
Dual Positive-Edge-Triggered D-Type Flip-Flop
X
X
X
AUC2G80
Dual Positive-Edge-Triggered D-Type Flip-Flop
X
X
X
AUC2G86
Dual 2-Input Exclusive-OR Gate
X
X
X
AUC2G125
Dual Bus Buffer Gate w/3-State Outputs
X
X
X
AUC2G126
Dual Bus Buffer Gate w/3-State Outputs
X
X
AUC2G240
Dual Bus Buffer Gate w/3-State Outputs
X
X
X
AUC2G241
Dual Buffer/Driver w/3-State Outputs
X
X
X
X
X
P indicates that this device is Product Preview.
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Little Logic Guide 11
Texas Instruments 2012
Selection Tables
➔ Dual-Gate Functions
Dual Gates (continued)
SOT-23
(DBV)-6
SC70
(DCK)
SM8
(DCT)
US8
(DCU)
SOT
(DRL)
USON
(DRY)
X2SON
(DSF)
X2SON
(DQE)
UQFN
(RSE)
DSBGA
(YFP)
X
X
X
X
X
X
X
X
Function
Description
AUP2G00
Dual 2-Input NAND Gate
AUP2G02
Dual 2-Input NOR Gate
AUP2G04
Dual Inverter
X
X
X
X
AUP2G06
Dual Inverter w/Open Drain Output
X
X
X
X
AUP2G07
Dual Non-Inverter w/Open Drain Output
X
X
X
AUP2G08
Dual 2-Input AND Gate
AUP2G14
Dual Schmitt Inverter
X
X
X
X
AUP2G17
Dual Schmitt Trigger Input Buffers
X
X
X
X
AUP2G32
Dual 2-Input OR Gate
AUP2G34
Dual Non-Inverter
AUP2G79
Dual Positive-Edge-Triggered D-Type Flip-Flop
AUP2G80
AUP2G125
DSBGA
(YZP)
X
X
X
X
X
X
X
X
X
X
X
X
X
Dual Positive-Edge-Triggered D-Type Flip-Flop
X
X
X
X
Dual Bus Buffer Gate w/3-State Outputs
X
X
X
X
X
AUP2G126
Dual Bus Buffer Gate w/3-State Outputs
X
X
X
X
X
AUP2G240
Dual Bus Buffer Gate w/3-State Outputs
X
X
X
X
AUP2G241
Dual Buffer/Driver w/3-State Outputs
X
X
X
X
X
X
X
X
X
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Dual-Gate Diagram
7
6
5
1
2
3
4
LVC
AUC
8
7
6
5
1
2
3
4
2
2G06
5
4
LVC
AUC
LVC
AUC
1
3
2
2G07
8
7
6
5
1
2
3
4
4
2
LVC
8
7
6
5
6
1
3
1
2
3
7
6
C
D
2
3
5
LVC
AUC
8
7
6
5
4
LVC
AUC
2
LVC
AUC
8
7
8
7
6
1
3
LVC
8
7
6
5
LVC
AUC
8
7
6
5
4
2
3
6
1
2
3
LVC
8
7
Q
C
D
6
LVC
AUC
8
7
6
1
2
3
4
1
2G53
5
5
LVC
AUC
Q
4
2G38
5
LVC
2G14
2G08
5
5
3
2G34
4
2G32
Q
C
D
5
LVC
AUC
6
LVC
AUC
S Q
C
D
R Q
5
2G17
8
1
2G04/2GU04
6
4
2G02
2G00
1
3
2
5
6
LVC
AUC
1
6
4
5
6
LVC
AUC
C
D
8
LVC
AUC
8
7
6
2
3
4
1
2G74
5
LVC
8
2
3
4
2G79
7
6
5
2
3
4
G A/B
A
Y
B
Y
LVC
AUC
8
7
6
5
2
3
4
LVC
AUC
Q
1
4
2G80
Little Logic Guide 1
2
3
2G86
4
1
2
3
2G125
4
1
2
3
2G126
12
4
1
2
3
2G157
4
1
2G240
1
2G241
Texas Instruments 2012
Selection Tables
➔ Triple-Gate Functions
Triple Gates
Function
Description
LVC3G04
LVC3GU04
LVC3G06
LVC3G07
LVC3G14
LVC3G17
LVC3G34
Triple Inverter Gate
Triple Inverter Gate (Unbuffered)
Triple Inverter Buffer/Driver w/Open Drain Output
Triple Buffer/Driver w/Open Drain Output
Triple Schmitt Trigger Inverter
Triple Schmitt Trigger Buffer
Triple Buffer Gate
AUP3G04
AUP3G06
AUP3G07
AUP3G14
AUP3G17
AUP3G34
Triple Inverter Gate
Triple Inverter Buffer/Driver w/Open Drain Output
Triple Buffer/Driver w/Open Drain Output
Triple Schmitt Trigger Inverter
Triple Schmitt Trigger Buffer
Triple Buffer Gate
SM8
(DCT)
US8
(DCU)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X2SON
(DQE)
UQFN
(RSE)
DSBGA
(YFP)
DSBGA
(YZP)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Triple-Gate Diagram
8
7
6
5
1
2
3
4
7
6
5
2
3
4
8
LVC
1
3G04/3GU04
8
LVC
1
7
6
5
2
3
4
8
LVC
1
3G07
3G06
7
6
5
2
3
4
8
LVC
1
7
6
5
2
3
4
8
LVC
1
3G17
3G14
7
6
5
2
3
4
LVC
3G34
➔ Signal-Switch Functions
Signal Switch Functions
Function
SOT-23
(DBV)-5
Description
SC70
(DCK)-5
CBT1G125
Single FET Bus Switch
X
X
CBT1G384
Single FET Bus Switch
X
X
CB3T1G125
Single FET Bus Switch
X
X
CBTD1G125
Single FET Bus Switch
X
X
CBTD1G384
Single FET Bus Switch
X
X
CBTLV1G125
Single FET Bus Switch
X
X
LVC1G66
Single Analog Switch
X
X
LVC1G3157
Single-Pole, Double-Throw (SPDT) Analog Switch
X
X
LVC2G53
Single-Pole, Double-Throw (SPDT) Analog Switch
LVC2G66
Dual Analog Switch
AUC1G66
Dual Analog Switch
AUC2G53
AUC2G66
X
SOT-23
(DBV)-6
SC70
(DCK)-6
SM8
(DCT)
X
US8
(DCU)
SOT
(DRL)
DSBGA
(YZP)
SON
(DRY)
SON
(DSF)
X
X
X
X
X
X
X
X
X
X
X
X
X
Single-Pole, Double-Throw (SPDT) Analog Switch
X
X
X
Dual Analog Switch
X
X
X
X
X
X
X
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Signal-switch diagram
4
5
1
2
LVC
AUC
3
1G66
Little Logic Guide 5
1
4
2
1G125
3
CBT
CB3T
CBTD
CBTLV
5
1
4
2
1G384
3
6
5
4
2
3
CBT
CBTD
1
1G3157
13
LVC
8
1
7
6
5
2
3
4
2G53
LVC
AUC
8
1
7
6
5
2
3
4
LVC
AUC
2G66
Texas Instruments 2012
Selection Tables
➔ Configurable Functions
Configurables
SOT-23
(DBV)-6
Function
Description
LVC1G57
Configurable Multiple-Function Gate
US8 (DCU)
SOT (DRL)
DSBGA
(YZP)
X
X
X
DSBGA
(YFP)
SC70
(DCK)
USON
(DRY)
X
X
SM8
(DCT)
SON
(DSF)
X
LVC1G58
Configurable Multiple-Function Gate
X
X
X
X
X
X
LVC1G97
Configurable Multiple-Function Gate
X
X
X
X
X
X
LVC1G98
Configurable Multiple-Function Gate
X
X
X
X
X
X
LVC1G99
Ultra-Configurable Multiple-Function Gate
AUP1G57
Configurable Multiple-Function Gate
X
X
X
X
X
X
X
AUP1G58
Configurable Multiple-Function Gate
X
X
X
X
X
X
X
X
X
X
AUP1G97
Configurable Multiple-Function Gate
X
X
X
X
X
X
X
AUP1G98
Configurable Multiple-Function Gate
X
X
X
X
X
X
X
AUP1G99
Ultra-Configurable Multiple-Function Gate
X
X
X
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Configurable Diagrams
6
1
5
4
2
3
LVC
AUP
1G57
6
1
5
4
2
3
LVC
AUP
6
1
1G58
5
4
2
3
LVC
AUP
6
1
1G97
5
4
2
3
8
7
6
5
1
2
3
4
LVC
AUP
1G98
LVC
AUP
1G99
➔ Translation Functions
Translation
SOT-23
(DBV)
SC70
(DCK)
DSBGA
(YZP)
USON
(DRY)
X2SON
(DSF)
DSBGA
(YFP)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Function
Description
AUP1T00
2-Input NAND Gate
X
AUP1T02
2-Input NOR Gate
X
AUP1T04
Inverter
X
AUP1T08
2-Input AND Gate
X
AUP1T14
Schmitt Trigger Inverter
X
AUP1T17
Schmitt Trigger Buffer
X
AUP1T32
2-Input OR Gate Single-Bit
X
AUP1T57
Single-Supply Voltage-Level Translator with 9
Configurable Gate Logic Functions
X
AUP1T58
Single-Supply Voltage-Level Translator with 9
Configurable Gate Logic Functions
X
AUP1T86
2-Input Exclusive-OR Gate
AUP1T87
2-Input Exclusive NOR Gate
AUP1T97
Single-Supply Voltage-Level Translator with 9
Configurable Gate Logic Functions
X
AUP1T98
Single-Supply Voltage-Level Translator with 9
Configurable Gate Logic Functions
X
AUP1T157
2 to 1 Data Selector/Multiplexer
X
AUP1T158
2-Input Multiplexer
X
SM8
(DCT)
US8
(DCU)
SOT
(DRL)
X
X
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of May 2011.
Little Logic Guide 14
Texas Instruments 2012
Selection Tables
➔ Translation Functions
Translation (continued)
Function
Description
AVC1T45
Dual-Supply Transceiver w/Configurable Voltage
Translation and 3-State Outputs
AVC2T45
Dual-Bit Dual-Supply Transceiver w/Configurable
Voltage Translation and 3-State Outputs
AVCH1T45
Dual-Supply Transceiver w/Configurable Voltage
Translation and 3-State Outputs
AVCH2T45
Dual-Bit Dual-Supply Transceiver w/Configurable
Voltage Translation and 3-State Outputs
LVC1T45
Dual-Supply Transceiver w/Configurable Voltage
Translation and 3-State Outputs
LVC2T45
Dual-Bit Dual-Supply Transceiver w/Configurable
Voltage Translation and 3-State Outputs
SOT-23
(DBV)
SC70
(DCK)
X
X
SM8
(DCT)
US8
(DCU)
USON
(DPK)
DSBGA
(YZP)
X
X
X
SOT
(DRL)
X2SON
(DSF)
X
X
X
X
X
X
X
USON
(DRY)
X
X
X
X
X
X
X
X
X
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Translation Diagrams
5
4
5
4
AUP
AUP
1
2
3
1
1T00
6
5
2
3
1
6
4
2
3
4
AUP
AUP
1
5
1
1T57
Little Logic Guide 2
1T58
3
2
1
3
2
1T86
3
2
5
6
4
2
1T87
3
5
2
3
5
4
6
2
1T97
15
3
2
1
3
4
6
5
4
2
1T98
3
2
3
8
7
6
5
1
2
3
4
LVC
AVC
AVCH
1
2
1T157
3
LVC
AVC
AVCH
2T45
6
5
4
AUP
AUP
1
4
1T45
1T32
5
5
AUP
1
AUP
1
6
4
AUP
1T17
AUP
1
4
1
3
1T14
AUP
1
5
AUP
1T08
1T04
5
4
AUP
1
3
2
5
4
AUP
1T02
4
5
4
5
AUP
1
2
3
1T158
Texas Instruments 2012
DSBGA
(YFP)
Cross-Reference
➔ Competitor Cross-Reference
LVC Devices
Function Description
TI (LVC)
Fairchild
(NC7S/WZ)
ON (SZ)
ON (NLU)
ON
(NLX)
Toshiba
(TC7S/WZ)
NXP (LVC)
Pericom (STX)
STMicro (LX)
Single gate
1G00
Single 2-Input NAND
SN74LVC1G00
NC7SZ00
NL17SZ00
NLU1G00
—
TC7SZ00
74LVC1G00
—
74LX1G00
1G02
Single 2-Input NOR
SN74LVC1G02
NC7SZ02
NL17SZ02
—
—
TC7SZ02
74LVC1G02
PI74STX1G02
74LX1G02
1G04
Single Inverter
SN74LVC1G04
NC7SZ04
NL17SZ04
NLU1G04
—
TC7SZ044
74LVC1G04
—
74LX1G04
1GU04
Single Inverter
(Unbuffered)
SN74LVC1GU04
NC7SZU04
NL17SZU04
NLU1GU04
—
TC7SZU04
74LVC1GU04
PI74STX1GU04
74LX1GU04
1GX04
Crystal Driver
SN74LVC1GX04
—
—
—
—
—
74LVC1GX04
—
—
1G06
Single Inverter Buffer/
Driver w/Open Drain
SN74LVC1G06
—
NL17SZ06
—
—
—
74LVC1G06
—
—
1G07
Single Buffer/Driver w/
Open Drain
SN74LVC1G07
—
NL17SZ07
NLU1G07
—
TCSZ07
74LVC1G07
—
74LX1G07
1G08
Single 2-Input AND
SN74LVC1G08
NC7SZ08
NL17SZ08
NLU1G08
—
TC7SZ08
74LVC1G08
PI74STX1G08
74LX1G08
1G10
Single 3-Input NAND
SN74LVC1G10
NC7SZ10
—
­­—
­­—
—
74LVC1G10
—
—
1G11
Single 3-Input AND
SN74LVC1G11
NC7SZ11
—
—
—
—
74LVC1G11
—
—
1G14
Single Inverter w/
Schmitt Trigger
SN74LVC1G14
NC7SZ14
NL17SZ14
NLU1G14
—
TC7SZ14
74LVC1G14
—
74LX1G14
1G17
Single Buffer w/Schmitt
Trigger
SN74LVC1G17
—
NL17SZ17
—
—
—
74LVC1G17
—
—
1G18
1 of 2 Non-Inverting
MUX
SN74LVC1G18
NC7SZ18
NL7SZ18
—
—
—
74LVC1G18
—
—
1G19
1 of 2 Decoder
SN74LVC1G19
NC7SZ19
NL7SZ19
—
—
—
74LVC1G19
—
—
1G27
Single 3-Input NOR
SN74LVC1G27
NC7SZ27
—
—
—
—
—
—
—
1G29
2 of 3 Decoder/
Demultiplexer
SN74LVC1G29
—
—
—
—
—
—
—
—
1G32
Single 2-Input OR
SN74LVC1G32
NC7SZ32
NL17SZ32
NLU1G32
—
TC7SZ126
74LVC1G32
­­—
74LX1G32
1G34
Single Buffer Gate
SN74LVC1G34
—
NL17SZ16
—
—
TC7SZ32
74LVC1G34
—
74LX1G70
1G38
Single 2-Input NAND w/
Open Drain
SN74LVC1G38
NC7SZ38
—
—
­­—
TC7SH34
74LVC1G38
—
—
1G79
Single D-Type Flip-Flop
SN74LVC1G79
—
—
—
—
TC7SZ38
74LVC1G79
—
—
1G80
Single D-Type Flip-Flop
SN74LVC1G80
—
—
—
—
—
74LVC1G80
—
—
1G86
Single 2-Input ExclusiveOR
SN74LVC1G86
NC7SZ86
NL17SZ86
NLU1G86
—
—
74LVC1G86
­­—
74LX1G86
1G123
Single Retrig Monostable SN74LVC1G123
Multivibrator
—
—
—
—
TC7SZ86
—
—
—
1G125
Single-Bus Buffer Gate
w/3-State
SN74LVC1G125
NC7SZ125
NL17SZ125
—
—
—
74LVC1G125
—
74LX1G125
1G126
Single-Bus Buffer Gate
w/3-State
SN74LVC1G126
NC7SZ126
NL17SZ126
—
—
TC7SZ125
74LVC1G126
PI74STX1G126
74LX1G126
1G132
Single 2-Input NAND w/
Schmitt Trigger
SN74LVC1G132
—
—
—
—
TC7SZ126
—
—
74LX1G132
1G139
2-Line to 4-Line
Decoder
SN74LVC1G139
—
—
—
—
—
—
—
—
1G175
Single D-Type Flip-Flop
w/Asynch Clear
SN74LVC1G175
NC7SZ175
—
—
—
—
74LVC1G175
—
—
1G240
Single Bus Buffer Gate
w/3-State
SN74LVC1G240
—
­­—
­­—
­­—
­­—
­­—
­­—
­­—
1G332
Single 3-Input OR
SN74LVC1G332
NC7SZ332
—
—
—
—
74LVC1G332
—
—
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Little Logic Guide
16
Texas Instruments 2012
Cross-Reference
➔ Competitor Cross-Reference
LVC Devices (continued)
Function Description
TI (LVC)
Fairchild
(NC7S/WZ)
ON (SZ)
ON (NLU)
ON (NLX)
Toshiba
(TC7S/WZ)
NXP (LVC)
Pericom (STX)
STMicro (LX)
SN74LVC1G373
NC7SZ373
—
—
—
—
—
—
—
SN74LVC1G374
NC7SZ374
—
—
—
—
—
—
—
SN74LVC1G386
SN74LVC1G0832
NC7SZ386
—
—
­­
—
—
­­
—
—
­­
—
—
­­
—
74LVC1G386
­­—
—
­­
—
—
­­
—
SN74LVC1G3208
—
—
—
—
—
—
—
—
SN74LVC2G00
SN74LVC2G02
SN74LVC2G04
SN74LVC2GU04
SN74LVC2G06
NC7WZ00
NC7WZ02
NC7WZ04
NC7WZU04
—
NL27WZ00
NL27WZ02
NL27WZ04
NL27WZU04
NL27WZ06
­­—
—
NLU2G04
NLU2GU04
NLU2G06
—
—
NLX2G04
NLX2GU04
NLX2G06
TC7WZ00
TC7WZ02
—
­­—
—
74LVC2G00
74LVC2G02
74LVC2G04
74LVC2GU04
74LVC2G06
—
—
—
­­
—
—
—
—
—
­­
—
—
SN74LVC2G07
NC7WZ07
NL27WZ07
NLU2G07
NLX2G07
—
74LVC2G07
—
—
SN74LVC2G08
SN74LVC2G14
NC7WZ08
NC7WZ14
NL27WZ08
NL27WZ14
—
NLU2G14
NLX2G08
NLX2G14
TC7WZ08
—
74LVC2G08
74LVC2G14
PI74STX2G08
—
—
—
SN74LVC2G17
NC7WZ17
NL27WZ17
NLU2G17
NLX2G17
­­—
74LVC2G17
­­—
­­—
SN74LVC2G32
SN74LVC2G34
SN74LVC2G38
NCWZ32
NC7WZ16
NCWZ38
NL27WZ32
NL27WZ16
—
—
—
—
—
—
TC7WZ32
—
TC7WZ38
74LVC2G32
74LVC2G34
74LVC2G38
—
—
—
—
—
—
SN74LVC2G74
NC7SZ74
NL17SZ74
—
—
TC7WZ74
74LVC2G74
—
—
SN74LVC2G79
SN74LVC2G80
SN74LVC2G86
—
—
NC7WZ86
—
—
NL27WZ86
—
—
—
—
—
NLX2G86
—
—
—
—
—
74LVC2G86
—
—
—
—
—
—
SN74LVC2G125
NC7WZ125
NL27WZ125
­­—
—
­­—
74LVC2G125
­­—
­­—
SN74LVC2G126
NC7WZ126
NL27WZ126
—
—
—
74LVC2G126
—
—
SN74LVC2G132
NC7WZ132
—
—
­­—
—
—
—
—
SN74LVC2G157
—
—
—
—
—
—
—
—
SN74LVC2G240
NC7WZ240
—
—
—
—
74LVC2G240
—
—
SN74LVC2G241
NC7WZ241
—
­­—
—
­­—
74LVC2G241
­­—
­­—
SN74LVC3G04
SN74LVC3GU04
NC7NZ04
NC7NZU04
NNL37WZ04
—
­­—
—
—
—
TC7WZ04
TC7WZU04
74LVC3G04
74LVC3GU04
—
—
—
—
SN74LVC3G06
—
NL37WZ06
­­—
­­—
—
74LVC3G06
—
—
SN74LVC3G07
—
NL37WZ07
—
—
­­—
74LVC3G07
­­—
­­—
SN74LVC3G14
NC7NZ14
NL37WZ14
NLU3G14
NLX3G14
TC7WZ14
74LVC3G14
—
—
SN74LVC3G17
NC7NZ17
NL37WZ17
NLU3G17
NLX3G17
—
74LVC3G17
—
—
SN74LVC3G34
NC7NZ34
NL37WZ16
—
—
TC7WZ34
74LVC3G34
PI74STX2G08
—
Single gate
1G373
1G374
1G386
1G0832
1G3208
Single D-Type Latch
w/3-State
Single D-Type Flip-Flop
w/3-State
Single 3-Input Exclusive-OR
Single 3-Input Positive
AND-OR Gate
Single 3-Input Positive
OR-AND Gate
Dual Gate
2G0
2G02
2G04
2GU04
2G06
Dual 2-Input NAND
Dual 2-Input NOR
Dual Inverter
Dual Inverter (Unbuffered)
Dual Inverter Buffer
Driver w/Open Drain
2G07
Dual-Buffer Driver w/
Open Drain Output
2G08
Dual 2-Input AND
2G14
Dual Inverter w/Schmitt
Trigger
2G17
Dual Buffer w/Schmitt
Trigger Input
2G32
Dual 2-Input OR
2G34
Dual Buffer Gate
2G38
Dual 2-Input NAND w/
Open Drain
2G74
D-Type Flip-Flop w/Pre
and CLR
2G79
Dual D-Type Flip-Flop
2G80
Dual D-Type Flip-Flop
2G86
Dual 2-Input ExclusiveOR
2G125
Dual-Bus Buffer Gate
w/3-State
2G126
Dual-Bus Buffer Gate
w/3-State
2G132
Dual 2-Input NAND w/
Schmitt Trigger Input
2G157
2-Input Non-Inverting
Mux
2G240
Dual-Bus Buffer Gate
w/3-State
2G241
Dual-Bus Buffer Gate
w/3-State
Triple Gate
3G04
Triple Inverter
3GU04
Triple Inverter
(Unbuffered)
3G06
Triple Inverter Buffer/Driver
w/Open Drain
3G07
Triple Buffer/Driver w/
Open Drain
3G14
Triple Inverter w/Schmitt
Trigger
3G17
Triple Buffer w/Schmitt
Trigger
3G34
Triple Buffer
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Little Logic Guide 17
Texas Instruments 2012
Cross-Reference
➔ Competitor Cross-Reference
AUC Devices
Function Description
Fairchild
(NC7SV)
TI (AUC)
ON (SV)
Toshiba
Pericom
Single Gate (5-pin, unless noted)
1G00
Single 2-Input NAND
SN74AUC1G00
NC7SV00
NL17SV00
TC7SA00
—
1G02
Single 2-Input NOR
SN74AUC1G02
NC7SV02
NL17SV02
—
—
1G04
Single Inverter
SN74AUC1G04
NC7SV04
NL17SV04
TC7SA04
—
1GU04
Single Inverter (Unbuffered)
SN74AUC1GU04
NC7SVU04
—
TC7SAU04
—
1G06
Single Inverter Buffer/Driver w/Open Drain
SN74AUC1G06
—
—
—
—
1G07
Single 2-Input AND
SN74AUC1G07
—
NL17SV08
—
—
1G08
Single Buffer/Driver w/Open Drain
SN74AUC1G08
NC7SV08
—
TC7SA08
PI74ST1G08
1G14
Single Inverter w/Schmitt Trigger
SN74AUC1G14
NC7SV14
—
—
—
1G17
Single Buffer w/Schmitt Trigger
SN74AUC1G17
NC7SV17
—
—
—
1G19
1 of 2 Decoder/Demultiplexer
SN74AUC1G19
NC7SV19
NL17SV32
TC7PA19
—
1G32
Single 2-Input OR
SN74AUC1G32
NC7SV32
—
TC7SA32
PI74ST1G32
1G74
D-Type Flip-Flop w/Pre and CLR
SN74AUC1G74
NC7SV74
—
—
—
1G79
Single D-Type Flip-Flop
SN74AUC1G79
—
—
—
—
1G80
Single D-Type Flip-Flop
SN74AUC1G80
—
—
—
—
1G86
Single 2-Input Exclusive-OR
SN74AUC1G86
NC7SV86
—
—
PI74ST1G86
1G125
Single-Bus Buffer Gate w/3-State
SN74AUC1G125
NC7SV125
—
—
PI74ST1G125
1G126
Single-Bus Buffer Gate w/3-State
SN74AUC1G126
NC7SV126
—
—
PI74ST1G126
1G240
Single-Bus Buffer Gate w/3-State
SN74AUC1G240
—
—
—
—
—
—
—
—
—
Dual Gate (8-pin, unless noted)
2G00
2G02
2G04
2GU04
2G06
2G07
2G08
2G32
2G34
2G79
2G80
2G86
2G125
2G126
2G240
2G241
Dual 2-Input NAND
Dual 2-Input NOR
Dual Inverter
Dual Inverter (Unbuffered)
Dual Inverter Buffer/Driver w/Open Drain Output
Dual Buffer/Driver w/Open Drain Output
Dual 2-Input AND
Dual 2-Input OR
Dual Buffer
Dual D-Type Flip-Flop
Dual D-Type Flip-Flop
Dual 2-Input Exclusive-OR
Dual-Bus Buffer Gate w/3-State
Dual-Bus Buffer Gate w/3-State
Dual-Bus Buffer Gate w/3-State
Dual-Bus Buffer Gate w/3-State
SN74AUC2G00
SN74AUC2G02
SN74AUC2G04
SN74AUC2GU04
SN74AUC2G06
SN74AUC2G07
SN74AUC2G08
SN74AUC2G32
SN74AUC2G34
SN74AUC2G79
SN74AUC2G80
SN74AUC2G86
SN74AUC2G125
SN74AUC2G126
SN74AUC2G240
SN74AUC2G241
—
—
NC7WV04
—
—
NC7WV07
—
—
NC7WV16
—
—
—
NC7WV125
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TCPA04
—
TCPAU04
—
—
—
—
—
—
—
—
—
TC7PA34
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Little Logic Guide 18
Texas Instruments 2012
Cross-Reference
➔ Competitor Cross-Reference
Signal-Switch Devices
Function
Description
CBT1G125
CBTD1G125
CBT1G384
CBTD1G384
CBTLV1G125
CB3T1G125
Single FET Bus Switch
Single FET Bus Switch
Single Low-Power Bus Switch
384 Function w/Level Shifting
Single LV FET Bus Switch
Single FET Bus Switch
TI
Toshiba
Fairchild
NXP
Pericom
SN74CBT1G125
SN74CBTD1G125
SN74CBT1G384
SN74CBTD1G384
SN74CBTLV1G125
SN74CB3T1G125
—
—
TC7SB384
TC7SBD384
—
—
—
—
NC7SZ384
NC7SZD384
—
—
—
—
74LVC1G384
—
—
—
—
—
—
—
—
—
AUC1G66
AUC2G53
AUC2G66
Single Analog Switch
SPDT Analog Switch
Dual Analog Switch
SN74AUC1G66
SN74AUC2G53
SN74AUC2G66
—
TC7PA53
—
—
—
—
—
—
—
—
—
—
LVC1G66
LVC1G3157
LVC2G53
LVC2G66
Single Analog Switch
SPDT Analog Switch
SPDT Analog Switch
Dual Analog Switch
SN74LVC1G66
SN74LVC1G3157
SN74LVC2G53
SN74LVC2G66
—
—
—
—
NC7SZ66
NC7SB3157
—
NC7WB66
74LVC1G66
74LVC1G3157
—
74LVC2G66
—
PISA3157
—
—
AUP Devices (5-pin, unless noted)
Function
Description
TI (AUP)
NXP (AUP)
Fairchild (NC7SV)
Toshiba
Single Gate
1G00
Single 2-Input NAND
SN74AUP1G00
74AUP1G00
NC7SP00
TC7SG00
1G02
Single 2-Input NOR
SN74AUP1G02
74AUP1G02
NC7SP02
TC7SG02
1G04
Single Inverter
SN74AUP1G04
74AUP1G04
NC7SP04
TC7SG04
1G06
Single Inverter Buffer/Driver w/Open Drain
SN74AUP1G06
74AUP1G06
—
—
1G07
Single Buffer/Driver w/Open Drain
SN74AUP1G07
74AUP1G07
—
TC7SG07
1G08
Single 2-Input AND
SN74AUP1G08
74AUP1G08
NC7SP08
TC7SG08
1G14
Single Inverter w/Schmitt Trigger
SN74AUP1G14
74AUP1G14
NC7SP14
TC7SG14
1G17
Single Buffer w/Schmitt Trigger
SN74AUP1G17
74AUP1G17
NC7SP17
TC7SG17
1G32
Single 2-Input OR
SN74AUP1G32
74AUP1G32
NC7SP32
TC7SG32
1G34
Single Buffer
SN74AUP1G34
74AUP1G34
NC7SP34
TC7SG34
1G74
Single Positive-Edge-Trigger D-Type Flip-Flop
SN74AUP1G74
74AUP1G74
NC7SP74
—
1G79
Single D-Type Flip-Flop
SN74AUP1G79
74AUP1G79
—
—
1G80
Single D-Type Flip-Flop
SN74AUP1G80
74AUP1G80
—
—
1G125
Single-Bus Buffer Gate w/3-State
SN74AUP1G125
74AUP1G125
NC7SP125
TC7SG125
1G126
Single-Bus Buffer Gate w/3-State
SN74AUP1G126
74AUP1G126
NC7SP126
TC7SG126
1G240
Single-Bus Buffer Gate w/3-State
SN74AUP1G240
7AUP1G240
—
—
Dual Gate (8-pin, unless noted)
2G00
Dual 2-Input NAND
SN74AUP2G00
74AUP2G00
NC7WP00
—
2G02
Dual 2-Input NOR
SN74AUP2G02
74AUP2G02
NC7WP02
—
2G04
Dual Inverter
SN74AUP2G04
74AUP2G04
NC7WP04
—
2G06
Dual Inverter Buffer/Driver w/Open Drain Output
SN74AUP2G06
74AUP2G06
—
2G07
Dual Buffer/Driver w/Open Drain Output
SN74AUP2G07
74AUP2G07
—
NC7WP07
2G08
Dual 2-Input AND
SN74AUP2G08
74AUP2G08
NC7WP08
—
2G125
Dual-Bus Buffer Gate w/3-State
SN74AUP2G125
74AUP2G125
NC7WP125
—
2G126
Dual-Bus Buffer Gate w/3-State
SN74AUP2G126
74AUP2G126
NC7WP126
—
2G14
Dual Inverter w/Schmitt Trigger
SN74AUP2G14
74AUP2G14
NC7WP14
—
2G17
Dual Buffer w/Schmitt Trigger Input
SN74AUP2G17
74AUP2G17
NC7WV17
—
2G240
Dual-Bus Buffer Gate w/3-State
SN74AUP2G240
74AUP2G240
NC7WP240
—
2G241
Dual-Bus Buffer Gate w/3-State
SN74AUP2G241
74AUP2G241
—
—
—
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Little Logic Guide 19
Texas Instruments 2012
Cross-Reference
➔ Competitor Cross-Reference
AUP Devices (5-pin, unless noted) (continued)
Function
Description
TI (AUP)
NXP (AUP)
Fairchild (NC7SV)
Toshiba
2G32
Dual 2-Input OR
SN74AUP2G32
74AUP2G32
NC7WP32
—
2G34
Dual Buffer Gate
SN74AUP2G34
74AUP2G34
—
—
2G79
Dual D-Type Flip-Flop
SN74AUP2G79
74AUP2G79
—
—
2G80
Dual D-Type Flip-Flop
SN74AUP2G80
74AUP2G80
—
—
Triple gates
3G04
Triple Inverter
SN74AUP3G04
74AUP3G04
NC7NP04
—
3G06
Triple Inverter Buffer/Driver w/Open Drain
SN74AUP3G06
74AUP3G06
—
—
3G07
Triple Buffer/Driver w/Open Drain
SN74AUP3G07
74AUP3G07
—
—
3G17
Triple Buffer w/Schmitt Trigger
SN74AUP3G17
74AUP3G17
—
3G34
Triple Buffer
SN74AUP3G34
74AUP3G34
—
NC7NP34
—
AHC Devices
Function
Description
TI (AHC)
Toshiba (TC7S/W)
Fairchild (NC7S)
ON (VHC)
STMicro (V1G)
NXP
1G00
1G02
Single 2-Input NAND Gate
SN74AHC1G00
TC7SH00
NC7S00
MC74VHC1G00
74V1G00
74AHC1G00
Single 2-Input NOR
SN74AHC1G02
TC7SH02
NC7S02
MC74VHC1G02
74V1G02
74AHC1G02
1G04
Single Inverter
SN74AHC1G04
TC7SH04
NC7S04
MC74VHC1G04
74V1G04
74AHC1G04
1GU04
Single Inverter (Unbuffered)
SN74AHC1GU04
TC7SHU04
NC7SU04
MC74VHC1GU04
74V1GU04
74AHC1GU04
1G08
Single 2-Input AND
SN74AHC1G08
TC7SH08
NC7S08
MC74VHC1G08
74V1G08
74AHC1G08
1G14
Single Inverter w/Schmitt Trigger
SN74AHC1G14
TC7SH14
NC7S14
MC74VHC1G14
74V1G14
74AHC1G14
1G32
Single 2-Input OR 2
SN74AHC1G32
TC7SH32
NC7S32
MC74VHC1G32
74V1G32
74AHC1G32
1G86
Single 2-Input Exclusive-OR
SN74AHC1G86
TC7SH86
NC7S86
MC74VHC1G86
74V1G86
74AHC1G86
1G125
Single-Bus Buffer Gate w/3-State
SN74AHC1G125
TC7SH125
—
MC74VHC1G125
74V1G125
74AHC1G125
1G126
Single-Bus Buffer Gate w/3-State
SN74AHC1G126
TC7SH126
—
MC74VHC1G126
74V1G126
74AHC1G126
AHCT Devices
Function
Description
TI (AHCT)
Toshiba (TC7SE/WT)
Fairchild (NC7ST)
ON (VHC1GT)
STMicro (V1T)
NXP
1G00
Single 2-Input NAND
SN74AHCT1G00
TC7SET00
NC7S00
MC74VHC1G00
74V1G00
74AHC1G00
1G022
Single 2-Input NOR
SN74AHCT1G02
TC7SET02
NC7S02
MC74VHC1G02
74V1G02
74AHC1G02
1G04
Single Inverter
SN74AHCT1G04
TC7SET044
NC7S04
MC74VHC1G04
74V1G04
74AHC1G04
1G08
Single 2-Input AND
SN74AHCT1G08
TC7SET08
NC7SU04
MC74VHC1GU04
74V1GU04
74AHC1GU04
1G14
Single Inverter w/Schmitt Trigger
SN74AHCT1G14
—
NC7S08
MC74VHC1G08
74V1G08
74AHC1G08
1G32
Single 2-Input OR
SN74AHCT1G32
TC7SET32
NC7S14
MC74VHC1G14
74V1G14
74AHC1G14
1G86
Single 2-Input Exclusive-OR
SN74AHCT1G86
TC7SET86
NC7S32
MC74VHC1G32
74V1G32
74AHC1G32
1G125
Single-Bus Buffer Gate w/3-State
SN74AHCT1G125
—
NC7S86
MC74VHC1G86
74V1G86
74AHC1G86
1G126
Single-Bus Buffer Gate w/3-State
SN74AHCT1G126
—
—
MC74VHC1G125
74V1G125
74AHC1G125
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Little Logic Guide 20
Texas Instruments 2012
Cross-Reference
➔ Competitor Cross-Reference
Configurable Devices
Function
Description
LVC1G57
Single Configurable (5 functions)
SN74LVC1G57
NC7SZ57
74LVC1G57
LVC1G58
Single Configurable (5 functions)
SN74LVC1G58
NC7SZ58
74LVC1G58
LVC1G97
Single Configurable (9 functions)
SN74LVC1G97
—
74LVC1G97
LVC1G98
Single Configurable (9 functions)
SN74LVC1G98
—
74LVC1G98
LVC1G99
Ultra-Configurable (60 functions)
SN74LVC1G99
—
—
AUP1G57
Single Configurable (5 functions)
SN74AUP1G57
NC7SP57/74AUP1G57
74AUP1G57
AUP1G58
Single Configurable (5 functions)
SN74AUP1G58
NC7SP58/74AUP1G58
74AUP1G58
AUP1G97
Single Configurable (9 functions)
SN74AUP1G97
74AUP1G97
74AUP1G97
AUP1G98
Single Configurable (9 functions)
SN74AUP1G98
74AUP1G98
74AUP1G98
Ultra-Configurable (60 functions)
SN74AUP1G99
—
—
AUP1G99
TI
Fairchild
NXP
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
AUP1T Translators
Function
Description
TI
ON
NXP
Fairchild
AUP1T00
Single 2-Input Positive-NAND Gate
SN74AUP1T00
MC74VHC1GT00
—
—
AUP1T02
Single 2-Input Positive-NOR Gate
SN74AUP1T02
MC74VHC1GT00
—
—
AUP1T04
Single Inverter Gate
SN74AUP1T04
MC74VHC1GT04
—
—
4AUP1T08
2-Input Positive-AND Gate
SN74AUP1T08
MC74VHC1GT08
—
—
AUP1T14
Single Schmitt-Trigger Inverter Gate
SN74AUP1T14
MC74VHC1GT14
—
—
AUP1T157
Buffer Multiplexer (Noninverted)
SN74AUP1T157
—
—
—
AUP1T158
Buffer Multiplexer (Inverted)
SN74AUP1T158
—
—
—
AUP1T17
Single Schmitt-Trigger Buffer Gate
SN74AUP1T17
MC74VHC1GT86
—
—
AUP1T32
2-Input Positive-OR Gate
SN74AUP1T32
MC74VHC1GT32
—
—
AUP1T57
Configurable, Single-Supply Voltage Translator
SN74AUP1T57
—
74AUP1T57
—
AUP1T58
Configurable, Single-Supply Voltage Translator
SN74AUP1T58
—
74AUP1T58
—
AUP1T86
2-Input Exclusive-OR Gate
SN74AUP1T86
MC74VHC1GT86
—
—
AUP1T87
2-Input Positive Exclusive-NOR Gate
SN74AUP1T87
—
—
—
AUP1T97
Configurable, Single-Supply Voltage Translator
SN74AUP1T97
—
74AUP1T97
—
AUP1T98
Configurable, Single-Supply Voltage Translator
SN74AUP1T98
—
74AUP1T98
—
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Little Logic Guide 21
Texas Instruments 2012
Cross-Reference
➔ Part Number Definition
Naming System
SN74AUP 1G 08 DRY R
R=Tape & Reel
T= Small Tape & Reel
Logic Gate Function
1G
Single Gate
2G
Dual Gate
3G
AHC
CMOS/CMOS
1T
AHCT
TTL to 5VCMOS
2T
LVC
Low-Voltage CMOS
AUP
Low Power Consumption
AUC
Ultra-Low-Voltage 1.8V
CBT
5V Digital Switch
CBTD
5V to 3.3V Translation Switch
CBTLV
Low-Voltage Digital Switch
Triple Gate
Single Gate Translation
Dual Gate Translation
DBV
5/6Leads SOT-23
DCK
5/6Leads SC-70
DRL
5/6Leads SOT553/563
YZP
5/6/8 NanoFree™
YFP
5/6/8 NanoFree™
YZV
4Leads DSBGA
DRY
5/6 QFN
RSE
5/6 QFN
DCT
8Leads SM8
DCU
8Leads US8
DSF
5/6Leads uQFN
DQE
8Leads uQFN
➔ Competitor Part Prefixes
Signal-Switch Devices
TI
Toshiba
Fairchild
ON
ON (NLU)
ON (NLX)
STMicro
NXP
Pericom
Little Logic
SN74AHC1G
TC7SH
NC7S
MC74VHC1G
—
—
74V1G
74AHC1G
—
SN74AHCT1G
TC7SET
NC7ST
MC74VHC1GT
—
—
74V1GT
74AHCT1G
—
SN74AUC1G
TC7SA/PA
NC7SV
NL17SV
—
—
—
—
—
SN74AUC2G
TC7PA
NC7WV
—
—
—
—
—
—
SN74AUP1G
TC7SG
NC7SP
—
—
—
—
74AUP1G
—
SN74LVC1G
TC7SZ
NC7SZ
NL17SZ
NLU1G
NLX1G
74LX1G
74LVC1G
PI74STX1G
SN74LVC2G
TC7WZ
NC7WZ
NL27WZ
NLU1G
NLX1G
—
74LVC2G
PI74STX2G
SN74LVC3G
TC7WZ
NC7NZ
NL37WZ
NLU1G
NLX1G
—
74LVC3G
—
Little Logic signal switches
SN74AUC2G
TC7PA
—
—
—
—
—
—
—
SN74CBT1G
TC7SB
NC7SZ
—
—
—
—
—
—
SN74CBTD1G
TC7SBD
NC7SZD
—
—
—
—
—
—
SN74CBTLV1G
TC7SBL
—
—
—
—
—
—
—
SN74LVC1G
—
NC7SZ
—
—
—
—
SN74LVC2G
—
NC7WB
—
—
—
—
—
—
74LVC1G
—
Little Logic configurables
SN74AUP1G
—
NC7SP
—
—
—
—
—
—
SN74LVC1G
—
NC7SZ
—
—
—
—
—
—
SN74LVC1T
—
NC7SP
—
—
—
—
—
—
SN74LVC2T
—
NC7SZ
—
—
—
—
—
—
Little Logic translation
NOTE: Visit www.ti.com/littlelogic for product release updates. Information above valid as of April 2012.
Little Logic Guide 22
Texas Instruments 2012
Resources and Support
➔ Resources and Support
e2e.ti.com
Little Logic Guide
23
Texas Instruments 2012
TI Worldwide Technical Support
Internet
TI Semiconductor Product Information Center
Home Page
support.ti.com
TI E2E™ Community Home Page
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Product Information Centers
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