54AC11021, 74AC11021 DUAL 4-INPUT POSITIVE-AND GATES SCAS005B – JULY 1987 – REVISED APRIL 1993 • • • • • 54AC11021 . . . J PACKAGE 74AC11021 . . . D OR N PACKAGE (TOP VIEW) Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs 1B 1A 1Y GND 2Y 2D 2C 1 14 2 13 3 12 4 11 5 10 6 9 7 8 NC 1C 1D VCC 2A 2B NC 54AC11021 . . . FK PACKAGE (TOP VIEW) 1C 1D NC V CC 2A description These devices contain two independent 4-input AND gates. They perform the Boolean functions Y = A • B • C • D or Y = A + B + C + D in positive logic. NC NC 1B NC 1A 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2B NC NC NC 2C 1Y GND NC 2Y 2D The 54AC11021 is characterized for operation over the full military temperature range of – 55°C to 125°C. The 74AC11021 is characterized for operation from – 40°C to 85°C. 4 NC – No internal connection FUNCTION TABLE (each gate) INPUTS A B C D OUTPUT Y H H H H H L X X X L X L X X L X X L X L X X X L L EPIC is a trademark of Texas Instruments Incorporated. Copyright 1993, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–1 54AC11021, 74AC11021 DUAL 4-INPUT POSITIVE-AND GATES SCAS005B – JULY 1987 – REVISED APRIL 1993 logic symbol† 1A 1B 1C 1D 2A 2B 2C 2D 2 logic diagram (positive logic) & 1 13 3 1Y 12 10 9 7 5 2Y 6 1A 1B 1C 1D 2A 2B 2C 2D 2 1 13 12 3 10 9 7 6 5 1Y 2Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 100 mA Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2–2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 54AC11021, 74AC11021 DUAL 4-INPUT POSITIVE-AND GATES SCAS005B – JULY 1987 – REVISED APRIL 1993 recommended operating conditions 54AC11021 VCC Supply voltage VIH VCC = 3 V VCC = 4.5 V High-level input voltage VCC = 5.5 V VCC = 3 V VIL Low-level input voltage VI VO MAX 3 5 5.5 Input transition rise or fall rate TA Operating free-air temperature 3 5 5.5 3.15 UNIT V V 3.85 0.9 0.9 1.35 1.35 1.65 1.65 VCC VCC 0 ∆t /∆v MAX 3.15 VCC = 3 V VCC = 4.5 V Low-level output current NOM 2.1 0 High-level output current MIN 2.1 VCC = 4.5 V VCC = 5.5 V Output voltage IOL NOM 3.85 Input voltage IOH 74AC11021 MIN 0 VCC VCC 0 –4 –4 – 24 – 24 VCC = 5.5 V VCC = 3 V – 24 – 24 12 12 VCC = 4.5 V VCC = 5.5 V 24 24 24 24 V V V mA mA 0 10 0 10 ns/ V – 55 125 – 40 85 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = – 50 µA VOH IOH = – 4 mA IOH = – 24 mA A IOH = – 50 mA† IOH = – 75 mA† TA = 25°C TYP MAX 54AC11021 MIN MAX IOL = 12 mA 74AC11021 MIN 3V 2.9 2.9 2.9 4.5 V 4.4 4.4 4.4 5.5 V 5.4 5.4 5.4 3V 2.58 2.4 2.48 4.5 V 3.94 3.7 3.8 5.5 V 4.94 4.7 4.8 MAX UNIT V 3.85 5.5 V IOL = 24 mA II ICC MIN 5.5 V IOL = 50 µA VOL VCC 3.85 3V 0.1 0.1 0.1 4.5 V 0.1 0.1 0.1 5.5 V 0.1 0.1 0.1 3V 0.36 0.5 0.44 4.5 V 0.36 0.5 0.44 5.5 V 0.36 0.5 0.44 V IOL = 50 mA† IOL = 75 mA† 5.5 V VI = VCC or GND VI = VCC or GND, 5.5 V ± 0.1 ±1 ±1 µA 5.5 V 4 80 40 µA 1.65 5.5 V IO = 0 1.65 Ci VI = VCC or GND 5V 3.5 † Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 pF 2–3 54AC11021, 74AC11021 DUAL 4-INPUT POSITIVE-AND GATES SCAS005B – JULY 1987 – REVISED APRIL 1993 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL Any Y MIN TA = 25°C TYP MAX 54AC11021 74AC11021 MIN MAX MIN MAX 1.5 8.2 11.4 1.5 13.9 1.5 13 1.5 6.4 8.7 1.5 9.9 1.5 9.3 UNIT ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL Any Y MIN TA = 25°C TYP MAX 54AC11021 74AC11021 MIN MAX MIN MAX 1.5 5.6 7.8 1.5 9.4 1.5 8.8 1.5 4.6 6.5 1.5 7.4 1.5 6.9 UNIT ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance per gate CL = 50 pF, f = 1 MHz TYP UNIT 38 pF PARAMETER MEASUREMENT INFORMATION Input (see Note B) From Output Under Test CL = 50 pF (see Note A) VCC 50% 50% 0V tPLH tPHL 500 Ω 50% VCC Output VOH 50% VCC VOL VOLTAGE WAVEFORMS LOAD CIRCUIT NOTES: A. CL includes probe and jig capacitance. B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 2–4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1998, Texas Instruments Incorporated