RF2945 11 433/868/915MHZ FSK/ASK/OOK TRANSCEIVER Typical Applications • Wireless Meter Reading • Wireless Data Transceiver • Keyless Entry Systems • Wireless Security Systems • 433, 868 and 915MHz ISM Band Systems • Battery-Powered Portable Devices Product Description -A- Optimum Technology Matching® Applied TX ENABL 1 GND4 VCO OUT RESNTR+ Si CMOS VCC1 SiGe HBT DATA OUT Si Bi-CMOS VCC3 GaAs MESFET LVLADJ GaAs HBT RX ENABL ü Si BJT 32 31 30 29 28 27 26 25 Control Logic 7 MIX IN 8 Package Style: LQFP-32_5x5 11 • Narrowband and Wideband FSK 23 MOD IN 22 DATA REF • 10dB Cascaded Noise Figure • 10mW Output Power With Power Control 19 IF2 BPLinear RSSI 9 10 11 12 13 14 15 16 IF1 OUT 6 GND3 0.127 20 GND6 IF1 BP- LNA OUT 0.60 + 0.15 0.10 • 2.4V to 5.0V Supply Voltage 21 DEMOD IN LNA IF1 BP+ 5 RSSI 4 IF1 IN RX IN GND1 VBG 3 Dimensions in mm. 7° MAX 0° MIN • 300MHz to 1000MHz Frequency Range PA MIX OUT+ GND2 1.40 + 0.05 5.00 + 0.10 sq. • Fully Monolithic Integrated Transceiver 24 RESNTR- GND5 2 0.50 0.22 + 0.05 Features Gain Control TX OUT 0.15 0.05 Functional Block Diagram Rev A10 000919 18 IF2 BP+ 17 IF2 IN Ordering Information RF2945 RF2945 PCBA-L RF2945 PCBA-M RF2945 PCBA-H 433/868/915MHz FSK/ASK/OOK Transceiver Fully Assembled Evaluation Board (433MHZ) Fully Assembled Evaluation Board (868MHZ) Fully Assembled Evaluation Board (915MHz) RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com 11-215 TRANSCEIVERS The RF2945 is a monolithic integrated circuit intended for use as a low cost FM transceiver. The device is provided in 32-lead plastic LQFP packaging and is designed to be used with a PLL IC to provide a fully functional FM transceiver. The chip is intended for digital (ASK, FSK, OOK) applications in the North American 915MHz ISM band and European 433/868MHz ISM bands. The integrated VCO has a buffered output to feed the RF signal back to the PLL IC to form the frequency synthesizer. Internal decoding of the RX ENABL and TX ENABL lines allow for half duplex operation as well as turning on the VCO to give the synthesizer time to settle and complete power downmode. The DATA REF line allows the use of an external capacitor to control the DC level at the adaptive Data Slicer input for setting the bit decision threshold. 7.00 + 0.20 sq. RF2945 Absolute Maximum Ratings Parameter Ratings Unit Supply Voltage Control Voltages Input RF Level Output Load VSWR Operating Ambient Temperature Storage Temperature -0.5 to +5.5 -0.5 to +5.0 +10 50:1 -40 to +85 -40 to +150 VDC VDC dBm Parameter °C °C Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Specification Min. Typ. Max. Unit 300 to 1000 MHz 300 to 1000 50 -20 -72 -98 MHz Ω dBm dBc/Hz dBc/Hz Condition T=25 °C, VCC =3.6V, Freq=915MHz Overall RF Frequency Range VCO and PLL Section VCO Frequency Range VCO OUT Impedance VCO OUT Level VCO/PLL Phase Noise Freq=915MHz 10kHz offset, 5kHz loop BW 100kHz offset, 5kHz loop BW Transmit Section Max Modulation Frequency Min Modulation Frequency Maximum Power Level Power Control Range Power Control Sensitivity Max FM Deviation TRANSCEIVERS 11 Antenna Port Impedance Antenna Port VSWR Modulation Input Impedance Harmonics Spurious 2 MHz Set by loop filter bandwidth +7 +8.5 1 +3 5 12 10 200 dBm dBm dB dB/V kHz 50 Ω 1.5:1 4 -38 kΩ dBc dBc 300 to 1000 35 23 10 -31 -26 -96 -55 0.5 to 2.5 22.5 80 MHz dB dB dB dBm dBm dBm dBm V mV/dB dB Freq=433MHz Freq=915MHz Instantaneous frequency deviation is inversely proportional with the modulation voltage. Dependent on external circuitry. TX ENABL=“1”, RX ENABL=“0” TX Mode Freq=915MHz, with eval board filter Compliant to Part 15.249 and I-ETS 300 220 Overall Receive Section Frequency Range Cascaded Voltage Gain Cascaded Noise Figure Cascaded Input IP3 RX Sensitivity LO Leakage RSSI DC Output Range RSSI Sensitivity RSSI Dynamic Range 11-216 -91.5 70 Freq=433MHz Freq=915MHz Freq=433MHz Freq=915MHz IF BW =400kHz, Freq=915MHz, S/N=8dB Freq=915MHz RLOAD =51kΩ Rev A10 000919 RF2945 Parameter Specification Min. Typ. Max. Unit 23 16 4.8 5.5 -27 -20 -37 -30 50 dB dB dB dB dBm dBm dBm dBm Ω Condition LNA Voltage Gain Noise Figure Input IP3 Input P1dB Antenna Port Impedance Antenna Port VSWR Output Impedance 1.5:1 Open Collector Ω 8 7 10 17 -21 -17 -31 -28 dB dB dB dB dBm dBm dBm dBm Mixer Conversion Voltage Gain Noise Figure (SSB) Input IP3 Input P1dB 433MHz 915MHz 433MHz 915MHz 433MHz 915MHz 433MHz 915MHz RX ENABL=“1”, TX ENABL=“0” RX Mode 433MHz and 915MHz Single-ended configuration 433MHz 915MHz 433MHz 915MHz 433MHz 915MHz 433MHz 915MHz First IF Section IF Frequency Range Voltage Gain Noise Figure IF1 Input Impedance IF1 Output Impedance 0.1 10.7 34 13 330 330 25 10.7 60 330 1 10 25 MHz dB dB Ω Ω IF=10.7MHz, ZL =330Ω Second IF Section Rev A10 000919 0.1 1.4 0.3 VCC -0.3 MHz dB Ω kΩ kΩ MHz V IF=10.7MHz 11 At IF2 OUT pin 3dB Bandwidth, ZLOAD =1MΩ || 3pF ZLOAD =1MΩ || 3pF. Output voltage is proportional with the instantaneous frequency deviation. 11-217 TRANSCEIVERS IF Frequency Range Voltage Gain IF2 Input Impedance IF2 Output Impedance Demod Input Impedance Data Output Bandwidth Data Output Level RF2945 Parameter Specification Min. Typ. Max. Unit Condition Power Down Control Logical Controls “ON” Logical Controls “OFF” Control Input Impedance Turn On Time Turn Off Time RX to TX and TX to RX Time 2.0 1 1 100 V V Ω ms ms µs 5.0 V V 1.0 25k Voltage supplied to the input Voltage supplied to the input Turn on/off times are dependent upon PLL loop parameters Power Supply Voltage 3.6 2.7 2.4 Current Consumption 17 4.8 4.4 V 22 6.1 6.1 3.6 27.4 7.2 6.8 1 mA mA mA µA mA Specifications Operating limits Temperature range -40°C to +85°C Operating limits Temperature range +10°C to +40°C TX ENABL, LVLADJ=3.6V, RX ENABL=0V TX ENABL=3.6V, LVLADJ, RX ENABL=0V TX ENABL=0V, RX ENABL=3.6V TX ENABL, LVLADJ, RX ENABL=0V PLL Only Mode, TX ENABL, RX ENABL=3.6V, LVLADJ=0V TRANSCEIVERS 11 11-218 Rev A10 000919 RF2945 Pin 1 2 Function TX ENABL TX OUT Description Interface Schematic Enables the transmitter circuits. TX ENABL>2.0V powers up all transmitter functions. TX ENABL<1.0V turns off all transmitter functions except the PLL functions. 20 kΩ TX ENABL 40 kΩ RF output pin for the transmitter electronics. TX OUT output impedance is a low impedance when the transmitter is enabled. TX OUT is a high impedance when the transmitter is disabled. VCC 20 TX OUT 3 GND2 4 RX IN Ground connection for the 40 dB IF limiting amplifier and Tx PA functions. Keep traces physically short and connect immediately to ground plane for best performance. RF input pin for the receiver electronics. RX IN input impedance is a low impedance when the transmitter is enabled. RX IN is a high impedance when the receiver is disabled. RX IN 500 GND1 6 LNA OUT 7 8 GND3 MIX IN 9 GND5 10 MIX OUT 11 VREF IF 12 RSSI Ground connection for RF receiver functions. Keep traces physically short and connect immediately to ground plane for best performance. Output pin for the receiver RF low noise amplifier. This pin is an open collector output and requires an external pull up coil to provide bias and tune the LNA output. A capacitor in series with this output can be used to match the LNA to 50Ω impedance image filters. Same as pin 3. VCC RF input to the RF Mixer. An LC matching network between LNA OUT and MIX IN can be used to connect the LNA output to the RF mixer input in applications where an image filter is not needed or desired. GND5 is the ground connection shared by the input stage of the transmit power amplifier and the receiver RF mixer. IF output from the RF mixer. Interfaces directly to 10.7MHz ceramic IF filters as shown in the application schematic. A pull-up inductor and series matching capacitor should be used to present a 330Ω termination impedance to the ceramic filter. Alternately, an IF tank can be used to tailor the IF frequency and bandwidth to meet the needs of a given application. DC voltage reference for the IF limiting amplifiers. A 10nF capacitor from this pin to ground is required. A DC voltage proportional to the received signal strength is output from this pin. The output voltage range is 0.5V to 2.3V and increases with increasing signal strength. LNA OUT MIX IN GND5 11 MIX OUT 15 pF GND5 15 pF GND5 . VCC RSSI 13 IF1 IN IF input to the 40dB limiting amplifier strip. A 10nF DC blocking capacitor is required on this input. IF1 BP+ 60 kΩ 330 IF1 BP60 kΩ 330 IF1 IN Rev A10 000919 11-219 TRANSCEIVERS 5 RF2945 Pin 14 Function IF1 BP+ 15 IF1 BP- 16 IF1 OUT 17 IF2 IN Description Interface Schematic DC feedback node for the 40dB limiting amplifier strip. A 10nF bypass capacitor from this pin to ground is required. Same as pin 14. See pin 13. See pin 13. IF output from the 40dB limiting amplifier. The IF1 OUT output presents a nominal 330 Ω output resistance and interfaces directly to 10.7MHz ceramic filters. IF1 OUT IF input to the 60dB limiting amplifier strip. A 10nF DC blocking capacitor is required on this input. The IF2 IN input presents a nominal 330 Ω input resistance and interfaces directly to 10.7MHz ceramic filters. IF2 BP+ 60 kΩ IF2 BP60 kΩ 330 330 IF2 IN 18 IF2 BP+ 19 20 IF2 BPGND6 21 DEMOD IN 22 DATA REF TRANSCEIVERS 11 23 MOD IN 24 RESNTR+ DC feedback node for the 60dB limiting amplifier strip. A 10nF bypass capacitor from this pin to ground is required. Same as pin 18. Ground connection for 60dB IF limiting amplifier. Keep traces physically short and connect immediately to ground plane for best performance. This pin is the input to the FM demodulator. This pin is NOT AC coupled. Therefore, a DC blocking capacitor is required on this pin to avoid shorting the demodulator input with the LC tank. A ceramic discriminator or DC blocked LC tank resonant at the IF should be connected to this pin. This pin is used for setting the adaptive Data Slicer DC reference level. A capacitor from this pin to ground can be used to set the reference level at the average DC level of the data bit stream.The DC level determines the bit decision threshold. See pin 17. See pin 17. VCC 10 kΩ DEMOD IN 50kΩ DATA REF FM analog or digital modulation can be imparted to the VCO through See pin 24. this pin. The VCO varies in accordance to the voltage level presented to this pin. To set the deviation to a desired level, a voltage divider referenced to Vcc is the recommended. This deviation is also dependent upon the overall capacitance of the external resonant circuit. This port is used to supply DC voltage to the VCO as well as to tune the RESNTR+ center frequency of the VCO. Equal value inductors should be connected to this pin and pin 25 although a small imbalance can be used to tune in the proper frequency range. RESNTR- 4 kΩ MOD IN 25 26 RESNTRVCO OUT See RESNTR+ description. See pin 24. This pin is used is supply a buffered VCO output to go to the PLL chip. This pin has a DC bias and needs to be AC coupled. VCO OUT 27 11-220 GND4 GND4 is the ground shared on chip by the VCO, prescaler, and PLL electronics. Rev A10 000919 RF2945 Function VCC1 29 DATA OUT 30 VCC3 31 LVL ADJ Description Interface Schematic This pin is used to supply DC bias to the LNA, Mixer, 1st IF Amp and Bandgap reference. A RF bypass capacitor should be connected directly to this pin and returned to ground. A 22pF capacitor is recommended for 915MHz applications. A 68 pF capacitor is recommended for 433MHz applications. Demodulated data output from the demodulator. Output levels on this are TTL/CMOS compatible. The magnitude of the load impedance is intended to be 1MΩ or greater. DATA OUT This pin is used to supply DC bias and collector current to the transmitter PA. It also supplies voltage to the 2nd IF Amplifier, Demod and data slicer. A RF bypass capacitor should be connected directly to this pin and returned to ground. A 22pF capacitor is recommended for 915MHz applications. A 68pF capacitor is recommended for 433MHz applications. This pin is used to vary the transmitter output power. An output level adjustment range greater than 12dB is provided through analog voltage control of this pin. DC current of the transmitter power amp ia also reduced with output power. NOTE: This pin MUST be low when the transmitter is disabled. 40 kΩ LVL ADJ 400 32 RX ENABL Operation Mode Sleep Mode Transmit Mode Receive Mode PLL Lock Enable pin for the receiver circuits. RX ENABL>2.0V powers up all receiver functions. RX ENABL<1.0V turns off all receiver functions except the PLL functions and the RF mixer. TX ENABL RX ENABL Low High Low High Low Low High High 4 kΩ 50 kΩ RX ENABL Function Entire chip is powered down. Total current consumption is <1µA. * Transmitter, VCO are on. Receiver, VCO are on. * VCO is on. This mode allows time for a synthesizer loop to lock without spending current on the transmitter or receiver. * LVL ADJ pin must be low to disable transmitter. Rev A10 000919 11-221 11 TRANSCEIVERS Pin 28 RF2945 RF2945 Theory of Operation and Application Information The RF2945 is part of a family of low-power RF transceiver IC’s that was developed for wireless data communication devices operating in the European 433MHz to 868MHz ISM band, and 915MHz U.S. ISM band. This IC has been implemented in a 15GHz silicon bipolar process technology that allows low-power transceiver operation in a variety of commercial wireless products. TRANSCEIVERS 11 In its basic form, the RF2945 can be implemented as a two-way half-duplex FSK transceiver with the addition of some crystals, filters, and passive components. The RF2945 is designed to interface with common PLL IC’s to form a multi-channel radio. The receiver IF section is optimized to interface with low-cost 10.7MHz ceramic filters and has a 3dB bandwidth of 25MHz and can still be used (with lower gain) at higher frequencies with other types of filters. The PA output and LNA input are available on separate pins and are designed to be connected together through a DC blocking capacitor. In the transmit mode, the PA will have a 50Ω impedance and the LNA will have a high impedance. In the receive mode, the LNA will have a 50Ω impedance and the PA will have a high impedance. This eliminates the need for a TX/RX switch, and allows for a single RF filter to be used in transmit and receive modes. Separate access to the PA and LNA allows the RF2945 to interface with external components such as a high power PA, lower NF LNA, upconverters, and downconverters, for a variety of implementations. FM/FSK SYSTEMS The MOD IN pin drives an internal varactor for modulating the VCO. This pin can be driven with a voltage level needed to generate the desired deviation. This voltage can be carried on a DC bias to select desired slope (deviation/volt) for FM systems. Or, a resistor divider network referenced to VCC or ground can divide down logic level signals to the appropriate level for a desired deviation in FSK systems. On the receiver demod, the DATA OUT pin is the output of an internal data slicer providing logic level outputs. The digital output is generated by a data slicer that compares the demodulator with a DC reference voltage recovered from the demodulator. The reference voltage is obtained by a filter capacitor on pin 22. An on-chip 1.6MHz RC filter is provided at the demodulator output to filter the undesirable 2xIF product. This type data slicer has the ability to track out minor frequency errors in the system, but requires a longer period of time for the preamble for optimum results. For 11-222 best operation of the on-chip data slicer, FM deviation needs to be larger than 40kHzP-P. The data slicer itself is a transconductance amplifier, and the DATA OUT pin is capable of driving rail-to-rail output only into a very high impedance and a small capacitance. The amount of capacitance will determine the bandwidth of DATA OUT. In a 3pF load, the bandwidth is in excess of 500kHz. The rail-to-rail output of the data slicer is also limited by the frequency deviation and bandwidth of IF filters. With the 400kHz bandwidth filters on the evaluation boards, the rail-to-rail output is limited to less than 320kHz. Choosing the right IF bandwidth and deviation versus data rate (mod index) is important in evaluating the applicability of the RF2945 for a given data rate. The primary consideration when directly modulating the VCO is the data rate versus PLL bandwidth. The PLL will track out the modulation to the extent of its bandwidth, which distorts the modulating data. Therefore, the lower frequency components of the modulating data should be five to 10 times the loop bandwidth to minimize the distortion. The lower frequency components are generated by long strings of 1’s and 0’s in data stream. By limiting the number of consecutive, same bits, lower frequency components can be set. In addition, the data stream should be balanced to minimize distortion. Using a coding pattern such as Manchester is highly recommended to optimize system performance. The PLL loop bandwidth is important in several system parameters. For example, switching from transmit to receive requires the VCO to retune to another frequency. The switching speed is proportional to the loop bandwidth: the higher the loop bandwidth, the faster the switching times. Phase noise of the VCO is another factor. Phase noise outside the bandwidth is because of the VCO itself, rather than a crystal reference. The design trade-offs must be made here in selecting a PLL loop bandwidth with acceptable phase noise and switching characteristics, as well as minimal distortion of the modulation data. ASK/OOK SYSTEMS The transmitter of the RF2945 has an output power level adjust (LVL ADJ) that can be used to provide approximately 18dB of power control for amplitude modulation. The RSSI output of the receiver section can be used to recover the modulation. The RSSI output is from a current source, and needs to have a resisRev A10 000919 RF2945 The VCO is a very sensitive block in the system. RF signals feeding back into the VCO (either radiated or coupled by traces) may cause the PLL to become unlocked. The trace(s) for the anode of the tuning varactor should also be kept short. The layout of the resonator and varactor are very important. The capacitor and varactor should be close to the RF2945 pins, and Rev A10 000919 VCC 24 23 Not to Scale Representative of Size Figure 1. Recommended VCO Layout For the interface between the LNA/mixer, the coupling capacitor should be as close to the RF2945 pins as possible, with the bias inductors further away. Once again, the value of the inductor may be changed to compensate for trace inductance. The output impedance of the LNA is in the order of several kΩ, which makes matching to 50Ω very difficult. If image filtering is desired, a high impedance filter is recommended. The quad tank of the discriminator may be implemented with ceramic discriminator available from a couple of sources. This design works well for wideband applications where temperature range is limited. The temperature coefficient of ceramic discriminators may be in the order of +50ppm/°C. The alternative to the ceramic discriminator is the LC tank, which provides a broadband discriminator more useful for high data rates. 11-223 11 TRANSCEIVERS APPLICATION AND LAYOUT CONSIDERATIONS Both the RX IN and the TX OUT have a DC bias on them. Therefore, a DC blocking cap is required. If the RF filter has DC blocking characteristics (such as a ceramic dielectric filter), then only one DC blocking cap would be needed to separate the DC of the RX and TX. These are RF signals and care should be taken to run the signal keeping them physically short. Because of the 50Ω/high impedance nature of these two signals, they may be connected together into a single 50Ω device (such as a filter). An external LNA or PA may be used, if desired, but an external RX/TX switch may be required. Loop Voltage 25 For the ASK/OOK receiver demodulator, an external data slicer is required. The RSSI output is used to provide both the filter data and a very low pass filter (relative to the data rate) DC reference to the data slicer. Because the very low pass filter has a slow time constant, a longer preamble may be required to allow for the DC reference to acquire a stable state. Here, as in the case of the FSK transmitter, the data pattern also affects the DC reference and the reliability of the receive data. Again, a coding scheme such as Manchester should be used to improve data integrity. the trace length should be as short as possible. The inductors may be placed further away, and reducing the value of the inductors can compensate any trace inductance. Printed inductors may also be used with careful design. For best results, physical layout should be as symmetrical as possible. Figure 1 is a recommended layout pattern for the VCO components. When using the loop bandwidth lower than 5kHz shown on the evaluation board, better filtering of the VCC at the resonators (and lower VCC noise, as well) will help reduce phase noise of the VCO. A series resistor of 100Ω to 200Ω, and a 1µF or larger capacitor may be used. 26 tor to convert to a voltage. A 51kΩ resistor load typically produces an output of 0.7V to 2.5V. A parallel capacitor is suggested to band limit the signal. For ASK applications, the 18dB range of the LVL ADJ does not produce enough voltage swing in the RSSI for reliable communications. The on/off keying (OOK) is suggested to provide reliable communications. To achieve this, the LVL ADJ and TX ENABL need to be controlled together (please note that LVL ADJ cannot be left high when TX ENABL is low). This will provide an on/off ratio of greater than 50dB. One of the unfortunate consequences of modulating in this manner is VCO pulling by the PA. This results in a spurious output outside the desired transmit band, as the PLL momentarily loses lock and reacquires. This may be avoided by pulse-shaping TX data to slow the change in the VCO load to a pace which the PLL can track with its given loop bandwidth. The loop bandwidth may also be increased to allow it to track faster changes brought about by load pulling. RF2945 PLL Synthesizer The RF2945 evaluation board uses an LMX2316 PLL IC from National Semiconductor. This PLL IC may be programmed from the software available from National Semiconductor (codeloader at www.national.com/ appinfo/wireless/). An external reference oscillator is required for the PLL IC allowing for the evaluation of different reference frequencies or step sizes. The National Semiconductor software also has a calculator for determining the R and C component values for a given loop bandwidth. The RF2945 is controlled by RX ENABL and TX ENABL which are decoded to put the RF2945 into one of four states. It may be put into a PLL-only mode with TX ENABL and RX ENABL both high. This condition is used to provide time for the synthesizer to turn on and obtain lock before turning on the receiver or transmitter. Note that LVL ADJ needs to be held low for PLLonly mode. Sometimes, it is desirable to ramp up the power amplifier to minimize load pulling on the VCO. To do this with the RF2945, first put the RF2945 into PLL mode by putting TX ENABL and RX ENABL high. Then, ramp up LVL ADJ to turn on the transmitter and PA. The rate at which LVL ADJ is allowed to ramp up is dependent on the PLL loop bandwidth. VCC pushing also affects the VCO frequency. A good low pass filter on VCC will minimize the VCC pushing effects. TRANSCEIVERS 11 For applications requiring fast switching speeds or turn-on times, and low data rate loop filter bandwidths, the LMX2316 may be configured to drive the loop filter in a fast switching mode. Please refer to literature on the LMX2316 for more information. 11-224 Rev A10 000919 RF2945 RX ENABL LVL ADJ VCC3 DATA OUT VCC1 GND4 VCO OUT RESNTR- Pin Out 32 31 30 29 28 27 26 25 GND2 3 22 DATA REF RX IN 4 21 DEMOD IN GND1 5 20 GND6 LNA OUT 6 19 IF2 BP- GND3 7 18 IF2 BP+ MIX IN 8 17 IF2 IN 9 10 11 12 13 14 15 16 IF1 OUT MOD IN IF1 BP- 23 IF1 BP+ 2 IF1 IN TX OUT RSSI RESNTR+ VREF IF 24 MIX OUT 1 GND5 TX ENABL TRANSCEIVERS 11 Rev A10 000919 11-225 RF2945 Application Schematic - 915 MHz VCC VCC 10 Ω 10 nF 10 nF 22 pF 22 pF 10 kΩ PLL IC 10 Ω 4.7 nF 33 pF 330 pF TBD 10 kΩ 100 Ω 30 kΩ VCC DATA OUT LVL ADJ RX ENABL 2 pF 32 TX ENABL 1 31 30 29 28 27 26 8.2 nH 100 Ω 25 D1 SMV1233011 Control Logic 24 8.2 nH 22 pF 10 nF Gain Control 100 pF 2 915 MHz SAW PA 23 MOD IN TBD 3 22 4 21 100 pF VCC 5 10 Ω 20 LNA FM Disc. 10 nH 6 10 nF 22 pF 1.5 kΩ 10 nF 19 10 nF Linear RSSI 7 18 10 pF 10 nF 8 17 9 10 11 12 13 14 10 nF 15 16 10 nF Filter VCC 8.2 uH RSSI 10 Ω 11 pF 10 nF 22 pF Filter 51 kΩ 10 pF TRANSCEIVERS 11 11-226 Rev A10 000919 RF2945 Application Schematic - 915 MHz IF=25MHz, BW=2MHz VCC2 R4 100 Ω C81 4.7 uF C18 0.1 uF C17 22 pF VPLL R11 10 Ω C33 0.1 uF C32 22 pF C16 2 pF R1 10 Ω C2 0.1 uF D1 SMV1233-011 C1 22 pF C48 4.7 nF R14 10 kΩ R12* 100 Ω CPo VCC2 15 3 GND Fo/LD C47 330 pF 14 4 GND LE 13 5 fINb Data 12 6 fIN Clock 11 7 VCC1 CE 10 9 16 2 6 1 8 C4 22 pF Vp 7 C3 0.1 uF FLo 4 C82 4.7 uF R13 30 kΩ 3 + L2 8.2 nH 2 C29 4.7 uF L3 8.2 nH 1 + R2 10 Ω 5 P6 DB9 VPLL/VCC2 DATA OUT C50 22 pF LVL ADJ RX ENABL 32 TX ENABL 1 L1 8.2 nH R80 0Ω C9 4 pF C8 4 pF 30 29 28 27 26 25 Control Logic R60 0Ω C43 0.1 uF 50 Ω µstrip 2 23 3 22 4 R7 10 Ω Linear RSSI 17 9 10 11 12 C10 10 nF 13 14 C12 10 nF 15 C13 10 nF C54 10 pF L5 680 nH C26 0.1 uF C53 47 pF C25 22 pF C57 100 pF C27 39 pF C24 5 pF C55 39 pF L11 680 nH C14 10 nF C31 39 pF J5 REF OSC C20 10 nF C15 10 nF P1-1 C52 10 pF C56 3 pF L10 680 nH C59 47 pF L9 680 nH C11 10 pF LVL ADJ VCC1 2 GND 2 GND 3 N/C P3-1 RSSI 2 GND P7-1 P7-3 1 TX ENABL 2 GND 3 RX ENABL CON3 P8 P7 1 CON2 P3-1 CON3 P4 P4-1 1 1 CON2 RSS I R3 51 kΩ P3 P2 P2-1 P1 16 VCC R9 10 Ω L8 680 nH 18 8 R24 27 kΩ 50 Ω µstrip C51* 4-22 pF 19 7 C21 10 pF R6* N/C C22 22 pF R28 12 kΩ R27 12 kΩ R30 51 Ω 20 LNA R29 12 kΩ R25 27 kΩ LMX2316 J4 MOD IN C19 2.2 nF 21 5 R26 27 kΩ VPLL 8 OSCin GND 9 C34 1 nF PA C7 22 pF C30* 4 pF C5 4.7 uF C44 22 pF 24 6 + VPLL 50 Ω µstrip L4 10 nH C23 0.1 uF C41 100 pF Gain Control C6 22 pF J2 RF 31 L7* TBD 1 VCC2 1 RX OUT 2 GND 2 GND 3 VPLL CON2 P8-1 CON3 TRANSCEIVERS 11 Rev A10 000919 11-227 RF2945 Evaluation Board Schematic - 915MHz (Download Bill of Materials from www.rfmd.com.) R2 10 Ω C3 0.1 uF C4 22 pF R13 1.2k Ω R1 10 Ω C2 0.1 uF C1 22 pF C42 0.1 uF R12 100 Ω R14 10 kΩ C47 6.8nF C49 TBD J1 RX OUT 32 Gain Control 23 PA 3 LNA 5 20 C22 22 pF C19 2.2 nF 10 11 12 13 14 C10 10nF VCC1 C24 11 pF CAPVAR L8 4.7 uH C31 39 pF R60 0Ω L7* TBD C58* 10 nF J4 VPLL MOD IN R5* 4.3 kΩ FD/LD 14 4 GND 5 fNb DATA 12 6 fIN CLK 11 7 Vcc1 8 OSCin RSSI F1 SFE10.7MA21 C11 10 pF R84 0Ω C27* 10 nF C57* 100 pF C28* 120 pF LMX2316 C32 22 pF C33 0.1 uF LE 13 C34 1 nF CE 10 GND 9 U4 CDF 107BA0-001 10.7 MHz C20 10 nF C15 10 nF C43 .01 uF C44 22 pF J5 REF OSC R30 51 Ω P6 DB9 C14 10 nF R86 0Ω 16 C13 10nF R3 51 kΩ L11* C56* 680 nH 330 pF * Denotes components that are normally depopulated. 15 C12 10nF R83 0Ω C55* 100 pF R82* 560 Ω R87* 0Ω R88 0Ω BW=400 kHz 10.7 MHz 9 R8 8.2 kΩ Vcc2 15 GND R27 12 kΩ 5 17 L5 6.8 uH C25 22 pF CPD 3 18 8 C26 0.1 uF 2 19 Linear RSSI 7 R6* N/C C21 10 pF R29 12 kΩ F2 SFE10.7MA21 C54* 100 pF C53* 330 pF R28 12 kΩ R85 0Ω R24 27 kΩ R25 27 kΩ R26 27 kΩ C52* 100 pF L10* 680 nH P1 R81* 560 Ω P1-1 2945400B 1 VCC (RF2945) 2 GND 3 VPLL (LMX2315) P3 P1-3 1 GND L6* 2.2 uH P3-2 2 TX ENABL P3-3 3 RX ENABL J3 MIX OUT P3-4 4 NC P3-5 5 NC P2 P2-1 P2-3 1 LVL ADJ 2 GND 3 NC P4 P4-1 1 RSSI 2 GND TRANSCEIVERS 11 L2 8.2 nH C51* 21 6 R9 10 Ω C16 2 pF 22 4 C7 22 pF R7 10 Ω C23 0.1 µf SMV1233 -011 24 Vp 16 C17 22 pF D1 25 50 Ω µstrip C30* 5 pF L4 12 nH VCC 26 FLD 9 R80 0Ω C8 5 pF 27 8 C9 5 pF 28 7 L1 8.2 nH 2 29 1 4 C6 22 pF Control Logic 1 30 6 J2 RF TX ENABL 31 C41 100 pF L3 C18 0.1 uF 8.2 nH 2 P3-2 R4 100 Ω C81 4.7 uF VCC C50 22 pF LVL ADJ RX ENABL 1 P2-1 P3-3 VPLL PLL LOOP BW ~5 kHz 3 VCC 11-228 Rev A10 000919 RF2945 Evaluation Board Schematic - 433MHz VC C R1 10 Ω C2 0.1µF C3 0.1µF C1 22 pF C4 22 pF R 13 4.7 kΩ R2 VC 10 Ω C V P LL P LL LO O P B W ~5 kH z R 12* 100 Ω C 42 33 nF C 49 220 pF J1 RX OUT RX ENABL 27 1 2 C7 100 pF 24 23 PA 3 22 4 21 LN A 5 20 C 22 100 pF C 23 0.1 µF 17 C 21 33 pF 10 C 25 R8 100 pF 8.2 kΩ C 24 12 pF 12 R3 51 kΩ F1 S F E 1 0 .7 M A 2 1 L11* C 56* 680 nH 330 pF 15 C 27* 10 nF C 57* 100 pF R 87* 0Ω L8 4.7 uH 3 -1 0 p F C 31 39 pF C 58* 10 nF J4 V P LL M O D IN GND 4 GND 5 fN b 6 fIN 7 V cc1 8 O S C in C 34 1nF C 11 10 pF R 5* 4.3 kΩ C DF 1 0 7 BA 0-0 01 1 0 .7 M Hz C 43 .01 uF C 44 22 pF C 33 0.1 uF F D /LD 14 LM X 2316 LE 13 D A T A 12 C LK 11 C E 10 G ND 9 J5 REF OSC R 30 51 Ω P6 D B9 C 14 10 nF R 27 12 kΩ R 28 12 k Ω R 29 12 k Ω F2 S F E 1 0 .7 M A 2 1 C 54* 100 pF C 53* 330 pF C 32 22 pF U4 C 20 10 nF C 15 10 nF R 60 0Ω L7* TBD R 88 0Ω R 86 0Ω 16 C 13 10 nF R 84 0Ω C 28* 120 pF R 85 0Ω R 24 27 kΩ R 25 27 kΩ R 26 27 kΩ C 52* 100 pF L10* 680 nH P1 R 81* 560 Ω P 1-1 2 94 5 4 0 1 - 1 V C C (R F 2945) 2 G ND 3 V P LL (LM X 2315) P3 P 1-3 1 G ND L6* 2.2 uH P 3-2 2 P 3-3 3 RX ENABL J3 M IX O U T P 3-4 4 NC P 3-5 5 NC TX ENABL P2 P 2-1 P 2-3 1 LV L A D J 2 G ND 3 NC P4 P 4-1 1 RSSI 2 G ND 11 TRANSCEIVERS * D enotes c om ponents that are norm ally depopulated. 13 14 C 12 10 nF RSSI R 83 0Ω C 55* 100 pF R 82* 560 Ω 11 C 10 10nF VC C1 C 26 0.1 uF L2 12 nH C 19 2.2 nF B W = 4 0 0 kH z 1 0 .7 M H z 9 3 18 8 L5 6.8 uH R9 10 Ω V cc2 15 19 Linear RSSI 7 R 6* N /C R7 10 Ω C 16 10 pF C 51* 6 C S M V12 35 -0 1 1 G ain C ontrol CPD 5 C6 100 pF C ontrol Logic C 17 100 pF D1 25 TX ENABL L4 47 nH VC 26 2 9 C 30 8 pF 28 V p 16 4 C8 15 pF 29 6 C9 8 pF L9 22 nH 30 8 J2 RF L1 22 nH 31 C 41 100pF 7 32 P 3-2 L3 C 18 0.1 uF 12 nH 3 LV L A D J F LD R 4 100 Ω C 81 4.7 uF C 2 P 3-3 VC C 50 100 pF 1 P 2-1 C 47 2.2 nF R 14 20 kΩ 1 Rev A10 000919 11-229 RF2945 Evaluation Board Schematic - 868MHz R2 10 Ω C3 0.1 uF C4 47 pF VPLL R13 30 kΩ R1 10 Ω PLL LOOP BW ~5 kHz C2 0.1 uF C1 47 pF C49* TBD J1 RX OUT 32 31 30 29 28 27 26 L3 C18 0.1 uF 8.2 nH 50 Ω µstrip C30* 5 pF C7 47 pF 4 21 LNA 5 20 6 17 9 L5 8.2 uH 10 11 C10 10 nF 12 13 14 C12 10 nF R8 8.2 kΩ C24 12 pF 16 C13 10 nF RSSI R83 0Ω C55* 100 pF R82* 560 Ω L8 4.7 uH C31 39 pF R5* 4.3 kΩ C34 1 nF VCC2 15 GND F0/LD 14 4 GND 5 fINb 6 fIN 7 VCC1 CE 10 8 OSCin GND 9 F1 SFE10.7MA21 L11* C56* 680 nH 330 pF R84 0Ω C57* 100 pF C28* 120 pF * Denotes components that are normally depopulated. R3 51 kΩ C27* 10 nF LMX2316 C11 10 pF CDF 107BA0-001 10.7 MHz C43 .01 uF C44 47 pF C32 47 pF C33 0.1 uF LE 13 DATA 12 CLK 11 J5 REF OSC R30 51 Ω P6 DB9 C14 10 nF R27 12 kΩ R28 12 kΩ R29 12 kΩ F2 SFE10.7MA21 C54* 100 pF C53* 330 pF R11 10 Ω U4 C20 10 nF C15 10 nF R86 0Ω 15 VCC1 C25 47 pF CAPVAR BW=400 kHz 10.7 MHz C21 9 pF R85 0Ω R24 27 kΩ R25 27 kΩ R26 27 kΩ C52* 100 pF L10* 680 nH P1 R81* 560 Ω P1-1 2945402- 1 VCC (RF2945) 2 GND 3 VPLL (LMX2315) P3 P1-3 1 GND L6* 2.2 uH P3-2 2 TX ENABL P3-3 3 RX ENABL J3 MIX OUT P3-4 4 NC P3-5 5 NC P2 P2-1 P2-3 1 LVL ADJ 2 GND 3 NC P4 P4-1 1 RSSI 2 GND TRANSCEIVERS 11 R88 0Ω CP0 3 18 8 C26 0.1 uF J4 VPLL MOD IN 2 19 Linear RSSI 7 R6* N/C C22 47 pF R9 10 Ω C19 2.2 nF L7* TBD C58* 10 nF Vp 16 5 R7 10 Ω C23 0.1 µf 22 C51* L4 12 nH VCC 3 R87* 0Ω FL0 9 R80 0Ω C8 5 pF 23 L2 8.2 nH 8 C9 5 pF Gain Control PA C16 3 pF R60 0Ω 7 L1 8.2 nH 24 6 J2 RF 2 C41 47 pF SMV1233 -011 1 4 C6 47 pF Control Logic 1 C17 47 pF D1 25 TX ENABL 2 P3-2 R4 100 Ω C81 4.7 uF VCC C50 47 pF LVL ADJ RX ENABL C47 330 pF R14 10 kΩ 1 P2-1 P3-3 R12 100 Ω C48 4.7 nF 3 VCC 11-230 Rev A10 000919 RF2945 Evaluation Board Layout - 915MHz Board Size 3.050” x 3.050” Board Thickness 0.031”, Board Material FR-4 TRANSCEIVERS 11 Rev A10 000919 11-231 RF2945 TRANSCEIVERS 11 11-232 Rev A10 000919 RF2945 Evaluation Board Layout - 433MHz TRANSCEIVERS 11 Rev A10 000919 11-233 RF2945 TRANSCEIVERS 11 11-234 Rev A10 000919 RF2945 Evaluation Board Layout - 868MHz TRANSCEIVERS 11 Rev A10 000919 11-235 RF2945 TRANSCEIVERS 11 11-236 Rev A10 000919 RF2945 RSSI Output versus Temperature VCC = 2.4 V, 915 MHz 2.5 POUT versus Level Control and VCC 915 MHz and Temperature = 25°C 10.0 -40C 10C 25C 40C 85C 2.0 1.5 POUT (dBm) 1.0 -10.0 Vcc=2.4V Vcc=2.7V Vcc=3.0V Vcc=3.3V Vcc=3.6V Vcc=3.9V Vcc=4.2V Vcc=4.5V Vcc=4.8V -20.0 0.5 0.0 -130.0 -30.0 -110.0 -90.0 -70.0 -50.0 -30.0 -10.0 10.0 0.0 1.0 2.0 Received Signal Strength (dBm) TX Power Output and ICC versus Level Adjust at 433MHz, 3.6V VCC 10.0 30.0 5.0 -5.0 15.0 -10.0 1.0 1.5 2.0 2.5 3.0 3.5 25.0 -5.0 20.0 -10.0 15.0 10.0 -15.0 10.0 11 5.0 -20.0 5.0 TRANSCEIVERS 20.0 -15.0 0.0 RF P 0 (dBm) 0.0 4.0 0.0 1.0 1.5 2.0 2.5 3.0 LVL ADJ (V) TX Power Output and ICC versus Level Adjust at 905MHz, 3.6V VCC Receive Current versus VCC (Excluding PLL IC) 30.0 9.0 Icc (905) -5.0 20.0 7.0 -10.0 15.0 6.0 -15.0 10.0 5.0 5.0 4.0 -20.0 1.5 2.0 LVL ADJ (V) Rev A10 000919 2.5 3.0 3.5 4.0 ICC (mA) 8.0 ICC (mA) 25.0 1.0 4.0 Icc (868) 0.0 0.5 3.5 Icc (433) Icc(905) RF P 0 (dBm) 0.5 LVL ADJ (V) Pout(905) 0.0 30.0 Icc(868) 25.0 ICC (mA) RF P 0 (dBm) Icc(433) 5.0 5.0 Pout(868) 5.0 0.5 4.0 TX Power Output and ICC versus Level Adjust at 868MHz, 3.6V VCC Pout(433) 0.0 3.0 Level Control (V) ICC (mA) RSSI Output (V) 0.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Supply Voltage (V) 11-237 RF2945 TRANSCEIVERS 11 11-238 Rev A10 000919