TI TXS0206AYFPR

TXS0206A
www.ti.com
SCES833A – NOVEMBER 2011 – REVISED MAY 2012
SD CARD VOLTAGE-TRANSLATION TRANSCEIVER
Check for Samples: TXS0206A
FEATURES
1
•
•
YFP PACKAGE
(TOP VIEW)
Level Translator
– VCCA and VCCB Range of 1.1 V to 3.6 V
– Fast Propagation Delay (4.4 ns Max When
Translating Between 1.8 V and 3 V)
ESD Protection Exceeds JESD 22
– 2500-V Human-Body Model (A114-B)
– 250-V Machine Model (A115-A)
– 1500-V Charged-Device Model (C101)
1 2 3 4
A
B
C
D
E
TERMINAL ASSIGNMENTS
1
2
3
4
A
DAT2A
VCCA
WP
DAT2B
B
DAT3A
CD
VCCB
DAT3B
C
CMDA
GND
GND
CMDB
D
DAT0A
CLKA
CLKB
DAT0B
E
DAT1A
CLK-f
EN
DAT1B
DESCRIPTION/ORDERING INFORMATION
The TXS0206A is a level shifter for interfacing microprocessors with MultiMediaCards (MMCs), secure digital
(SD) cards, and Memory Stick™ cards.
The voltage-level translator has two supply voltage pins. VCCA as well as VCCB can be operated over the full
range of 1.1 V to 3.6 V. The TXS0206A enables system designers to easily interface applications processors or
digital basebands to memory cards and SDIO peripherals operating at a different I/O voltage level.
The TXS0206A is offered in a 20-bump wafer chip scale package (WCSP). This package has dimensions of 1.96
mm × 1.56 mm, with a 0.4-mm ball pitch for effective board-space savings. Memory cards are widely used in
mobile phones, PDAs, digital cameras, personal media players, camcorders, set-top boxes, etc. Low static power
consumption and small package size make the TXS0206A an ideal choice for these applications.
ORDERING INFORMATION (1)
TA
–40°C to 85°C
(1)
(2)
PACKAGE (2)
WCSP – YFP (Pb-free)
Tape and reel
ORDERABLE PART NUMBER
TXS0206AYFPR
TOP-SIDE MARKING
BTR
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011–2012, Texas Instruments Incorporated
TXS0206A
SCES833A – NOVEMBER 2011 – REVISED MAY 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
REFERENCE CIRCUIT
VCCA
VCCB
C3
0.1 µF
U1A
VCCB
C4
0.1 µF
C1
0.1 µF
J1
U2
A2
VDDA
D1
DAT0
E1
A1
DAT1
DAT2
B1
DAT3
C1
CMD
D2
CLK
E2
CLKin
C2
GND
CD
C3
VCCA
VCCB
DAT0A
DAT1A
DAT2A
DAT3A
CMDA
B3
D4 DAT0B
DAT0B
DAT1B E4 DAT1B
DAT2B A4 DAT2B
DAT3B B4 DAT3B
C4 CMDB
CMDB
D3 CLKB
CLKB
CLKA
CLK-f
DAT2B
DAT3B
CMDB
CLKB
DAT0B
DAT1B
Processor
SD/SDIO MMC
CD
DAT2
DAT3
CMD
VSS1
VDD
CLK
VSS2
DAT0
DAT1
10
CD (Physical)
11
GND
12
GND
CD
GND
GND
0
1
2
3
4
5
6
7
8
B2 CD
54794-0978
Micro SD
TXS0206A
Figure 1. Interfacing With SD/SDIO Card
VCCA
VCCB
C3
0.1 µF
U1A
VCCB
C4
0.1 µF
C1
0.1 µF
J1
U2
VDDA
DAT0
DAT1
DAT2
DAT3
CMD
CLK
CLKin
GND
CD
A2
D1
E1
A1
B1
C1
D2
E2
C2
C3
VCCA
VCCB
DAT0A
DAT1A
DAT2A
DAT3A
CMDA
CLKA
CLK-f
DAT2B
DAT3B
CMDB
B3
D4 DAT0B
DAT0B
DAT1B E4 DAT1B
DAT2B A4 DAT2B
DAT3B B4 DAT3B
C4 CMDB
CMDB
D3 CLKB
CLKB
CLKB
DAT0B
DAT1B
CD
B2 CD
WP
Processor
SD/SDIO MMC
DAT2
DAT3
CMD
VSS1
VDD
CLK
VSS2
DAT0
DAT1
10
CD (Physical)
11
GND
12
GND
14 WP (Physical)
CD
GND
GND
0
1
2
3
4
5
6
7
8
Standard SD Card
TXS0206A
VCCA
Figure 2. Interfacing With Seperate WP and CD Pin
2
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SCES833A – NOVEMBER 2011 – REVISED MAY 2012
VCCA
VCCB
C3
0.1 µF
U1A
VCCB
C4
0.1 µF
C1
0.1 µF
U2
A2
VDDA
D1
DAT0
E1
A1
DAT1
DAT2
B1
DAT3
C1
CMD
D2
CLK
E2
CLKin
C2
GND
C3
VCCA
VCCB
DAT0A
CMDB
2
DAT1B
3
E4 DAT1B
DAT1B
A4 DAT2B
DAT2B
B4 DAT3B
DAT3B
DAT0B
4
DAT2B
5
CD
6
C4 CMDB
CMDB
D3 CLKB
CLKB
DAT3B
7
CLKB
8
DAT0B
D4 DAT0B
DAT1A
DAT2A
DAT3A
CMDA
CLKA
CLK-f
1
B3
GND
BS
DATA1 (see Note)
DATA0/SDIO (see Note)
DATA2 (see Note)
INS
DATA3 (see Note)
SCLK
9
GND
CD
CD
Memory Stick™
Controller
VSS
B2 CD
VCC
10
TXS0206
VSS
Memory Stick™
Connector
NOTE: The TXS0206A has integrated pullup resistor values that dynamically change value depending on whether a low or
high signal is being transmitted through the device. When the output is low, the TXS0206A internal pullup value is
40 kΩ, and when the output is high, the internal pullup value change to a value of 4 kΩ. For MSA and MSH Memory
Stick™ memory cards, to ensure that a valid VIH (i.e., receiver input voltage high) is achieved, the internal pulldown
resistors for these memory cards are not smaller than a 10-kΩ value. See the Application Information section of this
data sheet, which explains the impact of adding too heavy (i.e., <10-kΩ value) of a pulldown resistor to the data lines
of the TXS0206A device and the resulting 4-kΩ pullup/10-kΩ pulldown voltage divider network, which has a direct
impact on the VIH of the signal being sent into the Memory Stick™.
Figure 3. Interfacing With Memory Stick™ Card
1.8 V
CPU
A Side
B Side
2.9 V
CLK
CLK
Feedback CLK
CMD
CMD
Data 0–3
Level-Shifter
Data 0–3
Antenna
Pins 10, 11
EN
WP, CD
MMC, SD Card,
or MS Card
WP, CD 1.8-V Pullup
WP, CD
Integrated Pullup/Pulldown Resistors
Figure 4. Typical Application Circuit
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SCES833A – NOVEMBER 2011 – REVISED MAY 2012
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LOGIC TABLE
EN
TRANSLATOR I/Os
L
Disabled, pulled to VCCA, VCCB through 40 kΩ
H
Active
TERMINAL FUNCTIONS
TERMINAL
4
TYPE
DESCRIPTION
NO.
NAME
A1
DAT2A
I/O
Data bit 2 connected to host. Referenced to VCCA. Includes a 40-kΩ pullup resistor to VCCA.
A2
VCCA
Pwr
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
A3
WP
O
Connected to write protect on the mechanical connector. The WP pin has an internal 100-kΩ pullup
resistor to VCCA.
A4
DAT2B
I/O
Data bit 2 connected to memory card. Referenced to VCCB. Includes a 40-kΩ pullup resistor to VCCB.
B1
DAT3A
I/O
Data bit 3 connected to host. Referenced to VCCA. Includes a 40-kΩ pullup resistor to VCCA.
B2
CD
O
Connected to card detect on the mechanical connector. The CD pin has an internal 100-kΩ pullup resistor
to VCCA.
B3
VCCB
Pwr
B-port supply voltage. VCCB powers all B-port I/Os.
B4
DAT3B
I/O
Data bit 3 connected to memory card. Referenced to VCCB. Includes a 40-kΩ pullup resistor to VCCB.
I/O
Command bit connected to host. Referenced to VCCA. Includes a 40-kΩ pullup resistor to VCCA.
C1
CMDA
C2, C3
GND
C4
CMDB
I/O
Command bit connected to memory card. Referenced to VCCB. Includes a 40-kΩ pullup resistor to VCCB.
D1
DAT0A
I/O
Data bit 0 connected to host. Referenced to VCCA. Includes a 40-kΩ pullup resistor to VCCA.
D2
CLKA
I
Clock signal connected to host. Referenced to VCCA.
D3
CLKB
O
Clock signal connected to memory card. Referenced to VCCB.
D4
DAT0B
I/O
Data bit 0 connected to memory card. Referenced to VCCB. Includes a 40-kΩ pullup resistor to VCCB.
E1
DAT1A
I/O
Data bit 1 connected to host. Referenced to VCCA. Includes a 40-kΩ pullup resistor to VCCA.
E2
CLK-f
O
Clock feedback to host for resynchronizing data to a processor. Leave unconnected if not used.
E3
EN
I
Enable/disable control. Pull EN low to place all outputs in Hi-Z state. Referenced to VCCA.
E4
DAT1B
I/O
Ground
Data bit 1 connected to memory card. Referenced to VCCB. Includes a 40-kΩ pullup resistor to VCCB.
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SCES833A – NOVEMBER 2011 – REVISED MAY 2012
VCCA
VCCB
EN
CLKA
CLKB
CLK-f
VCCA
VCCB
One-Shot
R1
R2
Translator
One-Shot
CMDA
CMDB
Gate Control
One-Shot
Translator
One-Shot
VCCA
VCCB
One-Shot
R1
R2
Translator
One-Shot
DAT0A
DAT0B
Gate Control
One-Shot
Translator
One-Shot
VCCA
VCCB
One-Shot
R1
R2
Translator
One-Shot
DAT1A
DAT1B
Gate Control
One-Shot
Translator
One-Shot
VCCA
VCCB
One-Shot
R1
R2
Translator
One-Shot
DAT2A
DAT2B
Gate Control
One-Shot
Translator
One-Shot
VCCA
VCCB
One-Shot
R1
R2
Translator
One-Shot
DAT3A
DAT3B
Gate Control
One-Shot
Translator
One-Shot
VCCA
100 kW
WP
100 kW
CD
Figure 5. Logic Diagram
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VCCA
RCD
RWP
WP
CD
RESISTORS
RWP, RCD
100 kΩ
Tolerance
±30%
Figure 6. WP, CD Pullup Resistors
ABSOLUTE MAXIMUM RATINGS (1)
Level Translator
over operating free-air temperature range (unless otherwise noted)
VCCA
Supply voltage range
VCCB
Supply voltage range
MIN
MAX
–0.5
4.6
V
V
–0.5
4.6
I/O ports (A port)
–0.5
4.6
I/O ports (B port)
–0.5
4.6
Control inputs
–0.5
4.6
A port
–0.5
4.6
B port
–0.5
4.6
A port
–0.5
4.6
B port
–0.5
4.6
UNIT
VI
Input voltage range
VO
Voltage range applied to any output in the high-impedance or power-off
state
VO
Voltage range applied to any output in the high or low state
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
Continuous current through VCCA or GND
Tstg
(1)
Storage temperature range
–65
V
V
V
±50
mA
±100
mA
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
THERMAL IMPEDANCE RATINGS
UNIT
θJA
(1)
6
Package thermal impedance (1)
117
°C/W
The package thermal impedance is calculated in accordance with JESD 51-7.
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RECOMMENDED OPERATING CONDITIONS (1)
Level Translator
VCCA
VCCB
MIN
MAX
UNIT
VCCA
Supply voltage
1.1
3.6
V
VCCB
Supply voltage
1.1
3.6
V
VCCI – 0.2
VCCI
VCCI x 0.65
VCCI
0
0.15
High-level input
voltage
VIH
Low-level input
voltage
VIL
VO
Output voltage
IOH
A-Port CMD and
DATA I/Os
B-Port CMD and
DATA I/Os
1.1 V to 1.95 V
1.1 V to 1.95 V
1.95 V to 3.6 V
1.95 V to 3.6 V
EN and CLKA
1.1 V to 3.6 V
1.1 V to 3.6 V
A-Port CMD and
DATA I/Os
B-Port CMD and
DATA I/Os
1.1 V to 1.95 V
1.1 V to 1.95 V
1.95 V to 3.6 V
1.95 V to 3.6 V
EN and CLKA
1.1 V to 3.6 V
1.1 V to 3.6 V
0
VCCI x 0.35
Active state
0
VCCO
3-state
0
3.6
High-level output current (CLK-f output)
1.1 V to 3.6 V
–100
1.1 V to 1.3 V
–0.5
1.4 V to 1.6 V
1.65 V to 1.95 V
IOL
Low-level output current (CLK-f output)
–2
–8
1.1 V to 3.6 V
100
1.1 V to 1.3 V
0.5
2
IOL
Low-level output current (CLK output)
Δt/Δv
Input transition rise or fall rate
TA
Operating free-air temperature
(1)
1.1 V to 3.6 V
1.1 V to 3.6 V
mA
μA
mA
4
3 V to 3.6 V
High-level output current (CLK output)
μA
1
1.1 V to 3.6 V
2.3 V to 2.7 V
IOH
V
–4
3 V to 3.6 V
1.65 V to 1.95 V
V
–1
1.1 V to 3.6 V
2.3 V to 2.7 V
1.4 V to 1.6 V
V
8
1.1 V to 3.6 V
–100
1.1 V to 1.3 V
–0.5
1.4 V to 1.6 V
–1
1.65 V to 1.95 V
–2
2.3 V to 2.7 V
–4
3 V to 3.6 V
–8
1.1 V to 3.6 V
100
1.1 V to 1.3 V
0.5
1.4 V to 1.6 V
1
1.65 V to 1.95 V
2
2.3 V to 2.7 V
4
3 V to 3.6 V
8
–40
μA
mA
μA
mA
5
ns/V
85
°C
All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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ELECTRICAL CHARACTERISTICS
Level Translator
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
A port
(CLK-f output)
VOH
A port
(DAT and CMD
outputs)
A port
(CLK-f output)
VOL
A port
(DAT and CMD
outputs)
TEST CONDITIONS
VCCA
VOH
B port
(DAT output)
(1)
8
MIN
TYP (1)
MAX
IOH = –100 μA
1.1 V to 3.6 V
IOH = –0.5 mA
1.1 V
0.8
IOH = –1 mA
1.4 V
1.05
IOH = –2 mA
1.65 V
IOH = –4 mA
2.3 V
IOH = –8 mA
3V
IOH = –20 μA
1.1 V to 3.6 V
IOL = 100 μA
1.1 V to 3.6 V
IOL = 0.5 mA
1.1 V
IOL = 1 mA
1.4 V
IOL = 2 mA
1.65 V
IOL = 4 mA
2.3 V
0.55
IOL = 8 mA
3V
0.7
IOL = 135 μA
1.1 V
0.4
IOL = 180 μA
1.4 V
IOL = 220 μA
1.65 V
IOL = 300 μA
2.3 V
0.4
IOL = 400 μA
3V
0.55
IOH = –100 μA
B port
(CLK output)
VCCB
IOH = –4 mA
1.2
1.65 V to 3.6 V
VCCA × 0.8
VCCA × 0.2
0.35
0.35
1.65 V to 3.6 V
0.45
V
0.4
1.65 V to 3.6 V
0.4
V
VCCB × 0.8
1.65 V
1.2
2.3 V
1.75
IOH = –8 mA
3V
2.3
IOH = –20 μA
1.65 V to 3.6 V
1.1 V to 3.6 V
V
1.75
2.3
1.65 V to 3.6 V
IOH = –2 mA
UNIT
VCCA * 0.8
V
VCCB × 0.8
All typical values are at TA = 25°C.
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ELECTRICAL CHARACTERISTICS
Level Translator (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCCA
IOL = 100 μA
B port
IOL = 2 mA
1.1 V to 3.6 V
IOL = 4 mA
IOL = 135 μA
B port
(DAT output)
MIN
TYP (1)
1.65 V to 3.6 V
IOL = 8 mA
VOL
VCCB
IOL = 220 μA
1.1 V to 3.6 V
IOL = 300 μA
IOL = 300 μA
MAX
UNIT
VCCB × 0.2
1.65 V
0.45
2.3 V
0.55
3V
0.7
1.65 V to 3.6 V
0.4
1.65 V
0.4
2.3 V
0.4
3V
0.55
V
V
1.65 V to 3.6 V
±1
μA
ICCA
VI = VCCI
IO = 0
1.1 V to 3.6 V 1.65 V to 3.6 V
7
μA
ICCB
VI = VCCI
IO = 0
1.1 V to 3.6 V 1.65 V to 3.6 V
11
μA
II
Cio
Ci
Control inputs
VI = VCCA or GND
A port
5.5
6.5
B port
7
9.5
3.5
4.5
3
4
Control inputs
Clock input
VI = VCCA or GND
pF
pF
TIMING REQUIREMENTS
VCCA = 1.2 V ± 0.1 V
over recommended operating free-air temperature range (unless otherwise noted)
VCCB = 1.8 V
± 0.15 V
MIN
Command
Data rate
Clock
Data
Command
tW
Pulse
duration
Clock
Data
Push-pull driving
Open-drain driving
Push-pull driving
Push-pull driving
Open-drain driving
Push-pull driving
VCCB = 3.3 V
± 0.3 V
MAX
MIN
UNIT
MAX
40
40
1
1
40
40
MHz
40
Mbps
40
Mbps
25
25
ns
1
1
μs
10
8.3
ns
25
25
ns
TIMING REQUIREMENTS
VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range (unless otherwise noted)
VCCB = 1.8 V
± 0.15 V
MIN
Command
Data rate
Clock
Data
Command
tW
Pulse
duration
Clock
Data
Push-pull driving
Open-drain driving
Push-pull driving
Push-pull driving
Open-drain driving
Push-pull driving
VCCB = 3.3 V
± 0.3 V
MAX
MIN
UNIT
MAX
60
60
1
1
60
60
MHz
60
60
Mbps
Mbps
17
17
ns
1
1
μs
8.3
8.3
ns
17
17
ns
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TIMING REQUIREMENTS
VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range (unless otherwise noted)
VCCB = 1.8 V
± 0.15 V
MIN
Command
Data rate
Clock
Data
Command
tW
Pulse
duration
Clock
Data
10
Push-pull driving
Open-drain driving
Push-pull driving
Push-pull driving
Open-drain driving
Push-pull driving
VCCB = 3.3 V
± 0.3 V
MAX
MIN
UNIT
MAX
60
60
1
1
55
55
MHz
60
Mbps
60
Mbps
17
17
ns
1
1
μs
9
9
ns
17
17
ns
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SWITCHING CHARACTERISTICS
VCCA = 1.2 V ± 0.1 V
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VCCB
= 1.8 V
± 0.15 V
TO
(OUTPUT)
CMDA
CMDB
5.7
4.4
CMDB
CMDA
6.7
5.8
CLKA
CLKB
6.2
4.5
DATxA
DATxB
7.6
7.5
DATxB
DATxA
6.3
4.6
CLKA
CLK-f
12
7.9
EN
B-port
1
1
EN
A-port
1
1
EN
B-port
412
363
EN
A-port
423
422
MIN
tpd
ten
tdis
trA
trB
tfA
tfB
tSK(O)
MAX
MIN
UNIT
MAX
CMDA rise time
3.5
8.4
3.4
8.1
CLK-f rise time
1
4.7
1
4.1
DATxA rise time
3.5
8.4
3.4
8.1
CMDB rise time
1.4
6.5
0.6
3.1
CLKB rise time
0.6
5.9
0.5
4.3
DATxB rise time
1.4
10.9
0.6
5
CMDA fall time
2.4
5.7
2
5.1
CLK-f fall time
0.8
2.5
0.8
3
DATxA fall time
2.4
5.7
1.9
5.1
CMDB fall time
1.2
5.4
0.6
3.6
CLKB fall time
0.6
6.3
0.5
4
DATxB fall time
0.6
6.3
0.5
3.6
Channel-to-channel
skew
ns
μs
ns
ns
ns
ns
ns
1
1
Push-pull driving
40
40
Open-drain driving
1
1
Clock
40
60
MHz
Data
40
40
Mbps
Command
Max data rate
VCCB
= 3.3 V
± 0.3 V
FROM
(INPUT)
ns
Mbps
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11
TXS0206A
SCES833A – NOVEMBER 2011 – REVISED MAY 2012
www.ti.com
SWITCHING CHARACTERISTICS
VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VCCB
= 1.8 V
± 0.15 V
TO
(OUTPUT)
CMDA
CMDB
4.9
3.3
CMDB
CMDA
5.6
3.6
CLKA
CLKB
5.4
3.4
DATxA
DATxB
5
4.4
DATxB
DATxA
5.4
3.5
CLKA
CLK-f
10.2
5.7
EN
B-port
1
1
EN
A-port
1
1
EN
B-port
411
411
EN
A-port
413
361
MIN
tpd
ten
tdis
trA
trB
tfA
tfB
tSK(O)
MIN
MAX
2.1
4.5
2.1
4.1
CLK-f rise time
0.6
2.5
0.6
2.3
DATxA rise time
1.8
4.5
1.8
4.2
CMDB rise time
1.4
6.6
0.7
3.8
CLKB rise time
0.5
5.8
0.5
4.4
DATxB rise time
1.4
10.8
0.7
8
CMDA fall time
0.4
3.4
0.3
2.9
CLK-f fall time
0.3
2.8
0.3
2.8
DATxA fall time
0.4
3.4
0.3
2.9
CMDB fall time
1.1
6.3
0.6
3.7
CLKB fall time
0.6
8.7
0.5
4.1
DATxB fall time
1.2
7
0.2
4
Channel-to-channel
skew
Max data rate
MAX
UNIT
CMDA rise time
Command
12
VCCB
= 3.3 V
± 0.3 V
FROM
(INPUT)
ns
μs
ns
ns
ns
ns
ns
1
1
Push-pull driving
60
60
Open-drain driving
1
1
Clock
60
60
MHz
Data
60
60
Mbps
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Mbps
Copyright © 2011–2012, Texas Instruments Incorporated
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TXS0206A
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SCES833A – NOVEMBER 2011 – REVISED MAY 2012
SWITCHING CHARACTERISTICS
VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range (unless otherwise noted)
VCCB
= 1.8 V
± 0.15 V
VCCB
= 3.3 V
± 0.3 V
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tpd
CMDA
CMDB
5.3
3.2
CMDB
CMDA
5.1
3
MIN
MAX
UNIT
MIN
MAX
CLKA
CLKB
4.8
3.1
DATxA
DATxB
5.1
3.2
DATxB
DATxA
9.6
5.1
CLKA
CLK-f
6.8
4.2
EN
B-port
1
1
EN
A-port
1
1
EN
B-port
410
364
EN
A-port
396
398
ten
tdis
trA
trB
tfA
tfB
CMDA rise time
1.4
4.2
1.4
4.2
CLK-f rise time
0.5
1.5
0.5
1.4
DATxA rise time
1.4
3.4
1.3
3
CMDB rise time
1.4
6.4
0.9
4
4.4
CLKB rise time
0.6
5.9
0.5
DATxB rise time
1.4
14
0.9
14
CMDA fall time
0.8
2.3
0.8
2.3
CLK-f fall time
0.4
1.3
0.4
1.3
DATxA fall time
0.8
2.2
0.7
2
CMDB fall time
0.8
6.2
0.8
5
CLKB fall time
0.6
7.8
0.5
4.3
DATxB fall time
0.7
6.8
0.6
5
Channel-to-channel
skew
tSK(O)
μs
ns
ns
ns
ns
ns
1
1
60
60
1
1
Clock
55
55
MHz
Data
60
60
Mbps
Push-pull driving
Command
Max data rate
ns
Open-drain driving
ns
Mbps
OPERATING CHARACTERISTICS
TA = 25°C, VCCA = 1.2 V
TEST
CONDITIONS
PARAMETER
A-port input,
B-port output
CpdA
(1)
B-port input,
A-port output
A-port input,
B-port output
B-port input,
A-port output
(1)
VCCB TYP
1.8 V
3.3 V
CLK Enabled
15.1
15
DATA Enabled
9.26
9.19
12.4
11.9
0.1
0.1
DATA Disabled
1.3
1.3
DATA Disabled
0.1
0.1
DATA Enabled
CLK Disabled
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
UNIT
pF
Power dissipation capacitance per transceiver
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13
TXS0206A
SCES833A – NOVEMBER 2011 – REVISED MAY 2012
www.ti.com
OPERATING CHARACTERISTICS (continued)
TA = 25°C, VCCA = 1.2 V
TEST
CONDITIONS
PARAMETER
A-port input,
B-port output
CpdB
(1)
B-port input,
A-port output
A-port input,
B-port output
B-port input,
A-port output
VCCB TYP
1.8 V
3.3 V
26.7
30.3
25.6
27
16.38
19.91
0.1
0.1
CLK Disabled
0.1
0.1
DATA Disabled
1.1
0.8
DATA Enabled
CLK Enabled
DATA Enabled
DATA Disabled
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
UNIT
pF
OPERATING CHARACTERISTICS
TA = 25°C, VCCA = 1.8 V
TEST
CONDITIONS
PARAMETER
1.8 V
3.3 V
CLK Enabled
17.5
17.1
DATA Enabled
9.96
9.82
15.6
14
0.1
0.1
DATA Disabled
1.3
1.3
B-port input,
A-port output
DATA Disabled
0.1
0.1
A-port input,
B-port output
DATA Enabled
26
28.5
A-port input,
B-port output
CpdA
(1)
B-port input,
A-port output
A-port input,
B-port output
CpdB
(1)
B-port input,
A-port output
A-port input,
B-port output
B-port input,
A-port output
(1)
VCCB TYP
DATA Enabled
CLK Disabled
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
CLK Enabled
25.8
27
16.69
19.60
0.1
0.1
CLK Disabled
0.1
0.1
DATA Disabled
1.1
0.8
DATA Enabled
DATA Disabled
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
UNIT
pF
pF
Power dissipation capacitance per transceiver
OPERATING CHARACTERISTICS
TA = 25°C, VCCA = 3.3 V
TEST
CONDITIONS
PARAMETER
A-port input,
B-port output
CpdA
(1)
B-port input,
A-port output
A-port input,
B-port output
B-port input,
A-port output
(1)
14
VCCB TYP
1.8 V
3.3 V
CLK Enabled
17.5
17.1
DATA Enabled
12.50
13.29
15.6
14
0.1
0.1
DATA Disabled
1.3
1.3
DATA Disabled
0.1
0.1
DATA Enabled
CLK Disabled
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
UNIT
pF
Power dissipation capacitance per transceiver
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Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): TXS0206A
TXS0206A
www.ti.com
SCES833A – NOVEMBER 2011 – REVISED MAY 2012
OPERATING CHARACTERISTICS (continued)
TA = 25°C, VCCA = 3.3 V
TEST
CONDITIONS
PARAMETER
A-port input,
B-port output
CpdB
(1)
B-port input,
A-port output
A-port input,
B-port output
B-port input,
A-port output
VCCB TYP
1.8 V
3.3 V
26
28.5
25.8
27
16.67
19.92
0.1
0.1
CLK Disabled
0.1
0.1
DATA Disabled
1.1
0.8
DATA Enabled
CLK Enabled
DATA Enabled
DATA Disabled
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
UNIT
pF
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Product Folder Link(s): TXS0206A
15
TXS0206A
SCES833A – NOVEMBER 2011 – REVISED MAY 2012
www.ti.com
PARAMETER MEASUREMENT INFORMATION
VCCI
VCCO
VCCI
VCCO
DUT
IN
DUT
IN
OUT
15 pF
OUT
1 MW
1 MW
15 pF
DATA RATE, PULSE DURATION, PROPAGATION DELAY,
OUTPUT RISE AND FALL TIME MEASUREMENT USING
AN OPEN-DRAIN DRIVER
DATA RATE, PULSE DURATION, PROPAGATION DELAY,
OUTPUT RISE AND FALL TIME MEASUREMENT USING
A PUSH-PULL DRIVER
2 × VCCO
50 kW
From Output
Under Test
15 pF
S1
Open
50 kW
LOAD CIRCUIT FOR ENABLE/DISABLE
TIME MEASUREMENT
TEST
S1
tPZL/tPLZ
tPHZ/tPZH
2 × VCCO
Open
tw
VCCI
VCCI/2
Input
VCCI/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VCCA
Output
Control
(low-level
enabling)
VCCA/2
0V
tPLZ
tPZL
VCCI
Input
VCCI/2
VCCI/2
0V
tPLH
Output
tPHL
VOH
VCCO/2
VOL
0.9 y VCCO
VCCO/2
0.1 y VCCO
Output
Waveform 1
S1 at 2 × VCCO
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VCCA/2
VCCO
VCCO/2
0.1 y VCCO
VOL
tPHZ
tPZH
VOH
0.9 y VCCO
VCCO/2
0V
tf
tr
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
J. All parameters and waveforms are not applicable to all devices.
Figure 7. Load Circuit and Voltage Waveforms
16
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Product Folder Link(s): TXS0206A
TXS0206A
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SCES833A – NOVEMBER 2011 – REVISED MAY 2012
APPLICATION INFORMATION
The TXS0206A has integrated pullup resistors on the data and command ports and their values dynamically
change. When the port is in a low signal state, there is a nominal pullup resistor value of 40 kΩ, and power
consumption is minimized. When the port is in a high signal state, the nominal pullup resistor value changes to 4
kΩ, and simultaneous switching performance is improved as a result. The threshold at which the resistance
changes is approximately VCCx/2.
When using the TXS0206A device with MMCs, SD, and Memory Stick™ to ensure that a valid receiver input
voltage high (VIH) is achieved, the value of any pulldown resistors (external or internal to a memory card) must
not be smaller than a 10-kΩ value. The impact of adding too heavy (i.e., <10-kΩ value) a pulldown resistor to the
data and command lines of the TXS0206A device and the resulting 4-kΩ pullup / 10-kΩ pulldown voltage divider
network has a direct impact on the VIH of the signal being sent into the memory card and its associated logic.
The resulting VIH voltage for the 10-kΩ pulldown resistor value would be:
VCC × 10 kΩ / (10 kΩ+ 4 kΩ) = 0.714 × VCC
This is marginally above a valid input high voltage for a 1.8-V signal (i.e., 0.65 × VCC).
The resulting VIH voltage for 20-kΩ pulldown resistor value would be:
VCC × 20 kΩ / (20 kΩ + 4 kΩ) = 0.833 × VCC
Which is above the valid input high voltage for a 1.8-V signal of 0.65 × VCC.
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Product Folder Link(s): TXS0206A
17
D: Max = 1.988 mm, Min = 1.928 mm
E: Max = 1.588 mm, Min = 1.527 mm
PACKAGE OPTION ADDENDUM
www.ti.com
31-May-2012
PACKAGING INFORMATION
Orderable Device
TXS0206AYFPR
Status
(1)
ACTIVE
Package Type Package
Drawing
DSBGA
YFP
Pins
Package Qty
20
3000
Eco Plan
(2)
Green (RoHS
& no Sb/Br)
Lead/
Ball Finish
SNAGCU
MSL Peak Temp
(3)
Samples
(Requires Login)
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Apr-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TXS0206AYFPR
Package Package Pins
Type Drawing
SPQ
DSBGA
3000
YFP
20
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
180.0
8.4
Pack Materials-Page 1
1.66
B0
(mm)
K0
(mm)
P1
(mm)
2.06
0.56
4.0
W
Pin1
(mm) Quadrant
8.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Apr-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TXS0206AYFPR
DSBGA
YFP
20
3000
210.0
185.0
35.0
Pack Materials-Page 2
D: Max = 1.988 mm, Min =1.928 mm
E: Max = 1.588 mm, Min =1.527 mm
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