SN74AVCH4T245-EP www.ti.com........................................................................................................................................................................................... SCES771 – DECEMBER 2008 4-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS FEATURES 1 • • • • • • • Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V Power-Supply Range I/Os Are 4.6-V Tolerant Ioff Supports Partial Power-Down-Mode Operation Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Max Data Rates – 380 Mbps (1.8-V to 3.3-V Translation) – 200 Mbps (<1.8-V to 3.3-V Translation) – 200 Mbps (Translate to 2.5 V or 1.8 V) – 150 Mbps (Translate to 1.5 V) – 100 Mbps (Translate to 1.2 V) Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 8000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS • • • • Controlled Baseline One Assembly/Test Site One Fabrication Site Available in Military (–55°C/125°C) Temperature Range (1) Extended Product Life Cycle Extended Product-Change Notification Product Traceability • • • (1) Additional temperature ranges are available – contact factory 2B1 1B1 1B2 2OE RSV PACKAGE (TOP VIEW) 16 15 14 13 GND 3 10 GND 1DIR 4 9 2A2 5 6 7 8 2A1 2B2 11 1A2 12 1A1 1 2 2DIR 1OE VCCB VCCA DESCRIPTION/ORDERING INFORMATION This 4-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. The SN74AVCH4T245 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008, Texas Instruments Incorporated SN74AVCH4T245-EP SCES771 – DECEMBER 2008........................................................................................................................................................................................... www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) The SN74AVCH4T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ. The SN74AVCH4T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION (1) PACKAGE (2) TA –55°C to 125°C (1) (2) QFN – RSV ORDERABLE PART NUMBER Tape and reel CAVCH4T245MRSVREP TOP-SIDE MARKING SODM Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. FUNCTION TABLE (1) (EACH 2-BIT SECTION) CONTROL INPUTS OE (1) OUTPUT CIRCUITS B PORT OPERATION DIR A PORT L L Enabled Hi-Z B data to A bus L H Hi-Z Enabled A data to B bus H X Hi-Z Hi-Z Isolation Input circuits of the data I/Os are always active. LOGIC DIAGRAM (POSITIVE LOGIC) FOR 1/2 OF AVCH4T245 DIR OE A1 B1 A2 B2 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74AVCH4T245-EP SN74AVCH4T245-EP www.ti.com........................................................................................................................................................................................... SCES771 – DECEMBER 2008 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCCA VCCB VI MIN MAX –0.5 4.6 I/O ports (A port) –0.5 4.6 I/O ports (B port) –0.5 4.6 Control inputs –0.5 4.6 A port –0.5 4.6 B port –0.5 4.6 A port –0.5 VCCA + 0.5 B port –0.5 VCCB + 0.5 Supply voltage range Input voltage range (2) UNIT V V VO Voltage range applied to any output in the high-impedance or power-off state (2) VO Voltage range applied to any output in the high or low state (2) (3) IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA Continuous current through VCCA, VCCB, or GND θJA Package thermal impedance Tstg Storage temperature range (1) (2) (3) –65 V V ±100 mA 184 °C/W 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74AVCH4T245-EP 3 SN74AVCH4T245-EP SCES771 – DECEMBER 2008........................................................................................................................................................................................... www.ti.com Recommended Operating Conditions (1) (2) (3) (4) (5) VCCI VCCO MIN MAX UNIT VCCA Supply voltage 1.2 3.6 V VCCB Supply voltage 1.2 3.6 V High-level input voltage VIH Low-level input voltage VIL High-level input voltage VIH VIL Low-level input voltage VI Input voltage Data inputs (4) Data inputs (4) DIR (referenced to VCCA) (5) DIR (referenced to VCCA) (5) 1.2 V to 1.95 V VCCI × 0.65 1.95 V to 2.7 V 1.6 2.7 V to 3.6 V 2 1.2 V to 1.95 V VCCI × 0.35 1.95 V to 2.7 V 0.7 2.7 V to 3.6 V 0.8 1.2 V to 1.95 V VCCA × 0.65 1.95 V to 2.7 V 1.6 2.7 V to 3.6 V 2 Output voltage IOH VCCA × 0.35 1.95 V to 2.7 V 0.7 IOL 3.6 Active state 0 VCCO 3-state 0 3.6 Low-level output current Δt/Δv Input transition rise or fall rate TA Operating free-air temperature (1) (2) (3) (4) (5) 4 V 0.8 0 High-level output current V V 1.2 V to 1.95 V 2.7 V to 3.6 V VO V 1.2 V –3 1.4 V to 1.6 V –6 1.65 V to 1.95 V –8 2.3 V to 2.7 V –9 3 V to 3.6 V –12 1.2 V 3 1.4 V to 1.6 V 6 1.65 V to 1.95 V 8 2.3 V to 2.7 V 9 3 V to 3.6 V 12 5 –55 125 V V mA mA ns/V °C VCCI is the VCC associated with the input port. VCCO is the VCC associated with the output port. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V. For VCCA values not specified in the data sheet, VIH min = VCCA × 0.7 V, VIL max = VCCA × 0.3 V. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74AVCH4T245-EP SN74AVCH4T245-EP www.ti.com........................................................................................................................................................................................... SCES771 – DECEMBER 2008 Electrical Characteristics (1) (2) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS 1.2 V to 3.6 V 1.2 V to 3.6 V IOH = –3 mA 1.2 V 1.2 V IOH = –6 mA 1.4 V 1.4 V 1.05 1.65 V 1.65 V 1.2 IOH = –9 mA 2.3 V 2.3 V 1.75 IOH = –12 mA 3V 3V 2.3 IOL = 100 µA 1.2 V to 3.6 V 1.2 V to 3.6 V IOL = 3 mA 1.2 V 1.2 V IOL = 6 mA 1.4 V 1.4 V 0.35 1.65 V 1.65 V 0.45 2.3 V 2.3 V 0.55 IOH = –8 mA VOL IOL = 8 mA VI = VIH VI = VIL IOL = 9 mA IOL = 12 mA II DIR input VI = VCCA or GND VI = 0.42 V IBHL (3) IBHH (4) IBHLO (5) IBHHO (6) (1) (2) (3) (4) (5) (6) –55°C to 125°C VCCB IOH = –100 µA VOH TA = 25°C VCCA 3V 3V 1.2 V to 3.6 V 1.2 V to 3.6 V 1.2 V 1.2 V MIN TYP MAX MIN MAX VCCO – 0.2 0.95 0.15 V 0.7 ±0.025 ±0.25 ±1 µA 25 1.4 V 1.4 V 15 VI = 0.58 V 1.65 V 1.65 V 25 VI = 0.7 V 2.3 V 2.3 V 45 VI = 0.8 V 3.3 V 3.3 V VI = 0.78 V 1.2 V 1.2 V µA 100 –25 VI = 0.91 V 1.4 V 1.4 V –15 VI = 1.07 V 1.65 V 1.65 V –25 VI = 1.6 V 2.3 V 2.3 V –45 VI = 2 V 3.3 V 3.3 V –100 1.2 V 1.2 V VI = 0 to VCCI V 0.2 VI = 0.49 V VI = 0 to VCCI UNIT µA 50 1.6 V 1.6 V 125 1.95 V 1.95 V 200 2.7 V 2.7 V 300 3.6 V 3.6 V 1.2 V 1.2 V µA 500 –50 1.6 V 1.6 V –125 1.95 V 1.95 V –200 2.7 V 2.7 V –300 3.6 V 3.6 V –500 µA VCCO is the VCC associated with the output port. VCCI is the VCC associated with the input port. The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND and then raising it to VIL max. The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to VCC and then lowering it to VIH min. An external driver must source at least IBHLO to switch this node from low to high. An external driver must sink at least IBHHO to switch this node from high to low. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74AVCH4T245-EP 5 SN74AVCH4T245-EP SCES771 – DECEMBER 2008........................................................................................................................................................................................... www.ti.com Electrical Characteristics (1) (2) over recommended operating free-air temperature range (unless otherwise noted) (continued) PARAMETER A port Ioff B port A or B port IOZ (3) B port A port ICCA ICCB TEST CONDITIONS OE = VIH VO = VCCO or GND, VI = VCCI or GND OE = don't care VI = VCCI or GND, IO = 0 VI = VCCI or GND, ICCA + ICCB VI = VCCI or GND, 0V 0 V to 3.6 V ±0.1 ±1 ±13 0 V to 3.6 V 0V ±0.1 ±1 ±13 3.6 V 3.6 V ±0.5 ±2.5 ±5 0V 3.6 V ±14 3.6 V 0V ±5 1.2 V to 3.6 V 1.2 V to 3.6 V 8 0V 3.6 V –2 3.6 V 0V 8 1.2 V to 3.6 V 1.2 V to 3.6 V 8 0V 3.6 V 8 3.6 V 0V –2 1.2 V to 3.6 V 1.2 V to 3.6 V 16 µA IO = 0 IO = 0 –55°C to 125°C VCCB VI or VO = 0 to 3.6 V VO = VCCO or GND, VI = VCCI or GND TA = 25°C VCCA MIN TYP MAX MIN MAX UNIT µA µA µA µA Ci Control inputs VI = 3.3 V or GND 3.3 V 3.3 V 3.5 4.5 pF Cio A or B port VO = 3.3 V or GND 3.3 V 3.3 V 6 7 pF (1) (2) (3) VCCO is the VCC associated with the output port. VCCI is the VCC associated with the input port. For I/O ports, the parameter IOZ includes the input leakage current. Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.2 V (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ 6 FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP TYP TYP TYP TYP 3.4 2.9 2.7 2.6 2.8 3.4 2.9 2.7 2.6 2.8 3.6 3.1 2.8 2.6 2.6 3.6 3.1 2.8 2.6 2.6 5.6 4.7 4.3 3.9 3.7 5.6 4.7 4.3 3.9 3.7 5 4.3 3.9 3.6 3.6 5 4.3 3.9 3.6 3.6 6.2 5.2 5.2 4.3 4.8 6.2 5.2 5.2 4.3 4.8 5.9 5.1 5 4.7 5.5 5.9 5.1 5 4.7 5.5 Submit Documentation Feedback UNIT ns ns ns ns ns ns Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74AVCH4T245-EP SN74AVCH4T245-EP www.ti.com........................................................................................................................................................................................... SCES771 – DECEMBER 2008 Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 3.2 0.3 10.3 0.3 9.2 0.4 8.2 0.4 8.2 3.2 0.3 10.3 0.3 9.2 0.4 8.2 0.4 8.2 3.3 0.7 10.3 0.5 10 0.4 9.7 0.3 9.6 3.3 0.7 10.3 0.5 10 0.4 9.7 0.3 13.6 4.9 1.4 13.6 1.1 13.5 0.7 13.4 0.4 13.4 4.9 1.4 13.6 1.1 13.5 0.7 13.4 0.4 13.4 4.5 1.4 14.6 1.1 11.7 0.9 9.8 0.9 9.6 4.5 1.4 14.6 1.1 11.7 0.9 9.8 0.9 9.6 5.6 1.8 14.2 1.5 14.2 1.3 14.2 1.6 14.2 5.6 1.8 14.2 1.5 14.2 1.3 14.2 1.6 14.2 5.2 1.9 14.3 1.9 13.1 1.4 11.4 1.2 11.6 5.2 1.9 14.3 1.9 13.1 1.4 11.4 1.2 11.6 UNIT ns ns ns ns ns ns Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 2.9 0.1 10 0.1 8.9 0.1 7.9 0.3 7.9 2.9 0.1 10 0.1 8.9 0.1 7.9 0.3 7.9 3 0.6 9.3 0.5 8.9 0.3 8.6 0.3 8.5 3 0.6 9.3 0.5 8.9 0.3 8.6 0.3 8.5 4.4 1 13.4 1 11.3 0.6 11.3 0.4 11.2 4.4 1 13.4 1 11.3 0.6 11.3 0.4 11.2 4.1 1.2 14.4 1 12.4 0.8 9.3 0.8 8.6 4.1 1.2 14.4 1 12.4 0.8 9.3 0.8 8.6 5.4 1.6 12.6 1.8 12.7 1.3 12.7 1.6 12.7 5.4 1.6 12.6 1.8 12.7 1.3 12.7 1.6 12.7 5 1.7 13.9 1.6 12.7 1.2 10.9 1 10.9 5 1.7 13.9 1.6 12.7 1.2 10.9 1 10.9 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74AVCH4T245-EP UNIT ns ns ns ns ns ns 7 SN74AVCH4T245-EP SCES771 – DECEMBER 2008........................................................................................................................................................................................... www.ti.com Switching Characteristics over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 2.8 0.1 9.7 0.1 8.6 0.2 7.5 0.1 7.6 2.8 0.1 9.7 0.1 8.6 0.2 7.5 0.1 7.6 2.7 0.6 8.2 0.4 7.9 0.2 7.4 0.2 7.3 2.7 0.6 8.2 0.4 7.9 0.2 7.4 0.2 7.3 4 0.7 10.5 0.7 9.2 0.6 8.8 0.4 8.8 4 0.7 10.5 0.7 9.2 0.6 8.8 0.4 8.8 3.8 0.9 14.8 0.8 12 0.6 9.8 0.6 9 3.8 0.9 14.8 0.8 12 0.6 9.8 0.6 9 4.7 1 12.4 1 12.4 1 10.2 1 10.6 4.7 1 12.4 1 12.4 1 10.2 1 10.6 4.5 1.5 13.4 1.3 12.2 1.1 10.2 0.9 9.2 4.5 1.5 12.8 1.3 12.2 1.1 10.2 0.9 9.2 UNIT ns ns ns ns ns ns Switching Characteristics over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ 8 FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 2.9 0.1 9.6 0.1 8.5 0.1 7.3 0.1 6.9 2.9 0.1 9.6 0.1 8.5 0.1 7.3 0.1 6.9 2.6 0.6 8.2 0.4 7.4 0.2 7 0.1 6.8 2.6 0.6 8.2 0.4 7.4 0.2 7 0.1 6.8 3.8 0.6 12.7 0.6 9.2 0.6 7.8 0.4 7.8 3.8 0.6 12.7 0.6 9.2 0.6 7.8 0.4 7.8 3.7 0.8 14.7 0.6 11.8 0.5 9.7 0.5 8.8 3.7 0.8 14.7 0.6 11.8 0.5 9.7 0.5 8.8 4.8 0.7 13.3 0.7 12.3 0.7 9.6 0.7 10.6 4.8 0.7 13.3 0.7 12.3 0.7 9.6 0.7 10.6 5.3 1.4 13.3 1.2 12.1 1 10.4 0.8 10.2 5.3 1.4 13.3 1.2 12.1 1 10.4 0.8 10.2 Submit Documentation Feedback UNIT ns ns ns ns ns ns Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74AVCH4T245-EP SN74AVCH4T245-EP www.ti.com........................................................................................................................................................................................... SCES771 – DECEMBER 2008 Operating Characteristics TA = 25°C VCCA = VCCB = 1.2 V VCCA = VCCB = 1.5 V VCCA = VCCB = 1.8 V VCCA = VCCB = 2.5 V VCCA = VCCB = 3.3 V TYP TYP TYP TYP TYP 1 1 1 1.5 2 1 1 1 1 1 12 12.5 13 14 15 Outputs disabled 1 1 1 1 1 Outputs enabled 12 12.5 13 14 15 1 1 1 1 1 1 1 1 1 2 1 1 1 1 1 PARAMETER A to B CpdA (1) B to A A to B CpdB (1) B to A (1) TEST CONDITIONS Outputs enabled Outputs disabled Outputs enabled Outputs disabled Outputs enabled CL = 0, f = 10 MHz, tr = tf = 1 ns UNIT pF CL = 0, f = 10 MHz, tr = tf = 1 ns pF Outputs disabled Power dissipation capacitance per transceiver Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74AVCH4T245-EP 9 SN74AVCH4T245-EP SCES771 – DECEMBER 2008........................................................................................................................................................................................... www.ti.com PARAMETER MEASUREMENT INFORMATION 2 × VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO CL RL VTP 1.2 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 15 pF 15 pF 15 pF 15 pF 15 pF 2 kΩ 2 kΩ 2 kΩ 2 kΩ 2 kΩ 0.1 V 0.1 V 0.15 V 0.15 V 0.3 V VCCI/2 0V VOLTAGE WAVEFORMS PULSE DURATION VCCA Output Control (low-level enabling) VCCA/2 VCCA/2 0V tPZL VCCI Input VCCI/2 VCCI/2 0V tPLH Output tPHL VOH VCCO/2 VOL VCCO/2 VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES tPLZ VCCO Output Waveform 1 S1 at 2 × VCCO (see Note B) VCCO/2 VOL + VTP VOL tPZH tPHZ Output Waveform 2 S1 at GND (see Note B) VCCO/2 VOH − VTP VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns, dv/dt ≥1 V/ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. VCCI is the VCC associated with the input port. I. VCCO is the VCC associated with the output port. Figure 1. Load Circuit and Voltage Waveforms 10 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74AVCH4T245-EP PACKAGE OPTION ADDENDUM www.ti.com 18-Dec-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty CAVCH4T245MRSVREP ACTIVE QFN RSV 16 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/09618-01XE ACTIVE QFN RSV 16 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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