SL74LS05 Hex Inverters with Open-Drain Outputs This device contains idenpendent inverts. It performs the Boolean function Y=A. The open collector outputs require pull-up resistor to perform correctly. Open-collector devices are often used to generate higher VOH levels. Pull-Up Resistor Equations ORDERING INFORMATION SL74LS05N Plastic SL74LS05D SOIC TA = -0° to 70° C for all packages VCC(Min) - VOH RMAX= N1(IOH) + N2(IIH) VCC(Max) - VOL RMIN= (IOL + N3(IIL) Where: N1(IOH)=total maximumoutput high current for all outputs tied to pull-up resistor N2(IIH)=total input high current for all inputs tied to pull-up resistor N3(IIL)=total input low current for all inputs tied to pull-up resistor PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE PIN 14 =VCC PIN 7 = GND SLS System Logic Semiconductor Inputs Output A Y L H H L SL74LS05 MAXIMUM RATINGS * Symbol Parameter Value Unit VCC Supply Voltage 7.0 V VIN Input Voltage 7.0 V VOUT Output Voltage 7.0 V Tstg Storage Temperature Range -65 to +150 °C * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 5.25 V VCC Supply Voltage 4.75 VIH High Level Input Voltage 2.0 VIL Low Level Input Voltage 0.8 V VOH High Level Output Voltage 5.5 V IOL Low Level Output Current 8.0 mA TA Ambient Temperature Range +70 °C 0 V DC ELECTRICAL CHARACTERISTICS over full operating conditions Guaranteed Limit Symbol Parameter Test Conditions Min Max Unit VIK Input Clamp Voltage VCC = min, IIN = -18 mA -1.5 V IOH High Level Output Current VCC = min, VOH =max 0.1 mA VOL Low Level Output Voltage VCC = min, IOL = 4 mA 0.4 V VCC = min, IOL = 8 mA 0.5 VCC = max, VIN = 2.7 V 20 µA VCC = max, VIN = 7.0 V 0.1 mA IIH High Level Input Current IIL Low Level Input Current VCC = max, VIN = 0.4 V -0.4 mA ICC Supply Current VCC = max Total with outputs high 2.4 mA Total with outputs low 6.6 SLS System Logic Semiconductor SL74LS05 AC ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, CL = 15 pF, TA=25°C, RL = 2 kΩ, t r =15 ns, tf = 6.0 ns) Symbol Parameter Min Max Unit tPLH Propagation Delay Time 32 ns tPHL Propagation Delay Time 28 ns Figure 1. Switching Waveforms NOTE A. CL includes probe and jig capacitance. Figure 2. Test Circuit SLS System Logic Semiconductor