CXA2596M RF Amplifier for CD Players Description The CXA2596M is an IC developed for compact disc players. This IC incorporates an RF amplifier, focus error amplifier, tracking error amplifier, APC circuit and RF level control circuit. (The voltageconverted optical pickup output is supported.) Features • Low power consumption (50 mW at ±2.5 V) • High-band RF amplifier • APC circuit • RF level control circuit (Hold circuit included) • Both single power supply and dual power supply operations possible. • Compatible with pickup for LC and PD Applications Compact disc players 24 pin SOP (Plastic) Absolute Maximum Ratings (Ta=25 °C) • Supply voltage VCC 12 V • Operating temperature Topr –20 to +75 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation 650 mW PD Operating Conditions Supply voltage VCC—VEE 4.5 to 5.5 V Structure Bipolar silicon monolithic IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E99749-TE CXA2596M Block Diagram and Pin Configuration 1k APC PD AMP 1 AGCVTH 56k VCC VEE 10k 55k VCC HOLD 10k 23 LC/PD 2 4 APC LD AMP 10k 22 LD_ON 13.4k VC 50µA VCC PD VREF 1.25V 3 56k 10k VEE LD 24 VCC 21 HOLD_SW 670mV 100k 24k 20 AGCCONT 100k A 5 23.3k 15k 24k B VC 6 44.1k 23.3k 24k C 25.4k 8 23.3k 14k 5k RF SUMMING AMP VC 26k 13k VC F 10 FOCUS ERROR AMP 260k 147 R26 VC RFO 25p 158.45k 14 FE VC 23.8k 26k 30k VCC 30k VEE 158.45k R34 16 15 RFE 23.8k 13k VC BUFFER RF_I RF_EQ_AMP 12p VC VC 12 17 5.7k 87k 820k E 11 RFTC VC 820k 12p 87k 260k 25p VEE 9 18 VC VC 24k VEE 19 RF_BOT 20k VEE 7 23.3k D (60%/40%/OFF) 15k 15k —2— 13 TE TRACKING ERROR AMP VC CXA2596M Pin Description Pin No. Symbol IO Equivalent circuit Description 1 1 HOLD External hold timeconstant pin for RF level control. — 147 500µ VEE Variable pin of reference level for RF level control. The reference level can be varied by the external resistor. 50µ 147 2 AGCVTH — 2 13.4k 10µ VCC VCC 10k 1k 3 LD 55.7k Output pin of APC amplifier. 3 O VEE VCC 17µ 4 PD 55k I 147 4 10k VEE VEE —3— VEE VEE Input pin of APC amplifier. CXA2596M Pin No. Symbol IO Equivalent circuit VCC VCC Description VCC 24k A 5 23.2k 5 6 7 8 A B C D I I I I VCC 25p 24k B 6 14k 174k 23.2k 4.2k 174k 24k C 7 100µ 23.2k VEE 24k D 8 VC 25p Input pin of RF and FE amplifiers for Pins 5, 6, 7 and 8. 8µ VEE VC 23.2k 9 VEE — VEE. VCC VCC VCC VCC VCC VCC 10 11 23 F E LC/PD I I I 147 VCC VCC 12p 12p 403k 403k 10 96.3k 96.3k 8µ 8µ 820k 23 VEE VEE VC 820k 147 11 VCC VCC 200µ 120 12 VC O VC Input pin of tracking error amplifier for Pins 10 and 11. An external resistor for V-I conversion should be connected because these pins are for current input. Pin 23 is a bias for LC when connected to VCC and for PD IC when left open. 147 15k 12 120 VEE —4— 16k DC voltage output pin of (VCC+VEE)/2. Connect to GND when dual power supply (±2.5 V) is used; connect a smoothing capacitor when single power supply (+5 V) is used. CXA2596M Pin No. Symbol IO Equivalent circuit Description VCC 13 TE O 147 158.45k 13 Output pin of tracking error amplifier. The F-E signal is output. 10p 400µ VEE VEE VCC 25p 14 FE O 147 87k 14 Output pin of focus error amplifier. 10p 400µ VEE VEE 25.4k Equalizing pin of RF amplifier. Frequency response can be adjusted by connecting CR to this pin. 25µ 5.7k 15 RFE — 15 5k VCC 147 16 RFO 25.4k Output pin of RF amplifier. 16 O 60k 800µ 147 17 17 RF_I I Input pin of RF amplifier output RFO with capacitance coupled. 15k 20µ —5— CXA2596M Pin No. Symbol IO 18 RFTC — Equivalent circuit Description External time-constant pin for RF level control. 50µ 147 18 50µ 10µ 19 RF_BOT — External bottom timeconstant pin for RF level control. 50µ 147 19 50µ 20µ 15µ 20 AGCCONT I RF level control ON (limit level of 60 % / 40 %)/ OFF switching pin. 60 % for VCC, 40 % for open or VC and OFF for VEE. 15µ 147 20 50k 7µ RF level control hold ON/OFF switching pin. ON for VCC and OFF for VEE. 147 21 HOLD_SW I 21 VCC 50µ 147 22 LD ON I 22 30k VREF VEE 24 VCC ON/OFF switching pin of APC amplifier. ON for VCC and OFF for VEE. VEE VEE VEE VCC — —6— —7— Measurement No. V14-5 V14-4 E1 E2 E3 E4 AC1 AC2 I1 and O Output DC measurement Output voltage 4 Maximum output amplitude V3-5 V3-4 V3-3 2.0 V 0.5 V 2.0 V 2.0 V V3-2 Output voltage 2 1.3 V 1.3 V 1.3 V 0 µA 0 µA 590 µA 410 µA 3 2.0 V V3-1 Output voltage 1 1.3 V Output DC measurement 230 µA 3 1.3 V Output DC measurement 270 mV 13 O O V13-6 Maximum output amplitude L Output DC measurement LD OFF I2=0.8 mA 3 3 30.0 0 0 — — 3.0 35 –1.9 — 2.1 0.6 –1.5 — — 1.9 –3.0 –1.9 — 3.0 — 2.3 2.0 0 0 — — 1.1 –1.7 –0.3 — — 0 21.9 24.9 27.9 21.9 24.9 27.9 –35 1.9 –3.0 14.3 17.3 20.3 14.3 17.3 20.3 0 –2 V V V V V V V dB dB dB mV V V dB dB dB mV V V dB mV mA mA ∗ O in the SW conditions represents the ON state. Output DC measurement Output DC measurement 3 V13-4=V13-2–V13-3 Output AC measurement Output AC measurement Output DC measurement 270 mV 13 13 13 O 140 mVp-p 1 kHz 140 mVp-p 13 O Output DC measurement 13 V13-4 1 kHz Output DC measurement Output DC measurement 14 Input GND V15-4=V15-2–V15-3 Output AC measurement Output AC measurement Maximum output amplitude H V13-5 O 700 mV 14 14 14 14 Output DC measurement –30.0 Voltage gain difference O O 700 mV 1 kHz 200 mVp-p Input GND V13-3 O O 1 kHz 200 mVp-p 14 — — — Output DC measurement — 2.2 Output DC measurement 16 25 16 Voltage gain 2 O O –280 mV 280 mV 0 –6.5 13.5 19.9 22.9 25.9 V13-2 23 10 Output AC measurement Voltage gain 1 Output voltage 3 6.5 Min. Typ. Max. Unit 16 V13-1 O O O O 100 mVp-p 1 kHz 16 Output DC measurement measurement method Offset voltage 1 Maximum output amplitude H V14-6 Maximum output amplitude L Voltage gain difference O V14-2 Voltage gain 1 V14-3 V14-1 Offset voltage O O O O O O O O O O V16-4 Maximum output amplitude L V16-2 Voltage gain Maximum output amplitude H V16-3 O O O O V16-1 Voltage gain 2 9 10 –25 8 Input GND 7 –13.5 –10 6 Input GND 5 Input GND 4 9 3 Description of I/O waveform 24 2 Bias conditions IEE 1 SW conditions ±2.5 V power supply (VCC=2.5 V, VEE=–2.5 V, VC=GND) ICC Symbol Offset voltage 1 Current consumption Measurement item 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 RF amplifier FE amplifier TE amplifier APC Measurement pin Electrical Characteristics CXA2596M Measurement No. 31 30 29 28 27 26 25 24 RF level control Center output voltage characteristics 2 Response characteristics 1 Response Hold characteristics V12-1 V1-3 V1-2 V1-1 V3-9 V3-8 –60 % limit –40 % limit O O O O 4 V3-7 3 40 % limit 2 O O O O 1 5 6 O O 7 SW conditions V3-6 Symbol 60 % limit Measurement item 8 O O 9 10 50 mV 50 mV E1 2.0 V 2.0 V 2.0 V 2.0 V E2 1.8 V/1.3 V 3.8 V/1.3 V 3.3 V/1.3 V 3.8 V/1.3 V E4 1V 1V 3.8 V/1.3 V 3.8 V/1.3 V 4 V/1 V 3.8 V/1.3 V E3 AC1 Bias conditions 1.6 Vp-p 100 kHz 1.6 Vp-p 100 kHz AC2 170 µA 170 µA 700 µA 700 µA I1 Measurement pin 12 1 1 1 3 3 3 3 —8— –100 98 98 –10 — — — –2 100 100 100 0 mV % % mV 598 1098 1598 mV 1550 2350 2800 mV –1620–1120 –120 mV –2950–2350–1150 mV Min. Typ. Max. Unit ∗ O in the SW conditions represents the ON state. Output DC measurement (V (t=1 ms)–V (t=0 ms))/(steady value–V (t=0 ms)) → 60 % (t=0 ms) HOLD OFF Level control OFF (V (t=1 ms)–V (t=0 ms))/(steady value–V (t=0 ms)) → OFF (t=0 ms) HOLD OFF Level control 60 % V (t=100 ms)–V (t=0 ms) Level control 60 % → OFF (t=10 ms) HOLD OFF → ON (t=0 ms) –Level control OFF (E4 : 0.5 V) Level control : –40 % (E4 : 2.5 V) –Level control OFF (E4 : 0.5 V) Level control : –60 % (E4 : 4 V) –Level control OFF (E4 : 0.5 V) Level control : 40 % (E4 : 2.5 V) –Level control OFF (E4 : 0.5 V) Level control : 60 % (E4 : 4 V) measurement method and Description of I/O waveform CXA2596M CXA2596M C1 2 AGCVTH 3 LD 4 PD 5 A VCC A HOLD 24 1 GND GND VEE 33µ C3 0.33µ 23 22 21 AGCCONT 20 0.8mA VEE E2 I1 VEE R1 E3 VCC VEE HOLD_SW S8 I2 VCC LD_ON VCC S9 LC/PD 300 GND E4 VEE S1 S2 RF_BOT 7 C RF TC C3 0.01µ 19 6 B GND GND GND GND GND GND R1 1M S3 18 R1 1M C3 0.01µ S4 RF_I 17 8 D 10k C4 33µ S5 R2 RFE 11 E FE 15 10 F GND R3 AC2 RFO 16 9 A VEE GND VEE 150k R4 R8 10k 150k E1 10k —9— GND TE 13 12 GND R9 VC GND S6 S7 14 AC1 GND Electrical Characteristics Measurement Circuit S10 CXA2596M Description of Functions RF Amplifier Each signal current from the photodiodes A, B, C and D is I-V converted, and input to Pins 5, 6, 7 and 8. These signals are added by the RF summing amplifier and equalized by the RF equalizing amplifier and then output to Pin 16. When the RF signal is equalized, an equalizing circuit is added to Pin 15. A I-V 5 24k A 15 RFE 5.7k RF SUMMING AMP B I-V 6 24k B RF EQAMP 14k 25.4k 16 5k C I-V 24k D RFOUT 7 C I-V RFO 4.2k 4.3k 8 24k D VC VC GND Focus Error Amplifier The operation of (B+D)–(A+C) is performed and the signal is output to Pin 14. A I-V 5 23.3k A B I-V 6 23.3k B C I-V 25p 87k 7 14 23.3k C 25p D I-V D 87k 8 23.3k VC GND —10— FOCUS ERROR AMP FE FEOUT VCC CXA2596M Tracking Error Amplifier Each signal current from the photodiodes E and F is I-V converted and input to Pins 10 and 11 via an input resistor which determines the gain. The signal is amplified by the gain amplifier, operated by the tracking error amplifier and then the (F-E) signal is output to Pin 13. Pin 23 can be used as a bias for LC when connected to VCC and as a bias for PD IC when left open. 260k 23 26k VC VC F I-V 150k 23.8k 13 820k E 158.45k 10 150k I-V 13k 820k 11 12p 23.8k 260k 26k VC VC LC/PD TRACKING ERROR AMP 158.45k 13k VC 12p GND —11— TE TEOUT CXA2596M APC & Laser Power Control VCC R1 22 C3 100µ LD 3 R6 1k VCC L1 10µH PD C1 1µ R14 10k 4 LD ON R16 56k MICRO COMPUTER 22 R3 100 R2 500 LD PD GND R7 55k R5 10k VEE HOLD_SW R17 56k R15 10k 21 VEE MICRO COMPUTER ×1 Vhold HOLD 1 VL VEE 50µA R18 VCC V2 AGCVTH 13.4k 2 RFO 16 R11 44.1k C2 0.01µ RF_I VEE 17 R6 R13 100k 15k R4 15k R12 100k V1 19 18 RFTC RF_BOT R9 1M C4 0.1µ R19 1M VEE C5 1µ VEE —12— R20 12.5k AGCCONT 20 670mV R10 20k C6 10µ VREF 1.25V VEE MICRO COMPUTER CXA2596M • APC When the laser diode is driven by a constant current, the optical power output has extremely large negative temperature characteristics. The APC circuit is used to maintain the optical power output at a constant level. The laser diode current is controlled according to the monitor photodiode output. APC is set to ON by connecting the LD ON pin to VCC ; OFF by connecting it to VEE. • Laser Power Control (LPC) The RF level is stabilized by attaching an offset to the APC VL and controlling the laser power in sync with the RF level fluctuations. The RFO and RF_I levels are compared and the larger of the two is smoothed by the RFTC’s external CR. This signal is then compared with the reference level. The laser power is controlled by attaching an offset to VL according to the results of comparison with the reference level. Set the reference level to 670 mV. (center voltage reference) When the reference level is changed, connect the external resistor to the AGCVTH pin (Pin 2). The reference level can be raised by connecting the resistor between Pin 2 and the center output voltage or between Pin 2 and VCC. The AGCCONT pin (Pin 20) is used to switch the level of the laser power control circuit ; OFF, ON (laser power limit of 40 %) and ON (laser power limit of 60 %). The HOLD_SW pin (Pin 21) is used to switch the hold ON and OFF for the VL signal. Set this pin to ON so as not to follow the fluctuation of the RF signal. AGCCONT L (VEE) M (VC or OPEN) H (VCC) LPC OFF ON ON LPC limit — 40 % 60 % VL variable range Approximately 1.27 V Approximately 1.27 V±350 mV Approximately 1.27 V±570 mV —13— CXA2596M The hold ON/OFF operation is approximately as follows. 1. HOLD : Operation for OFF (a) | VL–Vhold | ≥2VT (VT≈26 mV) VL ×1 Vhold 21 HOLD IC C VEE VEE (typ.) Ic=500 µA (VL<Vhold) –500 µA (VL>Vhold) (b) | VL–Vhold | <2VT VL ×1 R Vhold 21 HOLD C VEE (typ.) R=105 Ω 2. HOLD : Operation for ON ×1 21 HOLD Vhold IB C VEE VEE (typ.) Ib=6.5 nA —14— CXA2596M Center Voltage Generation Circuit This circuit provides the center potential when this IC is used at single power supply. The maximum current is approximately ±3 mA. The output impedance is approximately 147 Ω. Connect this circuit to GND when used at dual power supply. VCC VCC 30k 33µ/6.3V VC BUFFER VC 12 VC 147 30k 33µ/6.3V 15k VEE VEE Notes on Operation 1. Power supply The CXA2596M can be used either at dual power supply or single power supply. The table below shows the connection of power supply for each case. Dual power supply Single power supply VCC +power supply Power supply VEE –power supply GND VC GND OPEN 2. Laser power control The RF level is stabilized by attaching an offset to the APC VL and controlling the laser power in sync with the RF level fluctuations. Therefore, use this circuit in the state where the focus servo is applied. The laser life is shortened by increasing the laser power when the less light is reflected from the disc. It is recommended that the typical laser power value is set lower to maintain the laser life. The laser power limit value depends on the external circuit. Select the laser power limit setting considering the external conditions. Take care of the laser maximum ratings when using the laser power control circuit. —15— CXA2596M SSP SSP SSP VCC VC 14 13 1µ 20 33µ/6.3V 1MEG MICRO COMPUTER 21 GND 0.1µ MICRO COMPUTER 22 GND 1MEG MICRO COMPUTER +5V Application Circuit • For single power supply +5 V RF_I RFO C D VEE F E VC 4 5 6 7 8 9 10 11 12 150k 150k I_V F D VC E I_V I_V I_V 33µ/6.3V I_V B A C I_V 100 500 1µ/6.3V 10µH 10µ VC PD LD 22 100µ/6.3V GND TE RF TC B 3 RFE RF_BOT A 2 (60%/40%/OFF) HOLD_SW 1 VCC PD FE 15 LD_ON 16 LD 17 LC/PD 18 AGCVTH 19 HOLD 23 AGCCONT 0.01µ 24 GND GND VCC SSP SSP 14 13 1µ SSP 33µ/6.3V 1MEG MICRO COMPUTER 20 VEE 0.1µ MICRO COMPUTER 21 1MEG MICRO COMPUTER 22 VEE VCC GND +2.5V • For dual power supply +2.5 V RF_I RFO C D VEE F E VC 4 5 6 7 8 9 10 11 12 150k 150k E F I_V I_V I_V 33µ/6.3V D I_V C I_V B 100 I_V A VEE GND GND GND PD LD 22 500 1µ/6.3V 10µH 10µ 100µ/6.3V GND TE RF TC B 3 RFE RF_BOT A 2 (60%/40%/OFF) HOLD_SW 1 VCC PD FE 15 LD_ON 16 LD 17 LC/PD 18 AGCVTH 19 HOLD 23 AGCCONT 0.01µ 24 GND VEE VCC Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. —16— CXA2596M Unit : mm 24PIN SOP (PLASTIC) + 0.4 1.85 – 0.15 + 0.4 15.0 – 0.1 0.15 24 0.24 6.9 + 0.2 0.1 – 0.05 1.27 + 0.1 0.2 – 0.05 0.5 ± 0.2 12 1 0.45 ± 0.1 7.9 ± 0.4 13 + 0.3 5.3 – 0.1 Package Outline M PACKAGE STRUCTURE MOLDING COMPOUND EPOXY RESIN SONY CODE SOP-24P-L01 LEAD TREATMENT SOLDER PLATING EIAJ CODE SOP024-P-0300 LEAD MATERIAL 42/COPPER ALLOY PACKAGE MASS 0.3g JEDEC CODE —17—