SONY CXA3174N

CXA3174N
AGC IF for GSM/PCS
For the availability of this product, please contact the sales office.
Description
The CXA3174N is a 4-bit digital control variable
gain amplifier suitable for the communications.
20 pin SSOP (Plastic)
Features
• Gain control amplifier with the wide gain variable
range
• Doubler circuit for the LO (local) signal eliminates
need for the phase shifter
Absolute Maximum Ratings (Ta = 25 °C)
• Supply voltage
VCC
14
• Operating temperature range
Topr
–35 to +80
• Storage temperature range
Tstg
–65 to +150
Functions
• IF signal gain control circuit
• I/Q quadrature demodulator
• Doubler circuit for the LO signal
• Gain control by the 4-bit digital data
• Power saving
Operating Conditions
Supply voltage
VCC
Applications
GSM and PCS portable telephones
V
°C
°C
2.7 to 3.3
V
Structure
Bipolar silicon monolithic IC
IXOUT
IOUT
NC
NC
GND
VCC
IFIN
IFINX
NC
PS
Block Diagram and Package Outline
20
19
18
17
16
15
14
13
12
11
Reg
Gain Control AMP
Phase
Shifter
Gain Cont
QOUT
NC
LOIN
NC
6
7
8
9
10
NC
5
VC1
4
VC2
3
VC3
2
VC4
1
QXOUT
×2
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
—1—
E96932A8Z
CXA3174N
Pin Description
Pin
No.
1
Symbol
Pin voltage
Equivalent circuit
Description
QXOUT
Q inverted signal output.
VCC
2
QOUT
Q signal output.
5.4k
1.5 V
19
1
2
IOUT
I signal output.
19
20
20
IXOUT
3
5
10
12
17
18
NC
GND
I inverted signal output.
—
Not connected.
VCC
4
LOIN
1.3 V
4
2k
500
Local signal input.
2k
GND
6
VC4
AGC control signal input. MSB.
VCC
7
VC3
AGC control signal input. 3LSB.
40k
—
8
VC2
6
7
AGC control signal input. 2LSB.
8
9
9
GND
VC1
AGC control signal input. LSB.
—2—
CXA3174N
Pin
No.
Symbol
Pin voltage
Equivalent circuit
Description
VCC
40k
11
PS
—
Power saving control.
11
60k
GND
VCC
13
IFINX
IF inverted signal input.
13
1.25 V
800
14
1.1k
14
1.1k
IF signal input.
IFIN
GND
15
VCC
—
Power supply.
16
GND
—
Ground.
—3—
CXA3174N
Electrical Characteristics
VCC = 3.0 V, Ta = 27 °C
Item
Symbol
Current consumption
ICC
Current consumption
for standby
IF input
frequency range
ICCps
Conditions
PS=0 V
Gmax
Minimum gain
Gmin
Gain variable step
Gstep
Gain setting deviation
Gdev
∗1, ∗2
VC1, 2, 3, 4 = all “Low”
Temperature fluctuation : ±2 dB
IF input level : –80 dBm
(330 Ω conversion)
∗1, ∗2
VC1, 2, 3, 4 = all “High”
Temperature fluctuation : ±2 dB
IF input level : –20 dBm
(330 Ω conversion)
mA
10
100
µA
20
MHz
–3
0
–3
dB
4
–3
5
LO input level
LOINv
30
∗1
∗2
15
dB
LOINf
I/Q output
amplitude deviation
10
63
LO input
frequency range
I/Q output
maximum amplitude1
I/Q output
maximum amplitude2
I/Q output
maximum amplitude3
I/Q output
maximum amplitude4
Unit
60
Gt
I/Q output
signal amplitude
Max.
57
Gain setting time
I/Q output
frequency range
Typ.
5
IFINf
Maximum gain
Min.
55
IQf
IQv
IQvmax1
IQvmax2
IQvmax3
IQvmax4
IQvdev
Differential I/Q output amplitude ∗1, ∗2
10 kΩ load IF input level : –20 dBm
(330 Ω conversion) Gain=0 dB
Differential I/Q output amplitude
∗2
10 kΩ load Gain=60 dB
Differential I/Q output amplitude
∗2
10 kΩ load Gain=40 dB
Differential I/Q output amplitude
∗2
10 kΩ load Gain=20 dB
Differential I/Q output amplitude
∗2
10 kΩ load Gain=0 dB
Differential I/Q output amplitude ∗1, ∗2
10 kΩ load IF input level : –20 dBm
(330 Ω conversion) Gain=0 dB
The IF input level is the value of C4 in the Application Circuit.
The measured value is for the differential output.
—4—
dB
+3
dB
5
µS
20
MHz
80
mVrms
2000
kHz
91
mVp-p
45
64
2.0
2.7
Vp-p
2.0
2.4
Vp-p
400
480
mVp-p
210
250
mVp-p
–0.5
0.5
dB
CXA3174N
Item
Symbol
Conditions
Differential I/Q output
I/Q output
phase deviation1
IQpdev1
I/Q output
phase deviation2
IQpdev2
I/Q output DC voltage
IQvdc
I/Q output
DC voltage deviation
IQvdcd
Min.
Typ.
Max.
Unit
–2.5
2.5
deg
–2.5
2.5
deg
1.6
V
30
mV
∗1, ∗2
10 kΩ load IF input level : –20 dBm
(330 Ω conversion) Gain=0 dB
LO input level : 30 mVrms
∗1, ∗2
Differential I/Q output
10 kΩ load IF input level : –20 dBm
(330 Ω conversion) Gain=0 dB
LO input level : 80 mVrms
1.4
I-IX, Q-QX
Output voltage difference
1.5
–30
Noise figure1
NF 1
Gain=60 dB
22.5
dB
Noise figure2
NF 2
Gain=20 dB
40
dB
IP31
Gain=60 dB, 330 Ω conversion
∗1
–49
dBm
IP32
Gain=20 dB, 330 Ω conversion
∗1
–30
dBm
Tertiary intercept
point1
Tertiary intercept
point2
VpsL
0
0.8
V
VCvH
2.2
VCC+0.3
V
VCvL
0
0.8
V
VCr
30
LOIN input resistance
LOINr
1.4
2
2.6
kΩ
IFIN input resistance
IFINr
Differential input
1.5
2.2
2.9
kΩ
IFIN input level
IFINv
330 Ω conversion
–90
–10
dBm
PS input ON voltage
Logic input
High voltage
Logic input
Low voltage
Logic input
resistance
—5—
kΩ
CXA3174N
Design Reference
Item
Symbol
LOIN input
capacitance
IFIN input
capacitance
∗1
∗2
Conditions
Min.
LOINc
IFINc
Differential input
Typ.
Max.
Unit
2
pF
1.2
pF
The IF input level is the value of C4 in the Application Circuit.
The measured value is for the differential output.
Control 1
Power saving
Pin 11 (PS)
Power saving
IC status
H
off
Active
L
on
Sleep
Control 2
Pin No.
Symbol
MAX
MIN
Gain setting
6
VC4
MSB
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
7
VC3
3LSB
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
8
VC2
2LSB
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
9
VC1
LSB
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
4-bit
display
“0000”
“0001”
“0010”
“0011”
“0100”
“0101”
“0110”
“0111”
“1000”
“1001”
“1010”
“1011”
“1100”
“1101”
“1110”
“1111”
Setting gain
(dB)
60
56
52
48
44
40
36
32
28
24
20
16
12
8
4
0
Note on Operation
Take care to handle the IC because the electrostatic discharge strength is weak for Pins 6, 7, 8, 9 and 11.
—6—
CXA3174N
Gain control characteristics
VCC=3.0V, Ta=27°C
60
50
Upper
Gain (dB)
40
30
6dB width
20
Lower
10
0
1111
1010
0101
0000
Gain setting value (4bits)
Example of gain control temperature characteristics
VCC=3.0V
60
-35°C
Rt
80°C
50
Gain (dB)
40
30
20
10
0
1111
1010
0101
Gain setting value (4bits)
—7—
0000
CXA3174N
Electrical Characteristics Measurement Circuit
S1
C6
IXOUT
C5
IOUT
C2
C4
R4
1µ
19
S2 QOUT
IXOUT
1µ
10k
GND
QOUT
R3
2
1µ
P2
P20
S8
IXOUT
10k
GND
QOUT C2
R2
20
QXOUT
QXOUT C1
C1
C3
R1
1
1µ
10k
GND
GND
P1
QXOUT
10k
IOUT
S7
IOUT
P15
VCC
P14
IFIN
Phase
Shifter
P19
GND
18
3
GND
NC
NC
P4
LOIN
4
NC
GND
GND
LOIN
×2
1µ
R5
GND
S3
17
C5
LOIN C3
10µ
C7
50
GND
GND
VCC
GND
VC4
C8
0.01µ
S6
R6
390
C4
S4
1000p
P13
IFINX
P11
PS
GND
Reg
11
10
GND
—8—
PS
IF
S5
NC
VC1
NC
R7
280
12
9
P9
1000p
13
IFINX
VC2
VC1
IFIN
C9
C10
8
P8
Gain Cont
VC3
VC2
14
P7
7
VC3
1000p
15
6
P6
16
Gain Control AMP
5
GND
VC4
NC
C6
CXA3174N
Application Circuit
20
1
QXOUT C1
IXOUT
QXOUT
GND
GND
1µ
10k
QOUT
IOUT
10k
GND
Phase
Shifter
GND
1µ
NC
6.8p to 45p
1000p
390
SAW
IF
1000p
GND
12
NC
VC1
VCC
0.01µ
13
9
P9
P15
C4
IFINX
VC2
VC1
IFIN
GND
14
8
P8
Gain Cont
VC3
VC2
1000p
VCC
7
P7
GND
VC4
VC3
10µ
15
6
P6
GND
GND
5
NC
16
Gain Control AMP
GND
GND
VC4
LOIN
NC
GND
5.6µ
1µ
×2
5p
IOUT
10k
17
4
LOIN C3
C5
1µ
GND
18
3
GND
NC
IXOUT
10k
19
2
QOUT C2
C6
1µ
Reg
11
10
GND
NC
P11
PS
PS
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
—9—
CXA3174N
Package Outline
Unit : mm
20PIN SSOP (PLASTIC)
+ 0.2
1.25 – 0.1
∗6.5 ± 0.1
0.1
11
20
1
6.4 ± 0.2
∗4.4 ± 0.1
A
10
0.65
b
(0.15)
(0.22)
0.5 ± 0.2
0.1 ± 0.1
DETAIL B : SOLDER
b=0.22 ± 0.03
+ 0.03
0.15 – 0.01
+ 0.1
b=0.22 – 0.05
+ 0.05
0.15 – 0.02
0.13 M
DETAIL B : PALLADIUM
NOTE: Dimension “∗” does not include mold protrusion.
0° to 10°
PACKAGE STRUCTURE
DETAIL A
PACKAGE MATERIAL
EPOXY RESIN
SONY CODE
SSOP-20P-L01
LEAD TREATMENT
SOLDER / PALLADIUM
PLATING
EIAJ CODE
SSOP020-P-0044
LEAD MATERIAL
42/COPPER ALLOY
PACKAGE MASS
0.1g
JEDEC CODE
NOTE : PALLADIUM PLATING
This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame).
—10—