WT9051 Data Sheet REV1.0 PIN DESCRIPTION Pin No. Pin Name Description 1 GND1 The main ground pin for the 2 vertical circuit and the I C bus circuit. 2 VOSC Connect the capacitor for oscillation of vertical saw wave. Please connect near pin, because series resistance component distorts Rising waveform of the vertical saw waveform. Use the capacitor of the small temperature drift. Internal Equivalent Circuit Wave Form GND1 1 VCC 25uA 250uA 10uA 5.7V 10KΩ 2KΩ 1KΩ 2.7V fv 2 5KΩ 1.25KΩ GND1 GND2 3 VAGC Connect the capacitor for AGC of vertical saw Amplitude of vertical saw wave is held constant by the AGC circuit. DC Voltage=3~4V Vcc 5KΩ 1.25KΩ 1KΩ 5KΩ 3 5KΩ GND2 5KΩ GND1 Weltrend Semiconductor, Inc. Page 3 5KΩ WT9051 Data Sheet REV1.0 4 VSAWO The vertical tical linearity S/C compensation are added to the vertical saw wave form Vcc 2.5KΩ 5KΩ Refers the following picture image of correction 5KΩ 4 5KΩ 3Vp-p 2.5KΩ 5KΩ 2.5KΩ GND1 80KΩ fv GND2 5 EWO Outputs the compensation Vcc signal of the trapezoid, the side pin, the side pin corner and the horizontal size. 5 1KΩ 5KΩ Refers the following picture image of correction 5KΩ 5KΩ 333Ω 5KΩ GND2 6 VEI GND1 Input the High voltage of the Vcc 25uA EHT. For, it cancel a transient 370uA response 5KΩ 5KΩ of the deflecting voltage. If this pin isn’t used, connect 5KΩ 10uF capacitor to GND. DC voltage=4V 5KΩ 4V 10KΩ 10KΩ 6 GND2 7 HEI 10KΩ Input the High voltage of the Vcc EHT. For, it cancel a transient 5KΩ response of the deflecting voltage. If this pin isn ’t used, connect 4.0V 10KΩ 10uFcapacitor to GND. 2.5KΩ Weltrend Semiconductor, Inc. Page 4 DC Voltage=4V 5KΩ 10KΩ 5KΩ 23.33KΩ 7 GND1 2.5Ω 2.5KΩ WT9051 Data Sheet REV1.0 8 DFMIXO Outputs the mixed signal of horizontal and vertical parabola wave for dynamic focus signal. Vcc 2.5KΩ 5KΩ 8 2.5KΩ 10KΩ 2.5KΩ 5KΩ 5KΩ 80KΩ 2.5KΩ GND2 9 HPHASE-C Connect the capacitor 10 μF Vcc AP to GND 10KΩ 9 1.67KΩ 1KΩ 14KΩ 2.5KΩ GND2 10 HDSA Connect the capacitor for oscillation of Horizontal dynamic focus signal. DC Voltage=3~4V Vcc 5KΩ 5KΩ 10 5KΩ 5K Ω 5KΩ 2.5KΩ GND2 11 BAMPI The input of the error Vcc amplifier for the high voltage control. 50uA 5KΩ 100uA 2.5KΩ 5KΩ 11 5KΩ 5KΩ Weltrend Semiconductor, Inc. Page 5 5KΩ DC Voltage WT9051 Data Sheet REV1.0 12 BAMPO Outputs the voltage to control the PWM pulse width. Vcc DC Voltage 1KΩ 5KΩ 5KΩ 12 1KΩ 5KΩ GND2 13 PSAW Connect the capacitor and the resistance for oscillation of PWM. Vcc 5kΩ 5KΩ V12pin 1.7V 13 400Ω 1V 5KΩ fH 300KΩ GND2 14 PWMO Outputs the PWM pulse Vcc 25uA 25uA 3.33KΩ 30KΩ Please connect the drive 20KΩ 30KΩ transistor, because it doesn't have an enough driving force. 14 0.7V 0V 5KΩ fH 30KΩ 5KΩ GND2 15 16 GND2 VCC The main ground pin for the horizontal circuit. 15 GND2 Input 12volts for the power supply. 16 Vcc Weltrend Semiconductor, Inc. Page 6 DC voltage=12V WT9051 Data Sheet REV1.0 17 HOUT Outputs the horizontal derive Vcc pulse 20K 20K 50K 17 7.5KΩ 0.7V 3KΩ 0V GND2 fH 18 FBP Input the fly back pulse Vcc 50uA 100uA 5KΩ 5V 2.5KΩ 10KΩ 18 0V 5KΩ 10KΩ fH GND2 19 XRAY The input pin for the X ray protection. Vcc 25uA 5KΩ 25uA The bias voltage of the outside 5KΩ 5KΩ 19 GND2 20 VREF Outputs the internal reference Vcc 25uA 25uA 106uA DC voltage=5V voltage, and creates a 5KΩ 5KΩ 5KΩ internal Reference current by the resistance. Please connect 10KΩ 10KΩ the resistor and Capacitor near this pin, because noise component 38KΩ input to this pin affects 20 Horizontal jitter. A current 10KΩ 12KΩ control function is not GND2 provided, such that an External circuit cannot use the voltage output from this pin. Weltrend Semiconductor, Inc. Page 7 WT9051 Data Sheet REV1.0 21 HFVO Outputs the voltage tracking to the horizontal frequency. Please connect the resistor and capacitor near this pin, because noise component input to this pin affects horizontal jitter Vcc 25uA DC voltage tracking to the horizontal frequency 25uA 10KΩ 10KΩ 15KΩ 5KΩ 15KΩ 25KΩ 25KΩ 5KΩ 4.8V 21 5KΩ 5KΩ GND2 22 HFVR Vcc Creates the current for the horizontal oscillator. Please 825Ω connect this resistor near this pin, because noise component input to this pin affects horizontal jitter. 25uA Same voltage that pin21 25uA 10KΩ 10KΩ 15KΩ 15KΩ 22 5KΩ 5KΩ GND2 23 HOSC Please connect the capacitor (390pF) for horizontal oscillation. Vcc 463uA 2.5KΩ 1.25KΩ 23 9.9V 4.9V fH 1.25KΩ GND2 24 HAFC Creates the current for the Vcc horizontal oscillator. Please connect this resistor near this pin, because noise component input to this pin affects horizontal jitter. Please connect the capacitor 24 (390pF) for horizontal oscillation. Connect the filter for the auto frequency control of horizontal. Following is the item that the filter affects GND2 jitter. The time constant of the filter The noise of the Vcc and GND. Connect resistor and capacitor near this pin. Weltrend Semiconductor, Inc. Page 8 2.5KΩ 1.67KΩ 3.5V 5KΩ 24KΩ 5KΩ 5KΩ 8KΩ fH WT9051 Data Sheet REV1.0 25 HLO The lock detection output of the horizontal oscillator Vcc 10uA 5V 20KΩ 10uA 2.5KΩ DC voltage 2.5KΩ 5KΩ 25 5KΩ 5V Lock 5KΩ 0V Unlock GND2 26 HIN The separate horizontal sync Vcc 50uA 50uA signal input is a direct 5KΩ 5KΩ connection. 5KΩ 5KΩ 5.0V 10KΩ 85Ω 26 0.0V fH 5KΩ 5KΩ 5KΩ separate sync GND2 27 VIN The separate Vertical sync signal input is a direct Vcc 5V connection. 4.7V 5KΩ 2.5V 5KΩ 0V 27 500Ω fv separate sync 5KΩ GND2 28 BLKO Outputs the following 3 items 2 by I C bus. The mixed signal Vcc of the vertical blanking pulse and the video clamp pulse. The vertical blanking pulse only. The video clamp pulse 28 only. 5KΩ GND1 2.5KΩ 5KΩ Refers figure. Weltrend Semiconductor, Inc. Page 9 following 10KΩ 5V 10KΩ GND2 the 2V GND1 GND WT9051 Data Sheet REV1.0 29 SDA Input the serial data, and outputs the acknowledge of the I 2 C bus. Vcc 10uA 10KΩ 20uA 5KΩ 5V 5KΩ 29 0V 100KΩ GND2 30 SCL Input the serial clock of I 2 C bus. The clock frequency Vcc corresponds to 400 KHZ GND1 10uA 20uA 5V 10KΩ 5KΩ 0V 5KΩ 30 GND2 Weltrend Semiconductor, Inc. Page 10 GND1 WT9051 Data Sheet REV1.0 Picture Image of Correction Vertical Output Stage Function Output Control Control Output Wave form Pin Sub Condition Address Vertical Size 4 0BHEX 00HEX Correction D7~D0 (8bits) Image 2.0Vp-p FFHEX 3.0Vp-p Vertical Linearity 4 S Correction 0DHEX D6~D0 (7bits) 01HEX 240mVp-p 3.0Vp-p 7FHEX 240mVp-p 3.0 Vp-p Vertical Linearity 4 C Correction 0EHEX D6~D0 (7bits) 01HEX 135mVp-p 3.0Vp-p 7FHEX 135mVp-p 3.0Vp-p Notice: 1. The output amplitude depends on vertical saw wave amplitude(“output amplitude” shows the wave form when the vertical saw wave is 3.0 Vp-p) 2. Vertical Linearity S or C corrections are OFF status when DAC value is 00H. Weltrend Semiconductor, Inc. Page 11 WT9051 Data Sheet REV1.0 E/W Output Stage Function Trapezoid Correction Control Output Control Control Inside Wave form Pin Sub Condition Address 01HEX 5 0AHEX D6~D0 (7bits) 5VDC 0.56Vp-p Image 7FHEX 0.56Vp-p 5VDC Side Correction Control Pin 5 09HEX D6~D0 (7bits) 00HEX 5VDC 0Vp-p 1.45Vp-p 7FHEX Side Pin Corner 5 Top Correction Control 07HEX D6~D0 (7bits) 00HEX 5VDC 5VDC 0.34Vp-p 7FHEX 0.34Vp-p Side Pin Corner 5 Bottom Correction Control 08HEX D6~D0 (7bits) 00HEX 5VDC 5VDC 0.34Vp-p 7FHEX 0.34Vp-p 5VDC Notice1The output amplitude depends on vertical saw wave amplitude(output amplitude shows the waveform when the vertical is 3.0Vp-p.2. Trapezoid or side pin correction is OFF status when DAC value is 00H.3Side Pin Corner Top/Bottom is 0FF status when both DAC(SPCT and SPCB)value are 00H. Weltrend Semiconductor, Inc. Page 12 WT9051 Data Sheet REV1.0 Horizontal Phase Stage Function Parallelogram Correction Control Output Control Control Inside Wave form Pin Sub Condition Address 01HEX -04HEX D6~D0 (7bits) 2.5VDC 0.48Vp-p Image 7FHEX 0.48Vp-p 2.5VDC Side Balance Correction Control Pin -- 03HEX D6~D0 (7bits) 01HEX 2.5VDC 0.46Vp-p 7FHEX 0.46Vp-p Side Pin Corner -Balance Top Correct Control 05HEX D6~D0 (7bits) 00HEX 2.5VDC 2.5VDC 0.31Vp-p 7FHEX 0.31Vp-p Side Pin Corner -Balance Bottom Correction Control 06HEX D6~D0 (7bits) 00HEX 2.5VDC 2.5VDC 0.31Vp-p 7FHEX 0.31Vp-p 2.5VDC Notice: 1. The output amplitude depends on vertical saw wave amplitude(output amplitude shows the waveform when the vertical is 3.0Vp-p. 2. Trapezoid or side pin Balance correction is OFF status when DAC value is 00H. 3. Side Pin Corner Balance Top/Bottom are 0FF status when both DAC(SPCT and SPCB)value are 00H. Weltrend Semiconductor, Inc. Page 13 WT9051 Data Sheet REV1.0 FUNCTIONAL DESCRIPTION I 2 C Bus Interface 1. Serial Bus(I 2 C Bus)Interface 2 (1) I C Bus Overview 2 The I C bus is a dual bi-directional serial bus, developed by Philips. It is configured with two lines –a serial data line(SDA)and a serial clock line(SCL). 2 The WT9051 features a built-in I C bus interface circuit,20 8-bit rewritable registers, and one 8-bit read-only register that is used for indicating the internal status of the IC and so on. These are used in write mode(slave receive)and read mode(slave transmit). (2) Data Transmission Format The transmission format features a sub address in write mode only. Data is configured in 8-bit units, after which an acknowledge bit must be appended. Note that data transmission is performed by transmitting the most significant bit(MSB)first. The data to be transmitted immediately after the issue of the start conditions is the slave address used to select the address of the WT9051.This address is configured using seven bits, with the remaining one bit being the data direction bit, used to set the direction of the subsequently transmitted data. Read involves transferring data from the WT9051 to the master device, while write involves transferring data from the master device to the WT9051. Set 1 for read, or 0 for write. An example of the data transfer format is shown below. 1.Write Mode(Slave Receive) The slave address is read into the first byte, the sub address is read into the second byte, while the data can be read into the third and subsequent bytes. By using the sub address auto-increment function, data can be read out continuously. (A)1-byte transfer format STA SLV 7bit W A 1bit SUB 1bit A 8bit DATA 1bit A 8bit STP 1bit (B) Continuous byte transfer format STA SLV 7bit W 1bit A SUB 1bit A 8bit DATA1 1bit DATA 8bit Weltrend Semiconductor, Inc. Page 14 A 8bit A 1bit 1bit STP WT9051 Data Sheet REV1.0 2.Read Mode(Slave Transmit) The slave address is transmitted from the first byte and data is transmitted from the second and subsequent bytes. When no acknowledgement bit is received from the master device, release the SDA line. Do not return an acknowledge signal before issuing the stop conditions. STA SLV R 7bit 1bit *Remarks ・STA :Start condition ・SLV :Slave address ・W/R :Data direction bit W :Write mode (slave receive) R :Read mode (salve transmit) ・Data :Data ・Sub :Sub address ・A/NA :Acknowledge bit A :acknowledge N :No acknowledge A 1bit DATA NA 8bit STP 1bit STP :Stop condition (3) V Period Transfer Mode The WT9051 is provided with a switch (05H :D7)for setting whether rewriting DAC of the WT9051 is performed in free-run mode or in sync with the V-Sync signal. ・05H :D7 =“0 ”→ Rewriting is performed in free-run mode. Data is changed while the screen is being displayed, such that if the VSAW amplitude or position data is changed, horizontal noise lines will appear on the screen. ・05H :D7 =“1 ”→ Rewriting is performed in sync with the V-Sync signal. Data is changed in the BLK period, such that horizontal noise lines do not appear on the screen. This technique can be used only to convert the following four items of vertical data. 1.Vertical size control (0BH : D7 to D0) 2.Vertical position control (0CH : D7 to D0) 3.Vertical S linearity (0DH : D6 to D0) 4.Vertical C linearity (0EH : D6 to D0) *Note on data rewriting in V period transfer mode When V period transfer mode is used, automatic increment cannot be used. Only one item of data can be received for each 1V.The second and subsequent items of data are discarded until BLK is received again. When automatic increment is used, only one item of data Weltrend Semiconductor, Inc. Page 15 WT9051 Data Sheet REV1.0 Address Table 1.Slave Address Mode White Read D7 1 1 D6 0 0 D5 0 0 D4 0 0 D3 1 1 D2 1 1 D1 0 0 D0 0 1 2. SUB ADDRESS 2-1 Write Mode sub D7 Address 00HEX X-ray Protector(XP) 0:normal <1:reset> 01 HEX <>: initial condition at power on reset D6 0:exhibit 1:inhibit <1> 04 HEX 05 HEX 06 HEX D4 H OUT PWN OUT Control(HO) Control(PO) 0:exhibit 1:inhibit D3 D2 D1 D0 HORIZONTAL DUTY(HDUTY) <1> <0> <0> <0> <0> <0> <0> <0> <0> <0> <0> SIDE PIN BALANCE <SPB> <0> <0> <0> <0> <0> <0> Horizontal Size <HSIZE> <0> 02 HEX 03 HEX D5 <0> <0> <0> Horizontal Position<HPOSI> <1> <0> V.BLK Width<VBW> <0:short> 1:long <1> DF.OUT SELECT 0:SEP. <1:MIX> <1> V.Period Transfer Mode <0:Off> 1:On <1> Unused <0> <0> <0> <0> <0> PARALLELOGRAM <PARA> <0> <0> <0> <0> SIDE PIN CORNER BALANCE TOP <SPCBT) <0> <0> <0> <0> <0> <0> SIDE PIN BALANCE BOTTOM(SPCBB) <0> <1> 07 HEX 08 HEX 09 HEX Clamp Pulse Position<CP> <0:Trailing> 1:Leading V-BLKACI amp Select<BCI> <0:BLK+CLP> 1:Select2 V-BLKA CIamp Select2<BC2> <0:BLK> 1:CLP <0> <0> <0> <0> <0> <0> <0> <0> SIDE OIN CORNER TOP<SPCT> <1> <0> <0> <0> <0> SIDE PIN CORNER BOTTOM<SPCB> <1> <0> <0> <0> <0> <0> <0> <0> <0> <0> <0> SIDE PIN<SP> <1> <0> <0> Weltrend Semiconductor, Inc. Page 16 WT9051 Data Sheet REV1.0 Sub Address 0A HEX D7 D6 FHOSC Max. Frequency <0:100kHz> 1:150kHz <1> 0B HEX D3 D2 <0> <0> <0> Vertical Size <Vsize> <0> <0> <0> <0> <0> <0> Vertical Position <VPOSI> <0> <0> <0> <1> Unused <0> <0> <0> <0> Vertical Linearity S<VLS> <0> <0> <0> <1> <0> <0> <0> Vertical Linearity C<VLC> <0> <0> <0> <1> <0> <0> <0> <0> Horizontal Moire cancellor <HMC> <0> <0> <0> <0> <0> <0> <0> Vertical Moire cancellor <VMC> <0> <0> <0> <0> <0> <0> <0> <0> Horizontal Dynamic Focus Amplitude<HDFA> <0> <1> <0> <0> <0> <0> Horizontal Dynamic Focus Phase<HDFP> <0> <0> <0> <0> <0> Vertical Dynamic Focus Amplitude<VDF> <0> Unused <1> <0> 13 HEX <0> <1> <0> 10 HEX 11 HEX D0 <0> 12 HEX 0F HEX D1 Trapezoid <TRAP> <0> HEHT-fH Tracking EW-HSIZE Tracking <0:Track> 1:Unrack EW-fH Tracking 0:Untrack <1:Track> HDF-HSIZE Tracking <0:Untrack> 1:Track Unused 0E HEX D4 <1> 0C HEX 0D HEX D5 <0> <0> <0> <0> <0> <0> <0> 2-2 Read Mode Sub Address 00HEX D7 Unused D6 Unused D5 Unused D4 Unused D3 Unused <0> <0> <0> <0> <0> Weltrend Semiconductor, Inc. Page 17 D2 Power On Reset 0:Power on 1:Power Off D1 H Lock Detector 0:Lock 1:Unlock D0 X-ray Detector 0:Undetct 1:Detect WT9051 Data Sheet REV1.0 Details of Each Sub Address Those value in carets <>indicate the settings at a Power On Reset. Write Mode 1.Sub address 00H Sub Address 00HEX D7 D6 X-ray Protector(X P) 0:Normal <1:Reset> H OUT Control(HO) <0:Exhibit> 1:Inhibit D5 D4 PWM OUT Control(PO) <0:Exhibit> 1:Inhibit D3 D2 D1 D0 Horizontal DUTY <HDUTY> <1> <0> <0> <0> <0> D7: X-ray protector When the input of Pin19 is over 5V,X-ray protection circuit is active. So the output of the horizontal output signal(H-OUT)from Pin17 and the output of the PWM pulse (PWMO) from Pin14 disappear. D6: H-OUT Control Bit for controlling the output of the horizontal output signal (H-OUT) from Pin17. When this bit is set to 0,output is possible. When this bit is set to 1,output is disabled. D5: PWM OUT Control Bit for controlling the output of the PWM pulse for high voltage control from Pin14. When this bit is set to 0,output is possible. When this bit is set to 1,output is disabled. D4 to D0: Horizontal DUTY (HDUTY) Bit for controlling the duty of the horizontal output signal, output from Pin17. The duty can be held to roughly will be large. Sub Address 01HEX D7 <1> D6 <0> D5 <0> D4 D3 D2 D1 D0 <0> <0> <0> D2 D1 D0 Horizontal Position<HPOSI> <0> <0> <0> <0> <0> Horizontal Size <HSIZE> <0> <0> D7 to D0: Horizontal Size (HSIZE) Bit for controlling the horizontal size. This data is used to modify the DC voltage of the waveform output from Pin5. Sub Address 02 HEX D7 <1> D6 D5 <0> <0> D4 D3 D7 to D0: Horizontal Position (HPOSI) Bit for controlling the horizontal position. Based on this data, the horizontal oscillator signal (Pin17)for the horizontal sync input signal can be converted. Weltrend Semiconductor, Inc. Page 18 WT9051 Data Sheet REV1.0 Sub D7 D6 Address 03HEX V.BLK Width<VBW> <0:Short> 1:long <1> D5 D4 D3 D2 D1 D0 <0> <0> Side Pin Balance<SPB> <0> <0> <0> <0> D7: V BLK Width Bit for selecting the vertical blanking pulse width. When this bit is set to 0, the width is short pulse width. When this bit is set to 1,the width is long pulse width. D6 to D0: Side Pin Balance (SPB) The amount of compensation for the side pin balance can be set using the seven bits from D6 to D0.The initial value is 40HEX .The variable range is from 01HEX to 7FHEX. When the value is 00HEX Side Pin Balance correction is OFF status. Sub Address 04HEX D7 DF.OUT Select 0:sep. <1:Mix> D6 D5 D4 D3 D2 D1 D0 Parallelogram <PARA> <1> <0> <0> <0> <0> <0> <0> D7: DF.OUT Select Bit for selecting the output of the parabola wave for dynamic focus signal from Pin8. When this bit is set to 0,output the vertical dynamic focus signal from Pin8. When this bit is set to 1,output the mixed signal of the horizontal and vertical dynamic focus from Pin8. D6 to D0: Parallelogram (PARA) The amount of compensation for the horizontal square wave is set using the seven bits from D6 to D0.The initial value is 40HEX the variable range is from 01HEX to 7FHEX . When the value is 00HEX Parallelogram correction is OFF status. Sub Address 05HEX D7 V Period Transfer Mode <0:Off> 1:On D6 D5 D4 D3 D2 D1 D0 Side Pin Corner Balance Top<SPCRT> <1> <0> <0> <0> <0> <0> <0> D7: V.Period Transfer Mode Bit for setting whether I 2 C-Bus write data transfer is performed in free-run mode or in sync with the V-Sync signal. When this bit is set to 0,data transfer is performed in free-run mode. When this bit is set to 1,data transfer is performed in sync with the V-Sync signal. D6 to D0: Side Pin Corner Balance Top(SPCBT)The amount of compensation for the side pin corner balance top can be set using the seven bits from D6 to D0.The initial value is 40HEX .The variable range is from 00HEX to 7FHEX .When this value and Side Pin Corner Balance Bottom DAC value is 00HEX ,Side Pin Corner Balance Top correction is OFF status. Weltrend Semiconductor, Inc. Page 19 WT9051 Data Sheet REV1.0 Sub Address 06HEX D7 D6 D5 Unused <0> D4 D3 D2 D1 D0 Side Pin Corner Balance Bottom<SPCBB> <1> <0> <0> <0> <0> <0> <0> D7: Unused D6 to D0: Side Pin Corner Balance Bottom (SPCBB) The amount of compensation for the side pin corner balance bottom can be set using the seven bits from D6 to D0. The initial value is 40HEX. The variable range is from 00HEX to 7FHEX. When this value is 00HEX and Side Pin Corner Balance Top DAC value is 00HEX, Side Pin Corner Balance Bottom correction is OFF status. Sub D7 Address 07HEX Clamp Pulse D6 D5 D4 D3 D2 D1 D0 Side Pin Corner Top<SPCT> Position<CP> <0:Trailing> 1:Leading <1> <0> <0> <0> <0> <0> <0> D7: Clamp Pulse Position Bit for tuning the clamp pulse signal output. When this bit is set to 0, the clump pulse is output at the trailing edge of the horizontal sync input signal. When this bit is set to 1, the clump pulse is output at the leading edge of the horizontal sync input signal. D6 to D0: Side Pin Corner Top (SPCT) The amount of compensation for the side pin corner top can be set using the seven bits from D6 to D0. The initial value is 40HEX. The variable range is from 00HEX to 7FHEX. When this value is 00HEX and Side Pin Corner Balance Top DAC value is 00HEX, Side Pin Corner Top correction is OFF status. Sub D7 Address 08HEX V-BLK&Clamp Select1 (BC1) <0:BLK+CLP> 1: Select 2 D6 D5 D4 D3 D2 D1 D0 <0> <0> Side Pin Corner Bottom<SPCB> <1> <0> <0> <0> <0> D7: V-BLK&Clamp Select1 Bit for selecting the output from Pin (BLKO) When this bit is set to 0,the vertical blanking pulse and the clamp pulse are output. When this bit is set to 1, this output depends on the bit D7 of the sub address”09” D6 to D0: Side Pin Corner Bottom (SPCB) The amount of compensation for the side pin corner bottom can be set using the seven bits from D6 to D0. The initial value is 40HEX. The variable range is from 00HEX to 7FHEX. When this value is 00HEX and Side Pin Corner Top DAC value is 00HEX, Side Pin Corner bottom correction is OFF status. Weltrend Semiconductor, Inc. Page 20 WT9051 Data Sheet REV1.0 Sub D7 D6 Address 09HEX V-BLK&CIamp Select2<BC2> (0: BLK) <0> 1:CLP D5 D4 D3 D2 D1 D0 Side Pin<SP> <0> <0> <0> <0> <0> <0> D7: V-BLK&Clamp Select2 Bit for selecting the output from Pin28 (BLKO) When this bit is set to 0,the vertical blanking pulse is output When this bit is set to 1, the clamp pulse is output. D6 to D0: Side Pin (SP) The amount of compensation for the side pin can be set using the seven bits from D6 to D0. The initial value is 40HEX. The variable range is from 00HEX to 7FHEX. When this value is 00HEX, Side Pin correction is OFF status. Sub D7 D6 Address 0AHEX fH OSC Max Frequency <0:100kHz> 1:150kHz <1> D5 D4 Trapezoid <0> <0> D3 D2 D1 D0 <0> <0> <TRAP> <0> <0> D7: fH OSC Max. Frequency Bit for setting the maximum horizontal oscillation frequency. When this bit is set to 0, the maximum oscillation frequency is 100kHz. When this bit is set to 1, the maximum oscillation frequency is 150kHz. D6 to D0: Trapezoid (TRAP) The amount of trapezoid is set using the seven bits from D6 to D0. The initial value is 40HEX. The variable range is from 00HEX to 7FHEX. When this value is 00HEX, Trapezoid correction is OFF status. Sub Address 0BHEX D7 D6 D5 D4 D3 D2 D1 <0> <0> D0 Vertical Size <VSIZE> <1> <0> <0> <0> <0> <0> D7 to D0: Vertical Size (VSIZE) Bit used for controlling the vertical size. The input data is used to control the amplitude of the vertical sawtooth waveform output from Pin4. The initial value is 80HEX. The variable range is from 00HEX to FFHEX. Sub Address 0CHEX D7 D6 D5 D4 D3 D2 D1 D0 <0> <0> <0> Vertical Position <VPOSI> <1> <0> <0> <0> <0> D7 to D0: Vertical Position (VPOSI) Bit for controlling the vertical position. The Data is used to control the DC voltage of the vertical sawtooth waveform output from Pin4. Weltrend Semiconductor, Inc. Page 21 WT9051 Data Sheet REV1.0 Sub Address 0DHEX D7 D6 D5 Unused <0> D4 D3 D2 D1 D0 <0> <0> Vertical Linearity S<VLS> <1> <0> <0> <0> <0> D7: Unused D6 to D0: Vertical Linearity S (VLS) Bits D6 to D0 are used to set the amount of vertical S compensation. The compensation signal is mixed with the vertical SAW waveform output from Pin4, then output. The initial value is 40HEX. The variable range is from 00HEX to 7FHEX. When this value is 00HEX, Vertical Linearity S correction is OFF status. Sub Address 0EHEX D7 HEHT-fH Tracking 0:Untrack <1:Track> D6 D5 D4 D3 D2 D1 D0 <0> <0> Vertical Linearity C<VLC> <1> <0> <0> <0> <0> D7: HEHT-fH Tracking Bit for selecting whether HEHT gain is tracking to horizontal frequency or not. This function works on EW fH Tracking (10H:D7)=1 and this bit =1. If EW fH Tracking (10H:D7)=0, this function does not work. D6 to D0: Vertical Linearity C (VLC) Bits D6 to D0 are used to set the amount of vertical C compensation. The compensation signal is mixed with the vertical SAW waveform output from Pin4, then output. The initial value is 40HEX. The variable range is from 00HEX to 7FHEX. When this value is 00HEX, Vertical Linearity C correction is OFF status. Sub Address 0FHEX D7 EW-HSIZ E Tracking <0:Track> 1:Untrack D6 D5 D4 D3 D2 D1 D0 <0> <0> Horizontal Moire Cancellor <HMC> <0> <0> <0> <0> <0> D7: EW-HSIZE Bit for selecting whether E/W output is tracking to HSIZE or not. When this bit is set to 0, E/W output is tracking to HSIZE. When this bit is set to 1, E/W output is not tracking to HSIZE. D6 to D0: Horizontal Moire Cancellor (HMR) Bits D6 to D0 are used to set the compensation amount for H moiré cancel. When the value is 00HEX, horizontal Moire Cancellor is OFF status. Weltrend Semiconductor, Inc. Page 22 WT9051 Data Sheet REV1.0 Sub Address 10HEX D7 D6 EW-fH Tracking 0:Untrack <1:Track> <0> D5 D4 D3 D2 D1 D0 Vertical Moire Cancellor <VMC> <0> <0> <0> <0> <0> <0> D7: EW-fH Tracking Bit for selecting whether E/W output is tracking to horizontal frequency or not. When this bit is set to 0, E/W output is tracking to horizontal frequency. When this bit is set to 1, E/W output is not tracking to horizontal frequency. D6 to D0: Vertical Moire Cancellor (VMC) Bits D6 to D0 are used to set the compensation amount for V moiré cancel. When the value is 00HEX, Vertical Moire Cancellor is OFF status. Sub Address 11HEX D7 D6 D5 HDF-HSIZE Tracking <0:Untrack> 1:Track <1> D4 D3 D2 D1 D0 Horizontal Dynamic Focus Amplitude<HDFA> <0> <0> <0> <0> <0> <0> D7: HDF-HSIZE Tracking Bit for selecting whether HDF output is tracking to HSIZE or not. When this bit is set to 0, HDF output is tracking to HSIZE. When this bit is set to 1, HDF output is not tracking to HSIZE. D6 to D0: Horizontal Dynamic Focus Amplitude (HDFA) Bits D6 to D0 are used to set the amplitude of the dynamic focus parabola. When the value is 00HEX, Horizontal Dynamic Focus is OFF status. Sub Address 12HEX D7 D6 D5 Unused <0> D4 D3 D2 D1 D0 <0> <0> Horizontal Dynamic Focus Phase<HDFP> <1> <0> <0> <0> <0> D7: Unused D6 to D0: Horizontal Dynamic Focus Phase (HDFP) Bits D6 to D0 are used to set the amount of compensation for the dynamic focus phase. Sub Address 13HEX D7 D6 D5 Unused <0> D4 D3 D2 D1 D0 <0> <0> Vertical Dynamic Focus Amplitudes<VDF> <1> <0> <0> <0> <0> D7: Unused D6 to D0: Vertical Dynamic Focus Amplitude (VDF) Bits D6 to D0 are used to set the amplitude of the dynamic focus parabola. When the value is 00HEX, Vertical Dynamic Focus is OFF status. Weltrend Semiconductor, Inc. Page 23 WT9051 Data Sheet REV1.0 Read Mode Sub Address 00HEX D7 D6 D5 D4 D3 Unused Unused Unused Unused Unused <0> <0> <0> <0> <0> D2 D1 Power On H. Lock Reset Detector 0: Power on 0: Lock 1: Power off 1: Unlock D0 X-ray Detector 0: Undetect 1: Detect D7 to D3: Unused D2: Power On Reset Used to detect a power on reset. When a power on reset is applied, this bit is set to 1. Usually, set this bit to 0.Immediately after power-on, or if the power supply voltage ever drops below around 6.5V(low →high)or 6.2V(high →low),this bit is set to 1.After this bit has been set to 1, it should be cleared to 0 after two read cycles, provided the 12V power is applied normally. If, for example, the 12V power is not applied, no matter how many times read is performed, this bit will not be cleared to 0 and instead will remain set to 1. D1: H Lock Detector Used to detect the Lock status of the horizontal sync signal and the oscillator output. In the lock status, this bit will be set to 0.In the unlock status, this bit will be set to 1. D0: X-ray Detector Used to detect the X-ray protection. When the X-ray protection circuit is active, this bit is set to 1.Usually, set this bit to 0. Weltrend Semiconductor, Inc. Page 24 WT9051 Data Sheet REV1.0 OPERATION DESCRIPTION Automatic Sync. Processing System Sequence System Block Diagram 18pin FBP DAC Auto Sync. System H-IN H-OSC 25pin HLO WT9051 Processing Sequence H-out: oscillate in horizontal minimum frequency (when no input signal) AutoSync Operation Start (Trigger:V-In) Compare H-In frequency and H-OSC frequency H-In Freq=H.OSC Freq.? No Counter 1 bit up H-Out Freq-Up YES Counter OFF. AFC On AFC Lock in 5 vertical term Court down using H-OSC YES Down to minimum freq. 25 Pin “H” Auto Sync finish 17pin Hout Operation H-in freq change OR H-in no input Weltrend Semiconductor, Inc. Page 25 WT9051 Data Sheet REV1.0 Notice 1) Automatic Sync. system can ’t start count up operation without vertical sync signal input. The start trigger of count up operation is vertical sync signal input. 2) WT9051 oscillates in minimum free-run frequency during no signal status. Please input desirable frequency quasi-pulse from MCU to WT9051during no signal status. 3) Please input no signal term for at least 3m sec in changing frequency at any time (Please show in the following figure.).In the following figure,f1 and f2 means a horizontal input signal which corresponds to a mode or quasi-pulse signal from MCU. f1 f2 H-In No signal term = at least 3m sec TIMING CHART The timing of horizontal stage is set by ratio to horizontal frequency (fH ).For example, if the delay time is 10 μs and fH is 30kHz,the ratio is 30%. TID : I 2 C bus control this delay time. The control range is form 16%to 43%. THW : The pulse width of signal to the AFC. This value is 10%. TFBP : This delay time is 30%from the rising edge of the fly back pulse. Horizontal sync Signal input Threshold voltage TID AFC internal pulse THW AFC filter waveform Fly back delay internal pulse TFBP Fly back pulse input signal Threshold voltage Weltrend Semiconductor, Inc. Page 26 WT9051 Data Sheet REV1.0 Vertical Blanking Pulse (V-BLK)and Video Clamp Pulse (CLAMP)Generator The WT9051 has an on-chip circuit that generates vertical blanking pulse and clamp pulse. The output signal mode must be selected by I 2 C bus. Figure illustrates the output signal. (WT9051) was selecting with outside the putting device. WT9051 was only mixed signal output. However, WT9051 can be simply selected with the bus.) The vertical blanking pulse width must be selected by I 2 C bus. It is 288 μs (typical)or 335 μs (typical).The video clamp pulse width is 0.8 μs (typical). (Provided that 20pin resistor is set to 47K Ω. The clamp pulse can choose the leading edge or the trailing edge of the horizontal sync by I2C BUS. 1. mixed signal output 5Vpp 2Vpp GND CLAMP width V-BLK width 2. clamp pulse (CLAMP) output 5Vpp GND CLAMP width 3. vertical blanking pulse (V-BLK) output 5Vpp V-BLK width GND Weltrend Semiconductor, Inc. Page 27 WT9051 Data Sheet REV1.0 MOIRE Canceller 1. Vertical MOIRE canceller It divides V-IN. The MOIRE can be canceled when shifting a vertical position by this signal. 2 The shift value can be controlled by I C bus. 2.Horizontal MOIRE canceller It divides FBP. And, it generates the signal, which reversed a phase every other vertical period. The MOIRE can be canceled when shifting a horizontal position by this signal. 2 The shift value can be controlled by I C bus. V-IN (Vertical input) V MOIRE cancel signal (A point) FBP -IN Divided signal (B point) H MOIRE cancel Signal (C point) A V-IN 1/2 Divider V-POSITION B C FBP-IN 1/2 Divider V-POSITION Weltrend Semiconductor, Inc. Page 28 WT9051 Data Sheet REV1.0 4.5 PWM for B+ control The PWM Block consists of the error amplifier, and the flip-flop, the oscillator. 1. Error amplifier The error amplifier is the transconductance amplifier type. The non-inverting input is connected to the pin11.The non-inverting input is connected to the reference voltage (=2.5Volts). The output is connected to pin12 and the comparator, the clamp. The clamp limits the maximum output voltage to 5.0Volts. 2. Oscillator The external capacitor is charged by a external resistor. When the flip-flop is reset, it is discharged. The discharge is done until it becomes limit voltage (=1.0Volts). 3. Flip-Flop This flip-flop will be set at the rising edge of the H-OUT. When the charging voltage (pin13) of the condenser becomes equal to the output voltage (pin12)of the error amplifier, the output of the comparator resets a flip-flop. 4. Inhibit mode It doesn't output in the following case. ・When the X-ray protection becomes active. ・When lower than the voltage of Power On Reset. 2 ・When setting to off by I C Bus. Weltrend Semiconductor, Inc. Page 29 WT9051 Data Sheet REV1.0 Tracking Specifications Tracking specifications of each waveform and function are shown in the following. *) “ ( ) “ stands for ON/OFF switch for tracking function. Waveform/Function VSAW Amplitude Vertical S-Linearity Vertical C-Linearity Trapezoid Side Pin Side Pin Corner Top Side Pin Corner Bottom Vertical Dynamic Focus Horizontal Dynamic Focus EW DC V-EHT Gain H-EHT Gain Tracking items VSIZE, V-EHT VSIZE, VPOSI, V-EHT VSIZE, VPOSI, V-EHT VSIZE, VPOSI, V-EHT, HSIZE(0FH:D7), fH(10H:D7) VSIZE, VPOSI, V-EHT, HSIZE(0FH:D7), fH(10H:D7) VSIZE, VPOSI, V-EHT, HSIZE(0FH:D7), fH(10H:D7) VSIZE, VPOSI, V-EHT, HSIZE(0FH:D7), fH(10H:D7) VSIZE, VPOSI, V-EHT HSIZE(11H:D7) HSIZE, fH(10H:D7), H-EHT VSIZE FH(10H:D7) Details of Tracking Specifications 1.EW output tracking to HSIZE 1 HSIZE-DAC vs EW amplitude HSIZE-DAC small EW Amp big big samll EW.Amp HSIZE-DAC 2 3 On/Off Switch of this function Sub address 0FH:D7 “0”: Track(Initial) “1”:Untrack Note When HSIZE-DAC is changed form FFH to 00H. EW amplitude becomes bigger 30% 2.HDF output tracking to HSIZE 1 HSIZE-DAC vs. HDF amplitude HSIZE-DAC small HDF Amp. big big samll HDF.Amp HSIZE-DAC 2 3 On/Off Switch of this function Sub address 11H:D7 “0”: Track(Initial) “1”:Untrack Note When HSIZE-DAC is changed form FFH to 00H. HDF amplitude becomes bigger 70% Weltrend Semiconductor, Inc. Page 30 WT9051 Data Sheet REV1.0 3. EW output tracking to horizontal frequency 1 Horizontal frequency vs. EW DC voltage FH EW DC low low high high EW DC fH 2 3 On/Off Switch of this function Sub address 10H:D7 “0”: Untrack (Initial) “1”:track Note Formula for EW DC voltage EW DC=((fH/100k-1)x 0.325+1)x 5V 4. H-EHT Gain tracking to horizontal frequency 1 Horizontal frequency vs. Gain(=△EWO/△HEI) FH Gain low small high big △ EWO/ △HEI fH 2 On/Off Switch of this function Sub address 0FH:D7(only on the condition that the data of sub address 10H:D7 is “1” “1”: Track (Initial) “0”:Untrack Weltrend Semiconductor, Inc. Page 31 WT9051 Data Sheet REV1.0 Electrical Characteristics 。 Absolute Maximum Ratings (Unless otherwise specified, Ta=25 C) Parameter Symbol Condition Power Supply VCC Input Voltage of pin16 SDA Input Voltage VSDA Input Voltage Range of pin29 SDA Output Sink Current ISDA Output sink current of pin29 SCL Input Voltage VSCL Input Voltage Range of pin30 VSAW Output Source Current IVSAWO Output Source Current of pin4 VSAW Output Sink Current IVSAWI Output Sink Current of pin4 E/W Output Source Current IEWO Output Source current of pin5 VEI Input Voltage VVEI Input Voltage Range of pin6 HEI Input Voltage VHEI Input Voltage Range of pin7 BAMPI Input Voltage VBAMPI Input Voltage Range of pin11 BAMPO Input Voltage VBAPO Input Voltage Range of pin12 PWM Output Sink Current IPWMI Output Sink Current of pin14 V.DF Output Source Current IVDF1 Output Source Current of pin8 H.DF Output Source Current IHDF1 Output Source Current of pin9 Fly Back Pulse Input Voltage VFBP Input Pulse Voltage Range of pin18 Horizontal Output Sink Current IHOUTI Output Sink Current of pin17 Horizontal Input Voltage VHIN Input Pulse Voltage Range of pin26 Vertical Input Voltage VVIN Input Pulse Voltage Range of pin27 BLK&CLP Output Source Current IBLK Output Source Current of pin28 Permissible package power dissipation Pd Ta=70。C, RTH=55。C Operating ambient temperature Ta Storage temperature TSTG Rating 14 -0.2~Vcc 10 -0.2~Vcc 4.5 4.5 4.5 -0.2~Vcc -0.2~Vcc -0.2~Vcc -0.2~Vcc 10 4.5 4.5 -0.2~Vcc 10 -0.2~Vcc -0.2~Vcc 4.5 1.0 -10~+75 -40~+125 Unit V V mA V mA mA mA V V V V mA mA mA V mA V V mA W 。C 。C Notice: If the absolute maximum rating of even one of the above parameters is exceeded even momentarily, the quality of the product may be degraded. In other words, absolute maximum ratings specify the values exceeding which the product may be physically damaged. Be sure to use the product with these ratings never exceeded. In addition, pins not listed in the above table must also be used in a range of 0 to Vcc . 。 RECOMMENDED OPERATING RANGE(Vcc=12V, Ta=25 C, Vcc=12V, unless otherwise noted) Parameter Symbol Test Condition MIN TYP MAX Supply Voltage VCC Pin16 input voltage 11.5 12.0 12.5 SDA Input Low Level VSDAL Pin29 input low level 0 0 1.5 SDA Input High Level VSDAH Pin29 input high level 2.3 5 5 SCL Input Low Level VSCLL Pin30 input low level 0 0 1.5 SCL Input High Level VSCLH Pin30 input high level 2.3 5 5 Horizontal Operating Frequency FH Pin26 input frequency 30 150 Range Unit V V V V V KHz Horizontal Input Duty Ratio1 DHIN1 Horizontal Input Duty Ratio2 DHIN2 Vertical Operating Frequency Fv Range Vertical Input Pulse Width W VIN1 Pin26 input pulse duty ratio amplitude=5Vp-p input polarity: positive Pin26 input pulse duty ratio amplitude =5Vp-p input polarity: Negative Pin27 Input Frequency Pin27 Input Pulse duty ratio amplitude =5Vp-p Input Polarity: Positive Weltrend Semiconductor, Inc. Page 32 - - 20 % 60 - - % 50 - 200 Hz - - 580 us WT9051 Data Sheet REV1.0 ELECTRONICAL CHARACTERICS(TA=25。C, Vcc=12V, unless otherwise noted) <Common> Parameter Supply Current Reference Voltage Power on reset voltage1 (LowÆHigh) Power on Reset Voltage2 (HighÆLow) SDA Input Threshold Voltage1 SDA Input Threshold Voltage2 MIN 60 4.5 6.0 TYP 69 5.0 6.5 MAX 81 5.5 7.0 VPORL Test Condition Supply current of pin16 no signal Pin20 Input Vcc from 0V to 12V.Judged by existence of ACK Input level from 0V to 5V 5.7 6.2 6.7 V VSDA1 Input level from 0V to 5V 1.7 2.0 2.3 V VSDA2 Input level from 5V to 0V 1.4 1.7 2.0 V VSCL1 Input level from 0V to 5V 1.7 2.0 2.3 V VSCL2 Input level from 5V to 0V 1.4 1.7 2.0 V Horizontal Sync Input Block (measurement at Pin26(HIN) Parameter Symbol Test Condition MIN Direct input Threshold Voltage VHTH Input signal: separate sync direct input 0.4 TYP 0.6 SCL Input Threshold Voltage1 SCL Input Threshold Voltage2 Symbol ICC VREF VPORH Unit mA V V <Horizontal sync signal processing Unit> H.IN Delay Block(measurement at Pin24 (HAFC)) Parameter Symbol Test Condition HIN Delay Variable 1 T HPD1 HPOSI=00HEX, Difference from pin26 pin24. Ratio with period.fH=30kHz HIN Delay Variable 2 T HPD2 HPOSI=FFHEX, Difference from pin26 pin24. Ratio with period. fH=30kHz HIN Delay Variable Amount1 T HPDA1 (THPD2-THPD1)/255 fH=30kHz HIN Delay Variable 3 T HPD3 HPOSI=00HEX, Difference from pin26 pin24. Ratio with period. fH=150kHz HIN Delay Variable 4 T HPD4 HPOSI=FFHEX, Difference from pin26 pin24. Ratio with period. fH=150kHz HIN Delay Variable Amount 2 T HPDA2 (THPD4-THPD3)/255 fH=30kHz H-WIDH BLOCK(measurement at pin24(HAFC)) Parameter Symbol Test Condition H-WIDTH Variable1 T HWD1 FH=30kHz H-WIDTH Variable2 T HWD2 FH=150kHz MIN TYP MAX Unit to 11.5 15.5 19.4 % to 33.6 40.0 to 36.3 42.0 47.7 % 0.079 0.100 0.121 %/step TYP 10.0 10.0 AFC BLOCK(measurement at pin24(HAFC)) Parameter Symbol Test Condition MIN Horizontal AFC Pull in Range1 AFC1 Positive Capture Range at FH =30kHz 7.47 Horizontal AFC Pull in Range2 AFC2 Negative Capture Range at FH =30kHz -9.13 Horizontal AFC Pull in Range3 AFC3 Positive Capture Range at FH =150kHz 7.65 Horizontal AFC Pull in Range4 AFC4 Negative Capture Range at FH -9.35 =150kHz TYP 8.30 -8.30 8.50 -8.50 Page 33 46.4 % 0.083 0.105 0.127 %/step to 14.3 17.5 20.7 % MIN 8.5 8.5 Weltrend Semiconductor, Inc. MAX Unit 0.8 V MAX Unit 11.5 % 11.5 % MAX 9.13 -7.47 9.35 -7.65 Unit % % % % WT9051 Data Sheet REV1.0 FBP Delay Block(measurement at pin18(FBPIN) and pin24(HAFC)) Parameter Symbol Test Condition MIN FBP Input Threshold Voltage1 VFBP1 Input level from 0V to 5V 2.2 FBP Input Threshold Voltage 2 VFBP2 Input level from 5V to 0V 1.9 FBP Delay TFBP Difference from pin18 to pin24.Ratio with 24.3 period TYP MAX Unit 2.5 2.8 V 2.2 2.5 V 30 30 % H-OSC Block(measurement at pin17(HOUT)) these value is excluding spread of external components Parameter Symbol Test Condition MIN TYP MAX Unit H.free-run frequency 1 FH01 20.38 22.30 24.22 KHz No input signal pin22 resistor=1.8KΩ H.free-run frequency 2 FH02 22.92 25.09 27.25 KHz No input signal pin22 resistor=1.6KΩ H-OSC frequency 1 FH01 No input signal pin22 is 1V. Pin22 34.4 37.0 39.6 KHz resistor=1.8KΩ H-OSC frequency 2 FH02 No input signal when pin22 resistor 135 145 155 KHz =1.8KΩ H-Duty Block(measurement at pin17(HOUT)) Parameter Symbol Test Condition H-duty 1 HDUTY1 HDUTY=00HEX fH=30kHz H-duty 2 HDUTY2 HDUTY=10HEX fH=30kHz H-duty 3 HDUTY3 HDUTY=1FHEX fH=30kHz H-duty Amount1 HDUTYA1 (HDUTY3-HDUTY1)/31 fH=30kHz H-duty 4 HDUTY4 HDUTY=00HEX fH=150kHz H-duty 5 HDUTY5 HDUTY=10HEX fH=150kHz H-duty 6 HDUTY6 HDUTY=1FHEX fH=150kHz H-duty Amount 2 HDUTYA2 (HDUTY6-HDUTY4)/31 fH=150kHz H-Out Block(measurement at collector of transistor attached at pin17) Parameter Symbol Test Condition H-Out Low Level VHOL Pull up resistor 20KΩ Difference from GND Level H-Out High Level VHOH Pull up resistor 20KΩ Difference from Vcc Level Weltrend Semiconductor, Inc. Page 34 MIN 34.3 44.0 53.2 0.590 34.3 44.0 53.2 0.590 TYP 39.0 50.0 60.5 0.694 39.0 50.0 60.5 0.694 MAX 43.7 56.0 67.8 0.798 43.7 56.0 67.8 0.798 MIN 0 TYP 0.2 MAX Unit 0.3 V -0.2 0 0 Unit % % % %/step % % % %/step V WT9051 Data Sheet REV1.0 <Vertical sync signal processing Unit> Vertical Input Block (measurement at pin27(VIN)) Parameter Symbol Test Condition Vertical Input Threshold Voltage VVIN Threshold voltage of pin27 V Position Block (measurement at pin4(VSAWO)) Parameter Symbol Test Condition Vertical Position1 VP01 VPOSI=00H Vertical Position2 VP02 VPOSI=7FH Vertical Position3 VP03 VPOSI=FFH Vertical Position Amount VP0A (VP03-VP01)/255 V-SAW Block measurement at pin4(VSAWO)) Parameter Symbol Test Condition Vertical Saw wave Amplitude 1 VSAW1 VSIZE=00H Vertical Saw wave Amplitude 2 VSAW2 VSIZE=FFH Vertical Saw wave Amplitude VSAW VSAW1- VSAW2 /255 Amount V.free-run frequency FV0 No input signal V.free-run Amplitude VSAW0 No input signal MIN 2.2 TYP 2.5 MAX Unit 2.8 V MIN TYP MAX Unit 2.962 3.153 3.348 V 3.325 3.500 3.675 V 3.620 3.847 4.076 V 2.32 2.72 3.15 mV/step MIN 1.65 2.65 3.27 TYP 2.0 3.0 3.94 MAX 2.35 3.35 4.61 Unit VP-P VP-P mV/step 10 3.2 25 3.6 MIN 225 260 4.5 0.4 4.5 TYP 265 305 5.0 0.6 5.0 MAX 305 350 5.5 0.8 5.5 TYP -240 MAX Unit -110 mV 240 370 mV 40 Hz 4.0 V <V-BLK/CLAMP Pulse unit> V-BLK/CLAMP Pulse (measurement at pin28) Parameter Symbol Test Condition Vertical Blanking Pulse Width1 TBLK1 VBW=0, 20pin Resistor=47kΩ Vertical Blanking Pulse Width2 TBLK2 VBW=1, 20pin Resistor=47kΩ Vertical Blanking Pulse Amplitude VBLK Video Clamp Pulse Width TCLP 20pin Resistor=47kΩ Video Clamp Pulse Amplitude VCLP Unit us us VP-P us VP-P <Correction Unit> Vertical Linearity “s” Correction Block(measurement at pin4(VSAWO), (notice1, 2) Parameter Symbol Test Condition MIN -370 Vertical Linearity”S” VS1 VLS=01HEX, VSIZE=FFHEX Correction Amplitude1 Difference from VPOC at top part 110 Vertical Linearity”S” VS2 VLS=01HEX, VSIZE=FFHEX Correction Amplitude2 Difference from VPOC at bottom part -70 Vertical Linearity”S” VS3 VLS=40HEX, VSIZE=FFHEX Correction Amplitude3 Difference from VPOC at top part -70 Vertical Linearity”S” VS4 VLS=40HEX, VSIZE=FFHEX Correction Amplitude4 Difference from VPOC at bottom part 110 Vertical Linearity”S” VS5 VLS=7FHEX, VSIZE=FFHEX Correction Amplitude5 Difference from VPOC at top part -370 Vertical Linearity”S” VS6 VLS=7FHEX, VSIZE=FFHEX Correction Amplitude6 Difference from VPOC at bottom part Vertical Linearity”S” VS (VS5-VS1)/126 2.39 Correction Amount Weltrend Semiconductor, Inc. Page 35 0 70 mV 0 70 mV 240 370 mV -240 -110 mV 3.81 5.23 mV/step WT9051 Data Sheet REV1.0 Vertical Linearity”C” Correction Block(measurement at pin4(VSAWO), (notice1, 3)) Parameter Symbol Test Condition MIN 60 Vertical Linearity”C” VC1 VLC=01HEX, VSIZE=FFHEX Correction Amplitude1 Difference from VPOC at top part 60 Vertical Linearity”C” VC2 VLC=01HEX, VSIZE=FFHEX Correction Amplitude1 Difference from VPOC at bottom part -100 Vertical Linearity”C” VC3 VLC=40HEX, VSIZE=FFHEX Correction Amplitude2 Difference from VPOC at top part -100 Vertical Linearity”C” VC4 VLC=40HEX, VSIZE=FFHEX Correction Amplitude2 Difference from VPOC at bottom part -210 Vertical Linearity”C” VC5 VLC=7FHEX, VSIZE=FFHEX Correction Amplitude3 Difference from VPOC at top part -210 Vertical Linearity”C” VC6 VLC=7FHEX, VSIZE=FFHEX Correction Amplitude3 Difference from VPOC at bottom part Vertical Linearity”C” VC (VC5-VC1)/126 1.55 Correction Amount H-Size Control Block(measurement at Pin5(EWO), (notice4, 5, 6) Parameter Symbol Test Condition E/W Output DC Voltage1 VEW1 HSIZE=00H, fH-track=off E/W Output DC Voltage2 VEW2 HSIZE=7FH, fH-track=off E/W Output DC Voltage3 VEW3 HSIZE=FFH, fH-track=off E/W Output DC Voltage Amount VEW (VEW3- VEW1) /255 E/W Output DC Voltage4 VEW4 HSIZE=FFH, fH=30k E/W Output DC Voltage5 VEW5 HSIZE=FFH, fH=150k Trapezoid Correction Block(measurement at pin5(EWO), (notice5, 6) Parameter Symbol Test Condition Trapezoid Correction Amplitude1 VTRA1 TRAP=01H , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at top part, fH-track=off Trapezoid Correction Amplitude2 VTRA2 TRAP=01H , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at bottom part, fH-track=off Trapezoid Correction Amplitude3 VTRA3 TRAP=40H , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at top part, fH-track=off Trapezoid Correction Amplitude4 VTRA4 TRAP=40FH , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at bottom part, fH-track=off Trapezoid Correction Amplitude5 VTRA5 TRAP=7FH , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at top part, fH-track=off Trapezoid Correction Amplitude6 VTRA6 TRAP=7FH , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at bottom part, fH-track=off Trapezoid Correction Amplitude VTRA V TRA5- VTRA1 /126 Amount Trapezoid Correction Amplitude7 VTRA7 VTRA5 , HSIZE=FFH, fH=30k Trapezoid Correction Amplitude8 VTRA8 VTRA5 , HSIZE=FFH, fH=150k Trapezoid Correction Amplitude9 VTRA9 VTRA5 , HSIZE=FFH, fH-track=off Weltrend Semiconductor, Inc. Page 36 MIN 3.15 3.83 4.5 5.31 3.40 5.11 TYP MAX Unit 135 210 mV 135 210 mV 0 100 mV 0 100 mV -135 -60 mV -135 -60 mV 2.14 2.75 mV/step TYP MAX Unit 3.5 3.85 V 4.25 4.68 V 5.0 5.5 V 5.91 6.51 mV/step 3.86 4.32 V 5.81 6.51 V MIN -350 TYP MAX Unit -280 -210 mV 210 280 350 mV -50 0 50 mV -50 0 50 mV 210 280 350 mV -350 -280 -210 mV 3.55 4.44 175 256 273 235 344 364 5.33 mV/ste p 295 mV 432 mV 455 mV WT9051 Data Sheet REV1.0 Side Pin Correction Block (measurement at pin5(EWO), (notice4, 6) Parameter Symbol Test Condition Side Pin Correction Amplitude1 VSP1 SP=01H , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at top part, fH-track=off Side Pin Correction Amplitude2 VSP2 SP=01H , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at bottom part, fH-track=off Side Pin Correction Amplitude3 VSP3 SP=40H , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at top part, fH-track=off Side Pin Correction Amplitude4 VSP4 SP=40FH , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at bottom part, fH-track=off Side Pin Correction Amplitude5 VSP5 SP=7FH , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at top part, fH-track=off Side Pin Correction Amplitude6 VSP6 SP=7FH , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at bottom part, fH-track=off Side Pin Correction Amplitude VSP V SP5- VSP1 /126 Amount Side Pin Correction Amplitude7 VSP7 VSP5 , HSIZE=FFH, fH=30k Side Pin Correction Amplitude8 VTSP8 VSP5 , HSIZE=FFH, fH=150k Side Pin Correction Amplitude9 VSP9 VSP5 , HSIZE=FFH, fH-track=off MIN -120 TYP 0 MAX Unit 120 mV -120 0 120 mV 430 725 1020 mV 430 725 1020 mV 1025 1450 1875 mV 1025 1450 1875 mV 9.21 11.51 13.81 mV/ste p 844 1215 1586 mV 1237 1780 2323 mV 1320 1885 2451 mV Side Pin Corner “Top” Correct Block (measurement at Pin5(EWO), (notice4, 5, 8) Parameter Symbol Test Condition MIN SPC-T Correction Amplitude1 VSPCT1 SPCT=00H , VSIZE= FFH, HSIZE= FFH, -480 Difference from VEW3 at top part, fH-track=off SPC-T Correction Amplitude2 VSPCT2 SPCT=00H , VSIZE= FFH, HSIZE= FFH, -80 Difference from VEW3 at bottom part, fH-track=off -80 SPC-T Correction Amplitude3 VSPCT3 SPCT =40H , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at top part, fH-track=off -80 SPC-T Correction Amplitude4 VSPCT4 SPCT =40FH , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at bottom part, fH-track=off 200 SPC-T Correction Amplitude5 VSPCT5 SPCT =7FH , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at top part, fH-track=off -80 SPC-T Correction Amplitude6 VSPCT6 SPCT =7FH , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at bottom part, fH-track=off SPC-T Correction Amplitude VSPCT V SPCT5- VSPCT1 /127 3.17 Amount SPC-T Correction Amplitude7 VSPCT7 VSPCT 5 , HSIZE=FFH, fH=30k 165 SPC-T Correction Amplitude8 VSPCT8 VSPCT 5 , HSIZE=FFH, fH=150k 242 SPC-T Correction Amplitude9 VSPCT9 VSPCT 5 , HSIZE=00H, fH-track=off 256 Weltrend Semiconductor, Inc. Page 37 TYP -340 MAX Unit -200 mV 0 80 mV 0 80 mV 0 80 mV 340 0 5.40 285 417 442 480 mV 80 mV 7.62 mV/ste p 405 mV 592 mV 628 mV WT9051 Data Sheet REV1.0 Side Pin Corner “BOTTOM” Correct Block (measurement at Pin5(EWO), (notice4, 5, 8) Parameter Symbol Test Condition MIN TYP 0 SPC-B Correction Amplitude1 VSPCB1 SPCB=00H , VSIZE= FFH, HSIZE= FFH, -80 Difference from VEW3 at top part, fH-track=off SPC-B Correction Amplitude2 VSPCB2 SPCB=00H , VSIZE= FFH, HSIZE= FFH, -480 -340 Difference from VEW3 at bottom part, fH-track=off -80 0 SPC-B Correction Amplitude3 VSPCB3 SPCB =40H , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at top part, fH-track=off -80 0 SPC-B Correction Amplitude4 VSPCB4 SPCB =40FH , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at bottom part, fH-track=off -80 0 SPC-B Correction Amplitude5 VSPCB5 SPCB =7FH , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at top part, fH-track=off 200 340 SPC-B Correction Amplitude6 VSPCB6 SPCB =7FH , VSIZE= FFH, HSIZE= FFH, Difference from VEW3 at bottom part, fH-track=off SPC-B Correction Amplitude VSPCB V SPCB6- VSPCB2 /127 3.17 5.40 Amount SPC-B Correction Amplitude7 VSPCB7 VSPCB 6 , HSIZE=FFH, fH=30k 165 285 SPC-B Correction Amplitude8 VSPCB8 VSPCB6 , HSIZE=FFH, fH=150k 242 417 SPC-B Correction Amplitude9 VSPCB9 VSPCB6 , HSIZE=FFH, fH-track=off 256 442 Parallelogram Correction Block (internal measurement, (notice 10,11)) Parameter Symbol Test Condition Parallelogram Correction VPARA1 PARA=01H , Top part Amplitude1 Parallelogram Correction VPARA2 PARA=01H , Bottom part Amplitude2 Parallelogram Correction VPARA3 PARA =40H , Top part Amplitude3 Parallelogram Correction VPARA4 PARA=40H , Bottom part Amplitude4 Parallelogram Correction VPARA5 PARA =7FH , Top part Amplitude5 Parallelogram Correction VPARA6 PARA=7FH , Bottom part Amplitude6 Parallelogram Correction Amount VPARA T PARA5- TPARA1 /126 Weltrend Semiconductor, Inc. Page 38 MAX Unit 80 mV -200 mV 80 mV 80 mV 80 mV 480 mV 7.62 mV/ste p 405 mV 592 mV 628 mV MIN -300 TYP -240 MAX Unit -180 mV 180 240 300 mV -45 0 45 mV -45 0 45 mV 180 240 300 mV -300 -240 -180 mV 3.04 3.81 4.58 mV/step WT9051 Data Sheet REV1.0 Side Pin Balance Correct Block (internal measurement, (notice9, 11)) Parameter Symbol Test Condition SPB Correction VSPB1 SPB=01H , Top part Amplitude1 SPB Correction VSPB2 SPB=01H , Bottom part Amplitude2 SPB Correction VSPB3 SPB =40H , Top part Amplitude3 SPB Correction VSPB4 SPB=40H , Bottom part Amplitude4 SPB Correction VSPB5 SPB =7FH , Top part Amplitude5 SPB Correction VSPB6 SPB=7FH , Bottom part Amplitude6 SPB Correction Amount VSPB T PARA5- TPARA1 /126 MIN -600 TYP -460 MAX Unit -320 mV -600 -460 -320 mV -120 0 120 mV -120 0 120 mV 320 460 600 mV 320 460 600 mV 5.84 7.30 8.76 mV/step Side Pin Corner Balance Top Correction Block(internal measurement, (notice9,10, 13)) Parameter Symbol Test Condition MIN TYP SPCB-T Correction VSPCBT1 SPCBT=00H , Top part -410 -310 Amplitude1 SPCB-T Correction VSPCBT2 SPCBT=00H , Bottom part -80 0 Amplitude2 SPCB-T Correction VSPCBT3 SPCBT =40H , Top part -80 0 Amplitude3 SPCB-T Correction VSPCBT4 SPCBT=40H , Bottom part -80 0 Amplitude4 SPCB-T Correction VSPCBT5 SPCBT =7FH , Top part 210 310 Amplitude5 SPCB-T Correction Amplitude6 SPCB-T Correction Amount VSPCBT6 SPCBT=7FH , Bottom part -80 0 VSPCBT V SPCBT5- VSPCBT1 /127 3.33 4.92 MAX Unit -210 mV 80 mV 80 mV 80 mV 410 mV 80 mV 6.51 mV/step Side Pin Corner Balance Bottom Correction Block(internal measurement, (notice9,10, 12)) Parameter Symbol Test Condition MIN TYP MAX Unit SPCB-B Correction VSPCBB1 SPCBB=00H , Top part -80 0 80 mV Amplitude1 SPCB- B VSPCBB2 SPCBB=00H , Bottom part 210 310 410 mV Correction Amplitude2 SPCB- B VSPCBB3 SPCBB =40H , Top part -80 0 80 mV Correction Amplitude3 SPCB- B VSPCBB4 SPCBB=40H , Bottom part -80 0 80 mV Correction Amplitude4 SPCB- B VSPCBB5 SPCBB =7FH , Top part -80 0 80 mV Correction Amplitude5 SPCB-B Correction Amplitude6 SPCB- B Correction Amount VSPCBB6 SPCBB=7FH , Bottom part -410 -310 -210 mV VSPCBB V SPCBB5- VSPCBB1 /127 3.33 4.92 6.51 mV/step Weltrend Semiconductor, Inc. Page 39 WT9051 Data Sheet REV1.0 <EHT Unit> H-EHT Block(measurement at pin5(EW)) Parameter Symbol Test Condition 7pinOpen Voltage V7PIN Input Minimum D-Range VLEHTH Minimum input voltage Input Maximum D-Range VHEHTH Maximum input voltage EHT-H Correction Gain1 GEHTH1 Between EWO to EHTH gain FH- tracking =off EHT-H Correction Gain2 GEHTH2 GEHTH1, fH=30k EHT-H Correction Gain3 GEHTH3 GEHTH1, fH=150k V-EHT Block (measurement at pin4(VSAWO)) Parameter Symbol Test Condition 6pinOpen Voltage V6PIN Input Minimum D-Range VLEHTV Minimum input voltage Input Maximum D-Range VHEHTV Maximum input voltage EHT-V Correction Gain1 GEHTV1 Between Vsawo to EHTV gain Vsize=FF EHT-V Correction Gain2 GEHTV2 Between Vsawo to EHTV gain Vsize=01 MIN 3.6 4.77 -1.06 TYP 4.0 -0.88 MAX 4.4 2.2 -0.70 Unit V V V Times -0.28 -1.70 -0.20 -1.42 -0.12 -1.14 Times Times MIN 3.6 4.75 1.47 1.65 TYP 4.0 1.72 1.92 MAX 4.4 3.81 1.97 2.19 Unit V V V Times Times MIN 0 TYP 2.8 MAX 5.0 Unit ppm 170 200 230 ppm 1.32 1.55 1.79 ppm MIN 0 3.06 24.09 TYP 0.4 3.6 28.35 MAX 0.8 4.14 32.60 Unit mVp-p mVp-p uV/step MIN 0.3 1.5 8.7 1.8 1.05 0.3 1.5 8.7 0.25 0.70 3.6 TYP 0.5 2.0 11.9 2.41 1.4 0.5 2.0 11.9 0.36 1.00 5.1 MAX 0.7 2.5 15.3 3.01 1.75 0.7 2.5 15.3 0.47 1.30 6.6 Unit Vp-p Vp-p mV/step Vp-p Vp-p Vp-p Vp-p mV/step us us ns/step <Moire Canceller Unit> Horizontal Moire Canceller Block(measurement at 17pin(HOUT)) Parameter Symbol Test Condition H Moire Canceller Variable1 THMC1 HMC=01H, fH=30kHz Ratio with period H Moire Canceller Variable2 THMC2 HMC=7FH, fH=30kHz Ratio with period H Moire Canceller Variable THMC THMC2- THMC1 /126 Amount Vertical Moire Canceller Block (measurement at 4 pin(VSAWO)) Parameter Symbol Test Condition V Moire Canceller Variable1 VVMC1 VMC=01H V Moire Canceller Variable2 VVMC2 VMC=7FH V Moire Canceller Variable VVMC VVMC2- VVMC1 /126 Amount <Dynamic Focus Unit> Horizontal/Vertical Mixed Dynamic Focus Block (measurement at 8pin) Parameter Symbol Test Condition H-DF Amplitude1 VHDFMA1 HDFA=01HEX, 04HEXD7=”1” H-DF Amplitude2 VHDFMA2 HDFA=7FHEX, 04HEXD7=”1” H-DF Amplitude Amount VHDFMA VHDFMA2- VHDFMA1 /126 H-DF Amplitude3 VHDFMA3 VHDFMA2, HSIZE-Track=ON HSIZE=00HEX H-DF Amplitude4 VHDFMA4 VHDFMA2, HSIZE-Track=ON HSIZE=FFHEX V-DF Amplitude1 VVDFMA1 VDFA=01HEX, 04HEXD7=”1” V-DF Amplitude2 VVDFMA2 VDFA=01HEX, 04HEXD7=”1” V-DF Amplitude Amount VVDFMA VVDFA2- VVDFM1 /126 H-DF Phase1 VHDFP1 HDFP=00 HEX H-DF Phase2 VHDFP2 HDFP=7F HEX H-DF Phase Amount VHDFP VHDFP2- VHDFP1 /127 Weltrend Semiconductor, Inc. Page 40 WT9051 Data Sheet REV1.0 Vertical Dynamic Focus Block (measurement at 9pin) Parameter Symbol Test Condition V-DF Amplitude1 VVDFA1 VDFA=01HEX, DFSelect=”0” V-DF Amplitude2 VVDFA2 VDFA=7FHEX, DFSelect=”0” V-DF Amplitude Amount VVDFA VVDFA2- VVDFA1 /126 MIN 0.6 3.0 18 TYP 1.0 4.0 24 MAX 1.4 5.0 30 Unit Vp-p Vp-p mV/step MIN 0 TYP 0 MAX 0 Unit V 4.5 5.0 5.5 V 2.25 2.5 2.75 V 4.5 5.0 5.5 V PWM OSC Block (measurement at pin13) Parameter Symbol Test Condition Low level VL Input 5V at pin11 MIN 0.8 TYP 1.0 MAX 1.2 Unit V PWM OUT Block(measurement at pin14) Parameter Symbol Test Condition PWM Duty1 PD1 fH=30kHz, V12=1V PWM Duty2 PD2 fH=30kHz, V12=2V PWM Duty3 PD1 fH=30kHz, V12=3V PWM Duty4 PD4 fH=30kHz, V12=4V PWM Duty5 PD5 fH=30kHz, V12=5V PWM Duty1 PD1 fH=90kHz, V12=1V PWM Duty2 PD2 fH=90kHz, V12=2V PWM Duty3 PD3 fH=90kHz, V12=3V PWM Duty4 PD4 fH=90kHz, V12=4V PWM Duty1 PD1 fH=150kHz, V12=1V PWM Duty2 PD2 fH=150kHz, V12=2V PWM Duty3 PD3 fH=150kHz, V12=3V MIN 94 88 81 73 65 93 74 53 30 91 60 25 TYP 99 93 86 78 70 98 79 58 35 96 65 30 MAX 100 98 91 83 75 100 84 63 40 100 70 35 Unit % % % % % % % % % % % % MIN 4.8 TYP 5.0 MAX 5.2 Unit V <PWM Unit> Error AMP Block (measurement at pin12) Parameter Symbol Test Condition Input Low Voltage VEINL Input VEIN at pin11, short between pin11and pin12 Input High Voltage VEINH input VEIN at pin11, short between pin11 and pin12 Reference Voltage VREF No signal at pin11, short between pin11 and pin12 Limit level VLIM Input 6V at pin11, short between pin11 and pin12 <X-RAY Det. Units> X-RAY Det. Block (measurement at pin19) Parameter Symbol Test Condition Threshold Voltage VXRAY Weltrend Semiconductor, Inc. Page 41 WT9051 Data Sheet REV1.0 Notice: 1.The period is the time, which excluded retrace width of V-SAW from the vertical period. 2.The Vertical C Correction is off mode. 3.The Vertical S Correction is off mode. 4.The Trapezoid Correction is off mode. 5.The Side Pin Correction is off mode. 6.The Side Pin Corner Top/Bottom Correction is off mode. 7.The Side Pin Corner Top Correction is center. 8.The Side Pin Corner Bottom Correction is center. 9.The Parallelogram Correction is off mode. 10.The Side Pin Balance Correction is off mode. 11.The Side Pin Corner Balance Top/Bottom Correction is off mode. 12.The Side Pin Corner Balance Top Correction is center. 13.The Side Pin Corner Balance Bottom Correction is center. 14.The precision of the D/A converter is as follows. 8bits DAC ： --1LSB ∼ +2LSB 7bits DAC ： --1LSB ∼ +1.5LSB ORDERING INFORMATION Part Number WT9051 Package 30-pin plastic shrink DIP (400 mil) Weltrend Semiconductor, Inc. Page 42