CXA3002N TX Gain Control Amplifier For the availability of this product, please contact the sales office. Description CXA3002N is a TX gain control amplifier for CDMA cellular mobile phone. 24 pin SSOP (Plastic) Features • Wide gain control range • Linear gain slope • High output IP3 Typ. +9dBm at Gain = 35dB • Power save function included Absolute Maximum Ratings • Supply voltage • Operating temperature • Storage temperature • Allowable power dissipation • Supply voltage range • Logic input voltage • Signal input voltage • Differential signal input voltage Operating Conditions Supply voltage VCC Topr Tstg PD 6 –40 to +85 –65 to +150 420 –0.3 to 6 –0.3 to VCC +0.3 –0.3 to VCC +0.3 0 to 2.5 3.1 to 3.8 V °C °C mW V V V V V Applications • CDMA cellular mobile phone • CDMA & AMPS cellular phone Structure Bipolar sillicon monolithic IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E95712-PP CXA3002N Block Diagram IF Input CDMAIN CDMAINX OUT OUTX IF Output BP1 Gain Control to External Capacitor GCTL BP2 Supply Voltage Ground Power Save VCC1, 2 Bias Driver GND1, 2 CXA3002N PSV –2– CXA3002N Pin Configuration NC 1 24 PSV VCC1 2 23 GCTL GND1 3 22 NC NC 4 21 NC CDMAIN 5 20 NC NC 6 19 OUTX CXA3002N CDMAINX 7 18 NC NC 8 17 OUT NC 9 16 NC NC 10 15 VCC2 NC 11 14 GND2 BP1 12 13 BP2 –3– CXA3002N Pin Description Pin No. Symbol Pin voltage Typ. (V) 1 N.C. 2 VCC1 3.6 3 GND1 0 4 N.C. 5 CDMAIN Equivalent circuit Description No connection. Positive power supply. Ground. No connection. 1.9 VCC1 Differential input pin for CDMA transmit IF signal. 7 CDMAINX 1.9 6k 6 8 9 10 11 6k GND1 N.C. 20k No connection. 20k 13 12 3k 12 BP1 3k 1.9 Connected to GND with capacitor 0.01µF. 5 7 13 BP2 1.9 14 GND2 0 Ground for output stage. 15 VCC2 3.6 Positive power supply for output stage. 16 N.C. No connection. 19 17 VCC2 17 OUT 200 4k 4k 200 Differential output pins for transmit IF signal. Open collector output. 19 OUTX GND2 –4– CXA3002N Pin No. 18 20 21 22 Symbol Pin voltage Typ. (V) Equivalent circuit Description N.C. No connection. VCC1 8k 23 GCTL 8k Gain control pin with a ripple filter. 23 6k 6k GND1 VCC1 24 PSV Power save function pin. High: Active Low: Power save 24 GND1 –5– CXA3002N Electrical Characteristics DC characteristics Parameter (VCC = 3.6V, Ta = 25°C) Symbol Conditions Min. Typ. Max. Current Consumption 1 ICC1 Gain = MAX., Pin 2 4.1 5.7 7.3 Current Consumption 2 ICC2 Gain = MAX., Pin 15 3.2 4.4 5.6 Current Consumption 3 ICC3 Gain = MAX., Pin 17 + Pin 19 5 7 9 Current Consumption 4 ICC4 Gain = MIN., Pin 2 4.2 5.8 7.4 Current Consumption 5 ICC5 Gain = MIN., Pin15 8.0 11.1 14.2 Current Consumption 6 ICC6 Gain = MIN., Pin 17 + Pin 19 0.2 0.3 0.4 Current Consumption 7 ICC7 VPSV = 0.5V, Pin 2 1 Current Consumption 8 ICC8 VPSV = 0.5V, Pin 15 1 Current Consumption 9 ICC9 VPSV = 0.5V, Pin 17 + Pin 19 1 Input current pin 23H IGCTL H VGCTL = 3V 10 Input current pin 23L IGCTL L VGCTL = 0.5V Input current pin 24H IPSVH VPSV = 3V Input current pin 24L IPSVL VPSV = 0.5V PSV high voltage VPSH PSV low voltage VPSL mA µA –10 10 –10 3 Pin 24 0.5 AC characteristics Parameter Unit V (VCC = 3.6V, Ta = 25°C) Symbol Conditions Operating frequency range FR Min. Typ. 10 Max. Unit 200 MHz dB Gain MAX. G2.7 VGCTL = 2.7V 38.5 42.5 Gain center G1.5 VGCTL = 1.5V –10 –5 0 Gain MIN. G0.3 VGCTL = 0.3V –58 –52 Gain slope GCLIN 58 61 64 Input level 3rd order intercept point IIP3 –30 –26 Noise Figure NF VGCTL = 1 to 2V G = 35dB∗ F1 = 131.38MHz F2 = 132.38MHz Measure to 130.38MHz G = 35dB∗ Used 1MHz BPF Measure to 130.38MHz ∗ Adjust GCTL voltage, and set the overall gain to 35dB. –6– 10 dB/V dBm 14 dB CXA3002N Measurement Circuit V24 1 NC PSV 24 V2 A24 1k A2 0.01µ 10k 2 VCC1 GCTL 23 3 GND1 NC 22 4 NC NC 21 5 CDMAIN NC 20 V23 A23 0.01µ V5 V17 + 19 1:3 A17 + 19 1000p CDMA INPUT 1k 6 NC OUTX 19 560n OUTPUT 1000p 7 CDMAINX NC 18 430n 2.2k V7 10k 8 NC OUT 17 9 NC NC 16 10 NC VCC2 15 11 NC GND2 14 9:2 0.01µ V15 0.01µ A15 0.01µ 12 BP1 BP2 13 V13 V12 1k 1k –7– CXA3002N Application Circuit 1µ 0.1µ VCC 0.1µ Active Sleep 0.01µ 1000p ∗ TX IF INPUT ∗ 1 24 2 23 3 22 4 21 5 20 6 19 1k Gain Control 0.01µ ∗ CXA3002 7 18 8 17 9 16 10 15 11 14 12 13 1000p ∗ 1000p 1000p Bandpass Filter TX IF OUTPUT ∗ 0.01µ 0.01µ 0.01µ ∗ Must be adjusting values to result a best impedance matching between BPF filter and this IC. Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. –8– CXA3002N Design Reference Values Single ended measurement Item (VCC = 3.6V, Ta = 25°C) Symbol Input resistance RIN Input capacitance CIN Output resistance ROUT Output capacitance COUT Conditions f = 130.38MHz, VGCTL = 1.5V Typ. Unit 1.9 kΩ 4 pF 1.6 kΩ 5 pF Notes on Operation 1) This IC is a wideband amplifier with wide gain control range. Separate Pin 3 (GND1) and Pin 14 (GND2) to prevent interference between input and output. Furthermore, the decoupling capacitors between Pins 2 and 3, Pins 14 and 15 should be as close to the IC as possible. 2) This IC assumes the excellent characteristics when the differential input impedance between Pins 5 and 7 is 500Ω, and the differential output impedance between Pins 17 and 19 is 1kΩ. Refer to the Measurement Circuit for the external element settings, etc. 3) Connect the capacitors, which are connected to Pins 12 and 13, to Pin 14 (GND2). 4) Pay attention to handling this IC because its electrostatic discharge strength is weak. –9– CXA3002N Sensitivity VCC = 3.6V 60 40 Power gain [dB] 20 0 –20 –40 T = –40deg T = 25deg T = 85deg –60 0 0.5 1 1.5 2 2.5 3 3.5 VGCTL [V] IIP3 VCC = 3.6V 0 –10 IIP3 [dBm] –20 –30 –40 T = –40deg T = 25deg T = 85deg –50 –60 –60 –40 –20 0 Power gain [dB] – 10 – 20 40 60 CXA3002N Noise Figure VCC = 3.6V 50 T = –40deg T = 25deg T = 85deg Noise figure [dB] 40 30 20 10 0 –60 –40 –20 0 20 60 40 Power gain [dB] Gain Error from Room Temp. VCC = 3.6V 6 T = –40deg T = 85deg 4 Gain error [dB] 2 0 –2 –4 –6 –60 –40 –20 0 Power gain [dB] – 11 – 20 40 60 CXA3002N Package Outline Unit: mm 24PIN SSOP (PLASTIC) 275mil + 0.2 1.25 – 0.1 ∗7.8 ± 0.1 0.1 ± 0.1 7.6 ± 0.2 5.6 ± 0.1 A 0.5 ± 0.2 0.10 13 24 0° to 10° 1 + 0.1 0.22 – 0.05 12 + 0.05 0.65 ± 0.12 0.15 – 0.02 DETAIL A NOTE : ∗NOT INCLUDE MOLD FINS. PACKAGE STRUCTURE SONY CODE SSOP-24P-L01 EIAJ CODE A SIMILAR TO SSOP024-P-0300 JEDEC CODE PACKAGE MATERIAL EPOXY / PHENOL RESIN LEAD TREATMENT SOLDER PLATING LEAD MATERIAL 42 ALLOY PACKAGE WEIGHT – 12 –