CXG1082EN Receive Dual Low Noise Amplifier/Mixer For the availability of this product, please contact the sales office. Description The CXG1082EN is a receive dual low noise amplifier/ mixer MMIC. This IC is designed using the Sony’s GaAs J-FET process. 16 pin VSON (Plastic) Features • High conversion gain: Gp = 17dB (LNA Typ.) Gc = 11 to 12dB (MIX Typ.) • Low noise figure: NF = 1.5dB (LNA Typ.) NF = 4.2dB (MIX Typ.) • Single 3V power supply operation • Low LO input power operation PLO = –15dBm • Single CTL pin achieved by the built-in inverter circuit • 16-pin VSON package Absolute Maximum Ratings (Ta = 25°C) • Supply voltage VDD 4.5 V • Input power PIN +13 dBm • Current consumption IDD 15 mA • Operating temperature Topr –35 to +85 °C • Storage temperature Tstg –65 to +150 °C Applications 800MHz Japan digital cellular telephones (PDC) Recommended Operating Voltages • Supply voltage VDD 2.7 to 3.3 • Control voltage Structure GaAs J-FET MMIC Block Diagram LNA RFIN1 9 Pin Configuration 8 6 3 IFOUT 16 VCTL (H) 2.4 to 3.3 VCTL (L) 0 to 0.3 V V V 1 LNA RFIN2 9 8 LNA RFIN2 CAP 10 7 CAP GND 11 6 LNA RFOUT/VDD1 (LNA) CTL 12 5 GND GND 13 4 OPT GND 14 3 MIX RFIN VDD2 (LO AMP) 15 2 GND IFOUT/VDD3 (MIX) 16 1 LO IN LNA RFIN1 LNA RFOUT MIX RFIN LO IN GaAs MMICs are ESD sensitive devices. Special handling precautions are required. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E00408-PS CXG1082EN Electrical Characteristics Conditions: VDD = 3.0V, VCTL (H) = 3.0V, VCTL (L) = 0V, fRF1 = 870MHz, fRF2 = 820MHz, fLO = fRF – 130MHz, PLO = –15dBm, Ta = 25°C, unless otherwise specified Low Noise Amplifier Block Item Symbol Current consumption IDD Control current ICTL RF frequency VCTL Path — — RFIN1 → RFOUT Power gain Noise figure Input IP3 Isolation IIP3 Iso Typ. Max. — H — 1.9 2.5 — L — 1.9 2.5 — H — 55 80 — L –1 0 — H 15 17 19 L — –20 –15 H — –25 –20 L 15 17 19 fRF1 Gp NF Min. RFIN2 → RFOUT fRF2 RFIN1 → RFOUT fRF1 H — 1.5 2.0 RFIN2 → RFOUT fRF2 L — 1.5 2.0 RFIN1 → RFOUT fRF1 H –13 –9 — RFIN2 → RFOUT fRF2 L –13 –9 — RFOUT → RFIN1 fRF1 H 17 22 — RFOUT → RFIN2 fRF2 L 18 23 — Unit Measurement condition mA When no signal µA dB When a small signal dB dBm ∗1 dBm When a small signal Mixer Block Item Symbol Current consumption IDD Power gain Gc Noise figure NF Input IP3 IIP3 LO to RF leak level Plk RF frequency Min. Typ. Max. Unit Measurement condition — — 4.5 6.0 mA When no signal fRF1 10 12 14 fRF2 9 11 13 fRF1 — 4.2 6.0 fRF2 — 4.2 6.0 fRF1 –4.0 –1.0 — fRF2 –3.5 –0.5 — fRF1 — –31 –26 fRF2 — –31 –26 dB When a small signal dB dBm dBm ∗1 fLO = 740MHz fLO = 690MHz The values shown above are the specified values on the Sony’s recommended evaluation board. (When no option pin resistor is added.) ∗1 Conversion from the IM3 suppression ratio for two-wave input: PRF = –30dBm (low noise amplifier block)/ –25dBm (mixer block) at fRFoffset = 100kHz. –2– CXG1082EN Recommended Evaluation Circuit LNA RFIN1 50Ω L13 L4 L5 9 8 10 7 11 6 12 5 L14 C6 L6 50Ω L15 C9 CTL LNA RFIN2 L11 C8 LNA RFOUT 50Ω L12 4 13 L3 IFOUT C4 C2 50Ω L8 L1 L2 C7 3 14 VDD2 (LO AMP) C5 VDD1 (LNA) R1 15 2 16 1 L9 MIX RFIN 50Ω L10 C1 L7 VDD3 (MIX) LOIN 50Ω C3 L1 150nH L11 18nH C6 18pF L2 120nH L12 10nH C7 1000pF L3 33nH L13 22nH C8 100pF L4 18nH L14 5.6nH C9 56pF L5 6.8nH L15 22nH R1 L6 27nH C1 6pF L7 33nH C2 1000pF L8 27nH C3 1000pF L9 5.6nH C4 100pF L10 12nH C5 1000pF –3– CXG1082EN Example of Representative Characteristics (Ta = 25°C) Low Noise Amplifier Block Path RFIN1 → RFOUT Gp, NF vs. fRF Path RFIN2 → RFOUT Gp, NF vs. fRF Gp 17.5 2.5 16.5 16 2 15.5 15 1.5 3 VDD = 3V VCTL = 0V 2.5 17 Gp – Power gain [dB] Gp – Power gain [dB] 17 NF – Noise figure [dB] 17.5 18 3 VDD = 3V VCTL = 3V Gp 16.5 16 2 15.5 15 1.5 NF 14.5 14 800 NF 14.5 820 860 840 880 14 800 1 900 820 fRF – RF frequency [MHz] 20 10 10 –10 –20 –30 –40 –50 IM3 VDD = 3V VCTL = 3V fRF1 = 870MHz fRF2 = 870.1MHz –60 –70 –80 –20 –10 0 POUT – RF output power [dBm] POUT – RF output power [dBm] 0 POUT –30 860 880 1 900 Path RFIN2 → RFOUT POUT, IM3 vs. PIN 20 –90 –40 840 fRF – RF frequency [MHz] Path RFIN1 → RFOUT POUT, IM3 vs. PIN 0 NF – Noise figure [dB] 18 –20 –30 –40 –50 IM3 PIN – RF input power[dBm] VDD = 3V VCTL = 0V fRF1 = 820MHz fRF2 = 820.1MHz –60 –70 –80 –90 –40 10 POUT –10 –30 –20 –10 0 PIN – RF input power[dBm] –4– 10 CXG1082EN Mixer Block Gc, NF vs. fRF 7 15 VDD = 3V fLO = fRF – 130MHz PLO = –15dBm 13 6.5 6 Gc 12 5.5 11 5 10 4.5 NF 9 4 8 3.5 7 3 6 2.5 5 800 820 840 860 880 NF – Noise figure [dB] Gc – Conversion gain [dB] 14 2 900 fRF – RF frequency [MHz] Gc, NF vs. PLO Gc, NF vs. PLO 5.3 14 5.1 13 12 4.9 11 4.7 10 4.5 9 4.3 NF 8 4.1 Gc – Conversion gain [dB] 13 Gc NF – Noise figure [dB] Gc – Conversion gain [dB] 14 VDD = 3V fRF1 = 870MHz fRF2 = 870.1MHz fLO = 740MHz 5.5 15 VDD = 3V fRF1 = 820MHz fRF2 = 820.1MHz fLO = 690MHz 5.3 5.1 Gc 12 4.9 11 4.7 10 4.5 9 4.3 8 4.1 NF 7 3.9 7 3.9 6 3.7 6 3.7 3.5 5 –25 5 –25 –20 –15 –10 –5 0 PLO – LO input power [dBm] 3.5 –20 –15 –10 –5 PLO – LO input power [dBm] –5– 0 NF – Noise figure [dB] 5.5 15 CXG1082EN 0.5 –26 0.5 –26 –27 0 IIP3 –0.5 –28 –1 –29 –1.5 –30 PLK –2 –31 –2.5 –32 VDD = 3V fRF1 = 870MHz fRF2 = 870.1MHz fLO = 740MHz –3 –3.5 –4 –25 –20 –15 –10 –5 IIP3 – Input IP3 [dBm] –25 PLK – LO leak power [dBm] 1 0 IIP3 – Input IP3 [dBm] IIP3, PLK vs. PLO –25 –0.5 –28 –1 –29 –1.5 –30 –2 –31 –2.5 –33 –3 –34 –3.5 –35 –4 –25 0 PLO – LO input power [dBm] POUT, IM3 vs. PIN 10 10 –33 –34 –35 –20 –15 –10 –5 0 0 POUT –20 –30 –40 IM3 –50 VDD = 3V fRF1 = 870MHz fRF2 = 870.1MHz fLO = 740MHz PLO = –15dBm –60 –70 –30 –20 –10 0 POUT – IF output power, IM3 [dBm] 0 POUT – IF output power [dBm] VDD = 3V fRF1 = 820MHz fRF2 = 820.1MHz fLO = 690MHz POUT, IM3 vs. PIN 20 –80 –40 –32 PLK PLO – LO input power [dBm] 20 –10 –27 IIP3 PLK – LO leak power [dBm] IIP3, PLK vs. PLO 1 10 PIN – RF input power [dBm] POUT –10 –20 –30 –40 IM3 –50 VDD = 3V fRF1 = 820MHz fRF2 = 820.1MHz fLO = 690MHz PLO = –15dBm –60 –70 –80 –40 –30 –20 –10 0 PIN – RF input power [dBm] –6– 10 CXG1082EN Example of Characteristics for Option Resistance R1 Changed (Ta = 25°C) IDD3 – Mixer block current consumption (MIX) [mA] Mixer Block IDD3 (MIX) vs. R1 10 VDD = 3V 8 6 4 2 OPEN 1200 680 470 390 330 270 220 R1 – Option resistance [Ω] Gc, NF vs. R1 Gc, NF vs. R1 14 Gc – Conversion gain, NF-Noise figure [dB] GC 12 10 VDD = 3V fRF = 870MHz fLO = 740MHz PLO = –15dBm 8 6 NF 4 2 OPEN 1200 680 470 390 330 270 12 GC 10 VDD = 3V fRF = 820MHz fLO = 690MHz PLO = –15dBm 8 6 NF 4 2 OPEN 1200 220 R1 – Option resistance [Ω] IIP3, PLK vs. R1 IIP3 –29 PLK 0 –30 –1 –31 680 470 390 330 R1 – Option resistance [Ω] 270 2 IIP3 – Input IP3 [dBm] –28 1 –2 OPEN 1200 390 330 270 220 –27 3 PLK – LO leak power [dBm] IIP3 – Input IP3 [dBm] 2 470 IIP3, PLK vs. R1 –27 3 VDD = 3V fRF = 870MHz fLO = 740MHz PLO = –15dBm 680 R1 – Option resistance [Ω] VDD = 3V fRF = 820MHz fLO = 690MHz PLO = –15dBm –7– –28 –29 1 –30 0 PLK –31 –1 –2 OPEN 1200 –32 220 IIP3 680 470 390 330 R1 – Option resistance [Ω] 270 –32 220 PLK – LO leak power [dBm] Gc – Conversion gain, NR-Noise figure [dB] 14 CXG1082EN Recommended Evaluation Board 50mm Front 50mm LNA RFIN1 LNA RFIN2 IFOUT LNA RFOUT LO IN MIX RFIN CTL VDD2 GND VDD3 VDD1 Glass fabric-base 4-layer epoxy board (thickness: 0.2mm × 2) GND for the whole 2nd and 3rd layers Enlarged Diagram of Center Part L5 L15 L14 L6 L4 L13 C6 C9 C8 L12 L11 C5 C4 C7 L3 L8 L7 C1 L1 L2 C3 C2 –8– L10 L9 CXG1082EN Package Outline Unit: mm 16PIN VSON(PLASTIC) 0.9 MAX 0.6 3.5 0.05 S A B 0.4 2x 0.35 ± 0.1 0.2 S B 4x 0.2 S A B 0.03 ± 0.03 0.2 ± 0.01 0.05 M S A-B 0.23 ± 0.02 1.4 0.5 ± 0.2 2.7 2.5 0.35 ± 0.1 S Soldrer Plating 0.13 ± 0.025 + 0.09 0.14 – 0.03 NOTE: 1) The dimensions of the terminal section apply to the ranges of 0.1mm and 0.25mm from the end of a terminal. TERMINAL SECTION PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN LEAD TREATMENT SOLDER PLATING EIAJ CODE LEAD MATERIAL COPPER ALLOY JEDEC CODE PACKAGE MASS 0.02 g SONY CODE VSON-16P-01 –9– Sony Corporation