HV508 High Voltage Liquid Crystal Shutter Driver Ordering Information Device HVIN Maximum Voltage Package Options SO-8 HV508 45V HV508LG Features General Description ❏ HVCMOS technology for high performance The Supertex HV508 is a 45V liquid crystal shutter driver in an SO8 surface mount package. It consist of two outputs that provide square waves of opposite phase. The liquid crystal shutter is connected between the two outputs. Its equivalent load can be approximated as a resistor in parallel with a capacitor. Minimum resistance is 1.0MΩ and maximum capacitance is 0.1µF. ❏ Logic-selectable output voltage ❏ 100nF drive capability ❏ Up to 90VP-P ❏ 25µs response time The HV508 has three input supply voltages, HVIN, LVIN, and VDD. The output’s amplitude will be either LVIN or HVIN. A logic high on the HVEN input will set the output to operate from the HVIN supply. A logic low on the HVEN input will set the output to operate from the LVIN supply. The output frequency is set by the logic input frequency applied on the POL input. Pin Configuration Absolute Maximum* Ratings HVIN, high voltage input +60V LVIN, low voltage input +7.5V VDD, logic supply voltage +12V Continuous total power dissipation Operating temperature Storage temperature 700mW -5°C to +60°C LVIN 1 8 HVOUT1 POL 2 7 HVIN HVEN 3 6 VDD GND 4 5 HVOUT2 top view SO-8 –65°C to +150°C Soldering temperature +300°C * All voltages are referenced to GND. For operation above 25°C ambient derate linearly at 6mW/°C. 12/13/01 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to 1 workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website. HV508 Electrical Characteristics DC Electrical Characteristics (over operating supply voltages unless otherwise specified, TA = -5°C to +60°C) Symbol Parameter Min Typ Max Unit µA Conditions IHVQ HVIN quiescent current 10 ILVQ LVIN quiescent current 10 µA IDDQ VDD quiescent current 10 µA IHV HVIN operating current 2.8 mA POL = 100Hz, HVEN = high, TA = 25°C, Load = 1MΩ in parallel with 0.1µF between HVOUT1 and HVOUT2 ILV LVIN operating current 380 µA POL = 100Hz, HVEN = low, TA = 25°C, Load = 1MΩ in parallel with 0.1µF between HVOUT1 and HVOUT2 IIL Logic input current low IIH Logic input current high CLOAD Output capacitive load* -5 µA 0 5.0 µA 0.25 µF CLOAD in parallel with a 1MΩ resistor *The device can operate continuously without any damage within this range. AC limits are not implemented. AC Electrical Characteristics (HVIN = 45V, LVIN = 6V, VDD = 5V, TA = -5°C to +60°C) Symbol Parameter Min Typ 0 Max Unit 100 Hz fPOL POL input frequency tHV(ON) Turn-on time when high voltage is enable 16 µs tHV(OFF) Turn-off time when high voltage is enabled 16 µs tLV(ON) Turn-on time when high voltage is disabled 40 µs tLV(OFF) Turn-off time when high voltage is disabled 6.0 µs tEN(ON) Turn-on time from HVEN to HVOUT 25 µs Max Unit Recommended Operating Conditions Symbol Parameter Min Typ VDD Logic supply voltage 5.0 10.0 V LVIN Low output supply voltage 3.0 6.0 V HVIN High output supply voltage 5.0 45 V VIL Logic input voltage low 0 0.3VDD V VIH Logic input voltage high 0.7VDD VDD V TA Ambient Temperature -5.0 +60 °C Notes: Power-up sequence should be the following: 1. Connect GND, VDD, logic inputs, HVIN, and LVIN. Power-down sequence should be the reverse of the above. 2 Conditions Load = 1MΩ in parallel with 0.1µF between HVOUT1 and HVOUT2. HVEN = High. Outputs rise to HVIN. See Fig. 1. Load = 1MΩ in parallel with 0.1µF between HVOUT1 and HVOUT2. HVEN = Low. Outputs rise to LVIN. See Fig. 1. Load = 1MΩ in parallel with 0.1µF between HVOUT1 and HVOUT2. See Fig. 2. HV508 Truth Table HVEN POL HVOUT1 HVOUT2 H H HVIN GND H L GND HVIN L H LVIN GND L L GND LVIN Timing Diagram VIH POL 50% 50% VIL VIN or LVIN 80% HVOUT1 5% GND t(ON) t(OFF) Figure 1 VIH HVEN 50% VIL HVIN 80% HVOUT1 LVIN tEN(ON) Figure 2 Block Diagram LVIN HVIN Level Translator Level Translator VDD HVOUT1 CMOS Logic HVEN Level Translator POL GND Level Translator HVOUT2 12/13/010 ©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited. 3 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 • FAX: (408) 222-4895 www.supertex.com