Supertex inc. HV508 High Voltage, Liquid Crystal Shutter Driver Features ►► HVCMOS® technology for high performance ►► Logic-selectable output voltage ►► 100nF drive capability ►► Up to 90VP-P ►► 25µs response time General Description The Supertex HV508 is a 45V liquid crystal shutter driver in an 8-Lead SOIC surface mount package. It consists of two outputs that provide square waves of opposite phase. The liquid crystal shutter is connected between the two outputs. Its equivalent load can be approximated as a resistor in parallel with a capacitor. Minimum resistance is 1.0MΩ and maximum capacitance is 0.1µF. The HV508 has three input supply voltages, HVIN, LVIN, and VDD. The output’s amplitude will be either LVIN or HVIN. A logic high on the HVEN input will set the output to operate from the HVIN supply. A logic low on the HVEN input will set the output to operate from the LVIN supply. The output frequency is set by the logic input frequency applied on the POL input. Block Diagram LVIN HVIN VDD HVEN POL Level Translator Level Translator HVOUT1 CMOS Logic GND Doc.# DSFP-HV508 A061913 Level Translator Level Translator HVOUT2 Supertex inc. www.supertex.com HV508 Pin Configuration Ordering Information Part Number Package Option Packing LVIN 1 8 HVOUT1 HV508LG-G 8-Lead SOIC 2500/Reel POL 2 7 HVIN HVEN 3 6 VDD GND 4 5 HVOUT2 -G denotes a lead (Pb)-free / RoHS compliant package Absolute Maximum Ratings Parameter Value HVIN, high voltage input +60V LVIN, low voltage input +7.5V VDD, logic supply voltage +12V Operating temperature -5.0°C to +60°C Storage temperature -65°C to +150°C Power dissipation1 8-Lead SOIC (top view) Product Marking YWW HV508 LLLL Y = Last Digit of Year Sealed WW = Week Sealed L = Lot Number = “Green” Packaging Package may or may not include the following marks: Si or 700mW 8-Lead SOIC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Typical Thermal Resistance Notes: 1. For operation above 25OC ambient, derate linearly at 6.0mW/OC. Package θja 8-Lead SOIC 101OC/W Recommended Operating Conditions Sym Parameter Min Typ Max Units Conditions VDD Logic supply voltage 5.0 - 10.0 V --- LVIN Low output supply voltage 3.0 - 6.0 V --- HVIN High output supply voltage 5.0 - 45 V --- VIL Logic input voltage low 0 - 0.3VDD V --- VIH Logic input voltage high 0.7VDD - VDD V --- TA Ambient temperature -5.0 - +60 °C --- DC Electrical Characteristics (over operating supply voltages unless otherwise specified, T A Min Typ Max Units HVIN quiescent current - - 10 µA --- ILVQ LVIN quiescent current - - 10 µA --- IDDQ VDD quiescent current - - 10 µA --- IHV HVIN operating current - - 2.8 mA POL = 100Hz, HVEN = high, TA = 25OC, Load = 1MΩ in parallel with 0.1µF between HVOUT1 and HVOUT2 ILV LVIN operating current - - 380 µA POL = 100Hz, HVEN = low, TA = 25OC, Load = 1MΩ in parallel with 0.1µF between HVOUT1 and HVOUT2 IIL Logic input current low -5.0 - - µA --- IIH Logic input current high - - 5.0 µA --- CLOAD Output capacitive load* 0 - 0.25 µF CLOAD in parallel with a 1.0MΩ resistor * Sym Parameter IHVQ = -5°C to +60°C) Conditions The device can operate continuously in this range without damage. AC limits are not implemented. Doc.# DSFP-HV508 A061913 2 Supertex inc. www.supertex.com HV508 AC Electrical Characteristics (HV Sym Parameter POL input frequency fPOL tHV(ON) tHV(OFF) tLV(ON) tLV(OFF) tEN(ON) Turn-on time when high voltage is enabled Turn-off time when high voltage is enabled Turn-on time when high voltage is disabled Turn-off time when high voltage is disabled Turn-on time from HVEN to HVOUT IN = 45V, LVIN = 6.0V, VDD = 5.0V, TA = -5.0°C to +60°C) Min Typ Max Units Conditions 0 - 100 Hz --- - - 16 µs - - 16 µs Load = 1.0MΩ in parallel with 0.1µF between HVOUT1 and HVOUT2, HVEN = high, outputs rise to HVIN. See Fig.1. - - 40 µs - - 6.0 µs - - 25 µs Load = 1.0MΩ in parallel with 0.1µF between HVOUT1 and HVOUT2, HVEN = low, outputs rise to HVIN. See Fig.1. Load = 1.0MΩ in parallel with 0.1µF between HVOUT1 and HVOUT2. See Fig.2. Power-Up/ Power-Down Sequences Power-up sequence should be the following: 1. Connect GND 2. Connect VDD 3. Connect logic inputs 4. Connect HVIN 5. and connect LVIN Power-down sequence should be the reverse. Timing Diagrams 50% POL HVOUT1 VIH 50% VIL HVIN or LVIN 80% GND t(ON) t(OFF) Fig. 1 5% VIH 50% HVEN VIL HVIN HVOUT1 80% LVIN t(ENON) Fig. 2 Logic Truth Table HVEN POL HVOUT1 HVOUT2 H H HVIN GND H L GND HVIN L H LVIN GND L L GND LVIN Doc.# DSFP-HV508 A061913 3 Supertex inc. www.supertex.com HV508 8-Lead SOIC (Narrow Body) Package Outline (LG) 4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch θ1 D 8 Note 1 (Index Area D/2 x E1/2) E1 E L2 L 1 θ L1 Top View View B Note 1 Gauge Plane Seating Plane View B h A h A A2 Seating Plane A1 e b Side View View A-A A Note: 1. This chamfer feature is optional. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol Dimension (mm) A A1 A2 b MIN 1.35* 0.10 1.25 0.31 NOM - - - - MAX 1.75 0.25 1.65* 0.51 D E E1 4.80* 5.80* 3.80* 4.90 6.00 3.90 5.00* 6.20* 4.00* e 1.27 BSC h L 0.25 0.40 - - 0.50 1.27 L1 L2 θ θ1 0 5O - - 8 15O O 1.04 REF 0.25 BSC O JEDEC Registration MS-012, Variation AA, Issue E, Sept. 2005. * This dimension is not specified in the JEDEC drawing. Drawings are not to scale. Supertex Doc. #: DSPD-8SOLGTG, Version I041309. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-HV508 A061913 4 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com