VT83205 3.3V Low Phase Noise VCXO (Voltage-Controlled Crystal Oscillator) and PLL Clock Synthesizer Applications •= Telecom switching •= HDTV •= Set-top boxes •= MPEG Video clock source General Description The Vaishali VT83205 is a single-chip, integrated VCXO and Phase Locked Loop (PLL) clock synthesizer. The device uses the VCXO and an analog Phase-Locked Loop (PLL) to accept a 10 MHz to 14.318 MHz, 30pF (pull range of 200 ppm) crystal input, in order to produce either one or two output clocks. A 0 to 3V control signal is used to fine tune the output clock frequency in the ±100ppm range. Select inputs SO:S2 are used for frequency and output selection. Features •= 3.3V supply operation •= Packaged in 16-pin SOIC & QSOP packages. •= Replaces separate VCXO and multiplier •= Uses inexpensive pullable crystal •= On-chip VCXO with 200 ppm pull range (±100 ppm) •= 5V-tolerant control inputs •= Zero ppm synthesis error in both clocks Figure 1. Functional Block Diagram VDD1 VDD2 Load Cap Control VIN X2 10-14 MHz Pullable Crystal Load Caps osc Output Buffer CLK1 Output Buffer CLK2 Low Phase Noise PLL X1 S2:S0 OE Page 1 MDST-0001-01 www.vaishali.com Vaishali Semiconductor 1300 White Oaks Road, Ste. 200 Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063 2001-03-08 VT83205 Figure 2. Pin Configuration VT83205 Pinout X1 1 16 X2 VDD1 2 15 NC VDD1 3 14 S1 VIN 4 13 GND GND 5 12 GND 6 11 CLK2 VDD2 S2 7 10 OE 8 9 S0 CLK1 Table 1. Pin Description Name Pin # Type Description X1 1 XI Crystal connection. Connect to a pullable crystal of 10–14.318 MHz VDD1 2,3 P Core VDD. Connect to 3.3V VIN 4 I Voltage input to VCXO. Zero to 3V signal controls the frequency of the VCXO. GND 5,6,13 P Connect to ground. S2 7 I Select input #2. Selects outputs per Table 2 OE 8 I Active HIGH Output enable . Outputs in Hi-Z state when LOW CLK1 9 O Clock output #1 per Table 2. SO 10 I Select input #0. Selects output per Table 2 VDD2 11 P Output VDD. Connect to 3.3V CLK2 12 O Clock output #2 per Table 2 S1 14 I Select input #1. Selects outputs per Table 2 NC 15 - There is no internal connection to this pin. X2 16 XO Crystal connection. Connect to a pullable crystal of 10 MHz – 14.318 MHz. Legend: I = Input O = Output P = Power supply connection XI, XO = Crystal connections. Table 2. Pullable Crystal Specifications Parameter Correlation (load) capacitance Value 30 pF C0/C1 240 max ESR 35 Ω max Operating Temperature 0°C to +70°C Initial Accuracy ±20 ppm Temperature + Aging Stability ±50 ppm Page 2 MDST-0001-01 www.vaishali.com Vaishali Semiconductor 1300 White Oaks Road, Ste 200 Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063 2001-03-08 VT83205 Table 3 Clock Selection Table (OE = High) S2 S1 S0 CLK1 CLK2 0 0 0 REF/4 REF/2 (1) 0 0 M OFF X 0.666 0 0 1 OFF X 2.6666 0 1 0 OFF X4 (1) 0 1 M OFF X 1.5 0 1 1 OFF X 1.3333 1 0 0 Test Test 1 0 M OFF X4 1 0 1 OFF X2 1 1 0 OFF X3 (1) (1) 1 1 M OFF X5 1 1 1 OFF X6 Note: 1. SO has three valid states: 0 = VIN ≤ 0.5V 1 = VIN ≥ VDD – 0.5 M = 0.5V < VIN < VDD – 0.5V Table 4 Absolute Maximum Ratings Parameter Conditions Supply voltage, VDD Referenced to GND Inputs and Clock Outputs Referenced to GND Soldering Temperature Max of 10 seconds Storage temperature Min Typ -0.5 -65 Max Units 5 V VDD+0.5 V 260 °C 150 °C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and correct functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Table 5 Operating Conditions Min Typ Max Units Operating Voltage, VDD Parameter Conditions 3.15 3.3 3.45 V Input High Voltage, VIH, X1 pin only 2.5 Input Low Voltage, VIL, X1 pin only V 0.4 Input High Voltage, VIH, binary inputs S2, S1, OE Input Low Voltage, VIL, binary inputs S2, S1, OE Input High Voltage, VIH, trinary input S0 Input Low Voltage, VIL, trinary input S0 2 V V 0.8 VDD-0.5 V V 0.5 V Operating Temperature 0 70 °C VCXO control voltage, VIN 0 3 V Page 3 MDST-0001-01 www.vaishali.com Vaishali Semiconductor 1300 White Oaks Road, Ste 200 Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063 2001-03-08 VT83205 Table 6. DC Electrical Characteristics TA = 0°C to +70°C, VDD = 3.15 V to 3.45 V Parameter (1) Condition Min Output High Voltage, VOH IOH=-25mA 2.4 Output Low Voltage, VOL IOL=25mA Operating Supply Current, IDD No Load 38 mA Each output ±85 mA S2:0, OE 7 pF Short Circuit Current Input Capacitance Typ Max Units V 0.4 V Note: 1. Typical values are at VDD = 3.3V and 25°C Table 7. AC Electrical Characteristics TA = 0°C to +70°C, VDD = 3.15 V to 3.45 V Symbol Parameter Condition Fosc Input Crystal Frequency Tr Output Clock Rise Time tf Output Clock Fall Time Min Typ Max Units 14.318 MHz 0.8 to 2.0V 1.5 ns 2.0 to 0.8V 1.5 ns 10 tod Output Clock Duty Cycle At VDD/2 tpZL, tpZH Enable Time. OE to CLK CL = 50pf tpLZ, tpHZ Disable Time. OE to CLK CL = 50pf tjit (pk-pk) Maximum Absolute Jitter (Peak to Peak) 40 Phase Noise, relative to carrier 10 KHz offset Output pullability 0V <VIN <3V 60 % 5 6.5 ns 4 5.5 ns ±100 ps -115 dBc/Hz ±100 ppm Note: 1. Typical values are at VDD = 3.3V and 25°C Figure 3. External Crystal Connection Block Diagram 10-14MHz Pullable Crystal X2 X2 XTAL XTALOSC OSC 20pF 33pF (CX2) 20pF 33pF CX1 CX2 X1 X1 Clk 1 PLL PLL CLOCK CLOCK GEN CX1 External Crystal External Load Capacitors Clk 2 GEN Crystal OE OE Ordering Information Part Number VT83205Q VT83205QX VT83205S1 VT83205S1X VT83205/D Marking VT83205Q VT83205Q VT83205S1 VT83205S1 Shipping/Packaging Tubes Tape & Reel Tubes Tape & Reel Die No. of Pins 16 16 16 16 Package QSOP QSOP SOIC SOIC Temperature 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C Page 4 MDST-0001-01 www.vaishali.com Vaishali Semiconductor 1300 White Oaks Road, Ste 200 Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063 2001-03-08