Advance Information VT98000 Multifrequency Synthesizer Applications •= •= Set-top boxes MPEG Video clock source General Description The Vaishali VT98000 is a single-chip, integrated multiple Phase Locked Loop (PLL) clock synthesizer. The device uses an analog Phase Locked Loop (PLL) to accept a 27 MHz crystal input to produce multiple outputs. Selection pins are used to provide various outputs. Features •= 24.576 MHz for Firewire IEEE1394 or video digitizer •= 18.432 MHz for audio processor •= •= 2kHz standby clock 24.576 MHz / 28.224 MHz for software or hardware modem •= •= Zero ppm synthesis error in all clocks (except the 2 kHz standby clock) 27 MHz buffered output clock •= •= 5V tolerant inputs 6.000MHz buffered output clock •= 20-pin, 150 mil SSOP (QSOP) Figure 1. Functional Block Diagram VDD1 VDD2 VDD3 VDD4 ROM Table Buffer X2 24.576/ 28.224 MHz Select 24/28 MHz osc 27 MHz Crystal PLL Multiplier Buffer 24.576 MHz MODE X1 18.432MHz/ 6.000MHz Buffer Divider /PD Buffer 2kHz Buffer 27 MHz Buffer 27 MHz GND1 GND2 GND3 GND4 GND5 Page 1 MDST-0013-00 www.vaishali.com Vaishali Semiconductor 1300 White Oaks Road Ste. 200 Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063 2001-04-17 VT98000 Advance Information Figure 2. Pin Configuration VT98000 Select 24/28MHz 1 20 X2 X1 2 19 3 18 VDD1 VDD2 GND1 4 17 27MHz VDD4 5 6 16 15 GND4 GND2 7 14 GND3 24.576MHz 8 13 18.432MHz/6.000MHz 9 10 12 /PD 11 2kHz MODE 24.576MHz/28.224MHz GND5 27MHz VDD3 Table 1. Pin Description Name Pin # Type Description Select 24/28 MHz 1 I(PU) Select 24.576 MHz or 28.224 MHz output X2 2 O Crystal connection. Connect to a 27 MHz crystal X1 3 I Crystal connection. Connect to a 27 MHz crystal VDD1 4 P Connect to 3.3V VDD2 5 P Connect to VDD GND1 6 P Connect to ground GND2 7 P Connect to ground 24.576 MHz 8 O Clock output, 24.576 MHz MODE 9 I(PU) Mode control. See Table 2 24.576 MHz/ 28.224MHz 10 O Clock output, 24.576 MHz or 28.224 MHz 2 kHz 11 O Clock output, 2 kHz (1) /PD 12 I(PU) 18.432MHz/6.000MHz 13 O Clock output, 18.432 MHz or 6.000 MHz GND3 14 P Connect to ground GND4 15 P Connect to ground VDD3 16 P Connect to VDD VDD4 17 P Connect to VDD 18,19 O 27 MHz buffered clock outputs 20 P Connect to ground 27 MHz GND5 Powerdown control. When LOW, all clocks are disabled except 2kHz standby clock Legend: I = Input O = Output P = Power supply connection I(PU) = Input with a 250k ohm pull up Note (1). All disabled clock outputs are tristated (high impedance). Page 2 MDST-0013-00 www.vaishali.com Vaishali Semiconductor 1300 White Oaks Road, Ste. 200 Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063 2001-04-17 VT98000 Advance Information Table 2. Mode Control and Frequency Selection Table (/PD = HIGH) (3) (1,2) Outputs Control Pin 9 Pin 1 Pin 10 Pin 13 Mode (Select 24/28MHz). (24.576 MHz / 28.224 MHz) (18.43 MHz / 6 MHz) 0 0 High Impedance 0 1 1 0 24.576 MHz 1 1 28.224 MHz 18.432 MHz 6 MHz Notes: 1. 27MHz (Pins 18 &19) and 24.576 MHz (Pin 8) are active, unless /PD = LOW 2. 2 kHz standby clock is always active, independent of /PD logic state 3. 0 = Low, 1 = HIGH Table 3. Recommended Crystal Specification Frequency accuracy is directly proportional to the capacitive load (CL) of the crystal. Parameter Definition Frequency at CL, FL Defines the series resonant frequency at CL Total accuracy: includes initial accuracy @ 25ºC, aging, and temperature drift (25ºC to 70ºC) Maximum deviation from nominal frequency @ 25ºC, taking in to account aging, and temperature drift Load Capacitance CL Capacitive load for nominal frequency FL C1 Motional capacitance of the crystal C0 ESR Min Typ Max 27.000 Units MHz 40 20 ppm pf TBD pf Shunt capacitance of the crystal 7 pf Equivalent Series Resistance of the crystal 40 ohms Table 4. Operating Conditions Parameter Conditions Min Typ Max Units Power Supply Voltage, VDD 3.0 3.3 3.6 V Input High Voltage, VIH 2.0 VDD V 0.8 V Input Low Voltage, VIL Operating Temperature,TA 0 25 70 ºC Symbol Min Typ Max Units Output voltage high IOH = -8 mA VOH 2.7 Output voltage low IOL = 8 mA VOL 0.4 V Maximum input capacitance (X1,X2) Cin 3 pF Power consumption (operating) Idd1 mA Power consumption (powerdown) Idd2 mA Table 5. Electrical Characteristics Parameter V Page 3 MDST-0013-00 www.vaishali.com Vaishali Semiconductor 1300 White Oaks Road, Ste. 200 Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063 2001-04-17 VT98000 Advance Information Table 6. Phase Noise Requirements (Crystal phase noise must be less than −130 dBc/Hz @ 10kHz) Parameter Symbol Min Typ Max Units 27 MHz -120 dBc/Hz @ 10 kHz 24.576 MHz -100 dBc/Hz @ 10 kHz 24.576/28.224 MHz -100 dBc/Hz @ 10 kHz 18.432/6.000 MHz -100 dBc/Hz @ 10 kHz Table 7. Output Accuracies (Excluding crystal accuracy) Parameter Symbol Min Typ Max Units 24.576/28.224 MHz 0 ppm 2kHz 50 % 18.432/6.000 MHz 0 ppm 27 MHz 0 ppm Table 8 AC Characteristics All @Cload = 20 pF, VDD = 3.0V to 3.6V Parameter Symbol Duty Cycle @ VDD/2 δ Rise time ( measured between 0.8V and 2.0V) Tr Fall time ( measured between 0.8V and 2.0V) Tf PLL lock time Min Typ Max Units 45/55 % 1 2.5 ns 1 2.5 ns Tlock Time to clock outputs after VDD is available ms Tst 50 ms Ordering Information Part Number VT98000Q VT98000QX Marking VT98000Q VT98000Q Shipping/Packaging Tubes Tape & Reel No. of Pins 20 20 Package QSOP QSOP Temperature 0°C to +70°C 0°C to +70°C Page 4 MDST-0013-00 www.vaishali.com Vaishali Semiconductor 1300 White Oaks Road, Ste. 200 Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063 2001-04-17