VAISH VT83201S1X

VT83201
3.3V Low Phase Noise VCXO
(Voltage-Controlled Crystal Oscillator)
and PLL Clock Synthesizer
Applications
•=
DSL clock source
•=
MPEG Video clock source
•=
Set-top boxes
•=
HDTV
•=
Telecom switching
General Description
The Vaishali VT83201 is a single-chip, integrated VCXO and Phase Locked Loop (PLL) clock synthesizer.
The device uses the VCXO and an analog Phase-Locked Loop (PLL) to accept a 10 MHz to 20 MHz, 30pF
(pull range of 200 ppm) crystal input, in order to produce either one or two output clocks. A 0 to 3V control
signal is used to fine tune the output clock frequency in the ±100ppm range. Select inputs S0 and S1 are
used for frequency and output selection.
Features
•=
3.3V supply operation
•=
5V-tolerant control inputs
•=
Packaged in 16-pin SOIC package
•=
•=
Replaces separate VCXO and multiplier
Zero ppm synthesis error in both
clocks
•=
Uses inexpensive pullable crystal
•=
On-chip VCXO with 200 ppm pull range (±100 ppm)
Figure 1. Functional Block Diagram
VDD1
VDD2
Load Cap Control
VIN
X2
10-20 MHz
Pullable
Crystal
osc
Load
Caps
Output
Buffer
CLK1
Output
Buffer
CLK2
Low
Phase
Noise
PLL
X1
S1:S0
OE
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MDST-0011-01
www.vaishali.com
Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063
2001-04-12
VT83201
Figure 2. Pin Configuration
VT83201
16 pin SOIC
X1
1
16
X2
VDD1
2
15
NC
VDD1
3
14
S1
VIN
4
13
GND
GND
5
12
CLK2
GND
6
11
VDD2
GND
7
10
S0
OE
8
9
CLK1
Table 1. Pin Description
Name
Pin #
Type
Description
X1
1
XI
Crystal connection. Connect to a pullable crystal of 10–20 MHz
VDD1
2,3
P
Core VDD. Connect to 3.3V
VIN
4
I
Voltage input to VCXO. Zero to 3V signal controls the frequency of the VCXO.
GND
5,6, 7,13
P
Connect to ground.
OE
8
I
Active HIGH Output enable . Outputs in Hi-Z state when LOW
CLK1
9
O
Clock output #1 per Table 2.
S0
10
I
Select input #0. Selects output per Table 2
VDD2
11
P
Output VDD. Connect to 3.3V
CLK2
12
O
Clock output #2 per Table 2
S1
14
I
Select input #1. Selects outputs per Table 2
NC
15
-
There is no internal connection to this pin.
X2
16
XO
Crystal connection. Connect to a pullable crystal of 10 MHz – 20 MHz.
Legend: I = Input
O = Output
P = Power supply connection
XI, XO = Crystal connections.
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www.Vaishali.com
Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063
2001-04-12
VT83201
Table 2. Clock Selection Table (OE = High)
S1
S0
CLK1
CLK2
0
0
REF/4
REF/2
(1)
0
M
OFF
X 0.666
0
1
OFF
X 2.6666
1
0
OFF
X4
1
1
OFF
X 1.3333
Note:
1.
SO has three valid states: 0 (LOW) = VIN ≤ 0.5V
1 (HIGH) = VIN ≥ VDD – 0.5
M (MID) = 0.5V < VIN < VDD – 0.5V
Table 3. Absolute Maximum Ratings
Parameter
Conditions
Supply voltage, VDD
Referenced to GND
Inputs and Clock Outputs
Referenced to GND
Soldering Temperature
Max of 10 seconds
Storage temperature
Min
Typ
-0.5
-65
Max
Units
4.6
V
VDD+0.5
V
260
°C
150
°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress
specifications only and correct functional operation of the device at these or any other conditions above those listed in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product
reliability.
Table 4. Operating Conditions
Min
Typ
Max
Units
Operating Voltage, VDD
Parameter
Conditions
3.15
3.3
3.45
V
Input High Voltage, VIH, X1 pin only
2.5
V
Input Low Voltage, VIL, X1 pin only
0.4
Input High Voltage, VIH, binary inputs
S1, OE
Input Low Voltage, VIL, binary inputs
S1, OE
Input High Voltage, VIH, trinary input
S0
Input Low Voltage, VIL, trinary input
S0
2
V
V
0.8
VDD-0.5
V
V
0.5
V
Operating Temperature
0
70
°C
VCXO control voltage, VIN
0
3
V
Table 5. DC Electrical Characteristics
TA = 0°C to +70°C, VDD = 3.15 V to 3.45 V
Parameter
(1)
Condition
Min
Typ
Output High Voltage, VOH
IOH=-25mA
2.4
Max
Units
Output Low Voltage, VOL
IOL=25mA
Operating Supply Current, IDD
No Load
38
mA
Short Circuit Current
Each output
±85
mA
Input Capacitance
S0, S1, OE
7
pF
V
0.4
V
Note:
1. Typical values are at VDD = 3.3V and 25°C
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MDST-0011-01
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Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063
2001-04-12
VT83201
Table 6. AC Electrical Characteristics
TA = 0°C to +70°C, VDD = 3.15 V to 3.45 V
Symbol
Fosc
Parameter
Condition
Min
Input Crystal Frequency
Typ
10
Max
Units
20
MHz
tr
Output Clock Rise Time
0.8 to 2.0V
1.5
ns
tf
Output Clock Fall Time
2.0 to 0.8V
1.5
ns
tod
Output Clock Duty Cycle
At VDD/2
60
%
tpZL, tpZH
Enable Time. OE to CLK
CL = 50pf
5
6.5
ns
tpLZ, tpHZ
Disable Time. OE to CLK
CL = 50pf
4
5.5
ns
tjit (pk – pk)
Maximum Absolute Jitter
(Peak to Peak)
Phase Noise, relative to
carrier
10 KHz offset
Output pullability
0V <VIN <3V
40
±100
ps
-115
dBc/Hz
±100
ppm
Note:
1. Typical values are at VDD = 3.3V and 25°C
Table 7 Pullable Crystal Specifications
Parameter
Value
Correlation (load) capacitance
30 pF
C0/C1
240 max
ESR
35 Ω max
0°C to +70°C
Operating Temperature
Initial Accuracy
±20 ppm
Temperature + Aging Stability
±50 ppm
Figure 3. External Crystal Connection Block Diagram
X2
10-20 MHz
Pullable Crystal
XTAL
XTALOSC
OSC
X1
Clk 1
PLL
PLL
CLOCK
CLOCK
GEN
Clk 2
GEN
OE
OE
Ordering Information
Part Number
VT83201S1
VT83201S1X
VT83201/D
VT83201/DW
Marking
VT83201S1
VT83201S1
Shipping/Packaging
Tubes
Tape & Reel
Dice in waffle packe
Dice in wafer form
No. of Pins
16
16
Package
SOIC
SOIC
Temperature
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
Page 4
MDST-0011-01
www.Vaishali.com
Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063
2001-04-12