XICOR X9C103

APPLICATION NOTES
A V A I L A B L E
AN42 • AN44–48 • AN50 • AN52 • AN53 • AN71 • AN73
Terminal
Voltage ±5V, 100 Taps
X9C102/103/104/503
X9C102/103/104/503
E2POT™ Nonvolatile Digital Potentiometer
FEATURES
DESCRIPTION
•
•
The Xicor X9C102/103/104/503 is a solid state nonvolatile potentiometer and is ideal for digitally controlled
resistance trimming.
•
•
•
•
•
•
•
Compatible with X9102/103/104/503
Low Power CMOS
—VCC = 5V
—Active Current, 3mA Max
—Standby Current, 500µA Max
99 Resistive Elements
—Temperature Compensated
—± 20% End to End Resistance Range
100 Wiper Tap Points
—Wiper Positioned via Three-Wire Interface
—Similar to TTL Up/Down Counter
—Wiper Position Stored in Nonvolatile
Memory and Recalled on Power-Up
100 Year Wiper Position Data Retention
X9C102 = 1KΩ
X9C103 = 10KΩ
X9C503 = 50KΩ
X9C104 = 100KΩ
The X9C102/103/104/503 is a resistor array composed of
99 resistive elements. Between each element and at
either end are tap points accessible to the wiper element.
The position of the wiper element is controlled by the CS,
U/D, and INC inputs. The position of the wiper can be
stored in nonvolatile memory and then be recalled upon a
subsequent power-up operation.
The resolution of the X9C102/103/104/503 is equal to
the maximum resistance value divided by 99. As an
example, for the X9C503 (50KΩ) each tap point represents 505Ω.
All Xicor nonvolatile memories are designed and tested
for applications requiring extended endurance and data
retention.
FUNCTIONAL DIAGRAM
U/D
INC
CS
7-BIT
UP/DOWN
COUNTER
99
VH
98
97
7-BIT
NONVOLATILE
MEMORY
ONE
OF
ONEHUNDRED
DECODER
96
TRANSFER
GATES
RESISTOR
ARRAY
2
VCC
GND
STORE AND
RECALL
CONTROL
CIRCUITRY
1
0
VL
VW
3863 FHD F01
E2POT™ is a trademark of Xicor, Inc.
©Xicor, Inc. 1994, 1995 Patents Pending
3863-2.4 9/18/96 T2/C0/D0 SH
1
Characteristics subject to change without notice
X9C102/103/104/503
PIN DESCRIPTIONS
PIN CONFIGURATION
VH and VL
The high (VH) and low (VL) terminals of the X9C102/103/
104/503 are equivalent to the fixed terminals of a
mechanical potentiometer. The minimum voltage is –5V
and the maximum is +5V. It should be noted that the
terminology of VL and VH references the relative position
of the terminal in relation to wiper movement direction
selected by the U/D input and not the voltage potential on
the terminal.
DIP/SOIC
INC
1
8
U/D
2
3
7
X9C102/
103/104/503
6
CS
VH
VSS
4
5
VW
VCC
VL
3863 FHD F02.2
VW
VW is the wiper terminal, equivalent to the movable
terminal of a mechanical potentiometer. The position
of the wiper within the array is determined by the
control inputs. The wiper terminal series resistance is
typically 40Ω.
PIN NAMES
Up/Down (U/D)
The U/D input controls the direction of the wiper
movement and whether the counter is incremented or
decremented.
Increment (INC)
The INC input is negative-edge triggered. Toggling INC
will move the wiper and either increment or decrement
the counter in the direction indicated by the logic level on
the U/D input.
Symbol
Description
VH
VW
VL
VSS
VCC
U/D
INC
CS
NC
High Terminal
Wiper Terminal
Low Terminal
Ground
Supply Voltage
Up/Down Input
Increment Input
Chip Select Input
No Connect
3863 PGM T01
Chip Select (CS)
The device is selected when the CS input is LOW. The
current counter value is stored in nonvolatile memory
when CS is returned HIGH while the INC input is also
HIGH. After the store operation is complete the X9C102/
103/104/503 will be placed in the low power standby
mode until the device is selected once again.
2
X9C102/103/104/503
DEVICE OPERATION
OPERATION NOTES
There are three sections of the X9C102/103/104/503:
the input control, counter and decode section; the nonvolatile memory; and the resistor array. The input control
section operates just like an up/down counter. The
output of this counter is decoded to turn on a single
electronic switch connecting a point on the resistor array
to the wiper output. Under the proper conditions the
contents of the counter can be stored in nonvolatile
memory and retained for future use. The resistor array
is comprised of 99 individual resistors connected in
series. At either end of the array and between each
resistor is an electronic switch that transfers the
potential at that point to the wiper.
The system may select the X9C102/103/104/503, move
the wiper, and deselect the device without having to
store the latest wiper, position in nonvolatile memory.
The wiper movement is performed as described above;
once the new position is reached, the system would the
keep INC LOW while taking CS HIGH. The new wiper
position would be maintained until changed by the
system or until a power-down/up cycle recalled the
previously stored data.
This would allow the system to always power-up to a
preset value stored in nonvolatile memory; then during
system operation minor adjustments could be made.
The adjustments might be based on user preference:
system parameter changes due to temperature drift,
etc...
The INC, U/D and CS inputs control the movement of the
wiper along the resistor array. With CS set LOW the
X9C102/103/104/503 is selected and enabled to
respond to the U/D and INC inputs. HIGH to LOW
transitions on INC will increment or decrement
(depending on the state of the U/D input) a seven-bit
counter. The output of this counter is decoded to
select one of one-hundred wiper positions along the
resistive array.
The state of U/D may be changed while CS remains
LOW. This allows the host system to enable the
X9C102/103/104/503 and then move the wiper up and
down until the proper trim is attained.
TIW/RTOTAL
The electronic switches on the X9C102/103/104/503
operate in a “make before break” mode when the wiper
changes tap positions. If the wiper is moved several
positions, multiple taps are connected to the wiper for
tIW (INC to VW change). The RTOTAL value for the device
can temporarily be reduced by a significant amount
if the wiper is moved several positions.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the
last position. That is, the counter does not wrap around
when clocked to either extreme.
The value of the counter is stored in nonvolatile memory
whenever CS transistions HIGH while the INC input is
also HIGH.
RTOTAL with VCC Removed
The end to end resistance of the array will fluctuate once
VCC is removed.
When the X9C102/103/104/503 is powered-down, the
last counter position stored will be maintained in the
nonvolatile memory. When power is restored, the contents of the memory are recalled and the counter is reset
to the value last stored.
SYMBOL TABLE
WAVEFORM
3
INPUTS
OUTPUTS
Must be
steady
Will be
steady
May change
from LOW
to HIGH
Will change
from LOW
to HIGH
May change
from HIGH
to LOW
Will change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
N/A
Changing:
State Not
Known
Center Line
is High
Impedance
X9C102/103/104/503
ABSOLUTE MAXIMUM RATINGS*
Temperature under Bias .................. –65°C to +135°C
Storage Temperature ....................... –65°C to +150°C
Voltage on CS, INC, U/D and VCC
with Respect to VSS ............................... –1V to +7V
Voltage on VH and VL
Referenced to VSS ................................. –8V to +8V
∆V = |VH–VL|
X9C102 ............................................................. 4V
X9C103, X9C503, and X9C104 ...................... 10V
Lead Temperature (Soldering, 10 seconds).... +300°C
Wiper Current ..................................................... ±1mA
*COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and the functional operation
of the device at these or any other conditions above
those listed in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device
reliability.
ANALOG CHARACTERISTICS
Electrical Characteristics
Temperature Coefficient
End-to-End Resistance Tolerance ..................... ±20%
Power Rating at 25°C
X9C102 ....................................................... 16mW
X9C103, X9C503, and X9C104 .................. 10mW
Wiper Current ............................................ ±1mA Max.
Typical Wiper Resistance ......................... 40Ω at 1mA
Typical Noise .......................... < –120dB/ Hz Ref: 1V
(–40°C to +85°C)
X9C102 ...................................... +600 ppm/°C Typical
X9C103, X9C503, X9C104 ........ +300 ppm/°C Typical
Ratiometric Temperature Coefficient ............ ±20 ppm
Wiper Adjustability
Unlimited Wiper Adjustment (Non-Store operation)
Wiper Position Store Operations ................... 10,000
Data Changes
Resolution
Resistance ............................................................. 1%
Physical Characteristics
Linearity
Absolute Linearity(1) ........................................ ±1.0 Ml(2)
Relative Linearity(3) ..................................... ±0.2 Ml(2)
Marking Includes
Manufacturer‘s Trademark
Resistance Value or Code
Date Code
Test Circuit #1
Test Circuit #2
VH
VH
TEST POINT
TEST POINT
VW
VW
VL
VL
FORCE
CURRENT
3863 FHD F04
3863 FHD F05
Notes: (1) Absolute Linearity is utilized to determine actual wiper voltage versus expected voltage
= (Vw(n)(actual) – Vw(n)(expected)) = ±1 Ml Maximum.
(2) 1 Ml = Minimum Increment = RTOT/99.
(3) Relative Linearity is a measure of the error in step size between taps = VW(n+1) – [Vw(n) + Ml] = +0.2 Ml.
4
X9C102/103/104/503
RECOMMENDED OPERATING CONDITIONS
Temperature
Min.
Max.
Supply Voltage
Limits
Commercial
Industrial
Military
0°C
–40°C
–55°C
+70°C
+85°C
+125°C
X9C102/103/104/503
5V ±10%
3863 PGM T04.2
3863 PGM T03.1
D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.)
Limits
Symbol
Parameter
ICC
VCC Active Current
ISB
Standby Supply Current
ILI
CS, INC, U/D Input
Leakage Current
CS, INC, U/D Input
HIGH Voltage
CS, INC, U/D Input
LOW Voltage
Wiper Resistence
VH Terminal Voltage
VL Terminal Voltage
CS, INC, U/D Input
Capacitance
VIH
VIL
RW
VH
VL
CIN(5)
Typ.(4)
Max.
Units
1
3
mA
200
500
µA
±10
µA
2
VCC + 1
V
–1
0.8
V
100
+5
+5
10
Ω
V
V
pF
Min.
40
–5
–5
Test Conditions
CS = VIL, U/D = VIL or VIH and
INC = 0.4V to 2.4V @ max. tCYC
CS = VCC – 0.3V, U/D and INC =
VSS or VCC – 0.3V
VIN = VSS to VCC
Max. Wiper Current ±1mA
VCC = 5V, VIN = VSS,
TA = 25°C, f = 1MHz
3863 PGM T05.3
STANDARD PARTS
Part Number
Maximum Resistance
Wiper Increments
Minimum Resistance
X9C102
X9C103
X9C503
X9C104
1KΩ
10KΩ
50KΩ
100KΩ
10.1Ω
101Ω
505Ω
1010Ω
40Ω
40Ω
40Ω
40Ω
3863 PGM T08.1
Notes: (4) Typical values are for TA = 25°C and nominal supply voltage.
(5) This parameter is periodically sampled and not 100% tested.
5
X9C102/103/104/503
A.C. CONDITIONS OF TEST
MODE SELECTION
Input Pulse Levels
Input Rise and Fall Times
Input Reference Levels
CS
0V to 3V
10ns
1.5V
INC
U/D
Mode
H
X
L
H
L
X
X
X
Wiper Up
Wiper Down
Store Wiper Position
Standby Current
No Store, Return to
Standby
L
L
3863 PGM T05.1
H
3863 PGM T06
A.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified)
Limits
Symbol
Parameter
Min.
tCl
tlD
tDI
tlL
tlH
tlC
tCPH
tIW
tCYC
tR, tF(7)
tPU(7)
tR VCC(7)
CS to INC Setup
INC HIGH to U/D Change
U/D to INC Setup
INC LOW Period
INC HIGH Period
INC Inactive to CS Inactive
CS Deselect Time
INC to Vw Change
INC Cycle Time
INC Input Rise and Fall Time
Power up to Wiper Stable
VCC Power-up Rate
100
100
2.9
1
1
1
20
Typ.(6)
100
Max.
500
4
500
500
50
0.2
Units
ns
ns
µs
µs
µs
µs
ms
µs
µs
µs
µs
mV/µs
3863 PGM T07.3
A.C. Timing
CS
tCYC
tCI
tIL
tIH
tIC
tCPH
90% 90%
10%
INC
tID
tDI
tF
tR
U/D
tIW
VW
MI
(8)
3863 FHD F03
Notes: (6) Typical values are for TA = 25°C and nominal supply voltage.
(7) This parameter is periodically sampled and not 100% tested.
(8) MI in the A.C. timing diagram refers to the minimum incremental change in the VW output due to a change in the wiper position.
6
X9C102/103/104/503
Typical Frequency Response for X9C102
9
TEST CONDITIONS
VCC = 5V
Temp. = 25°C
Wiper @ Tap 50
VH = 0.5VRMS
Normalized (0dB @ 1KHz)
Test Circuit #1
6
NORMALIZED GAIN (dB)
3
0
–3
–6
–9
–12
–15
–18
–21
0.01
0.10
1.00
10.00
100.00 1000.00 10000.00
FREQUENCY IN KHz
3863 FHD F06
Typical Total Harmonic Distortion for X9C102
2.0
TEST CONDITIONS
VCC = 5V
Temp. = 25°C
Wiper @ Tap 50
VH = 2VRMS
Test Circuit #1
1.8
1.6
1.4
THD (%)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.01
0.10
1.00
10.00
100.00 1000.00 10000.00
FREQUENCY IN KHz
3863 FHD F07
7
X9C102/103/104/503
Typical Linearity for X9C102
10
TEST CONDITIONS
VCC = 5V
Temp. = 25°C
Test Circuit #2
8
PERCENTAGE ERROR
6
4
2
KEY:
0
= ABSOLUTE
–2
= RELATIVE
0039–9
–4
–6
–8
–10
0
10
20
30
40
50
60
70
80
90 100
WIPER POSITION
3863 FHD F08
Typical Frequency Response for X9C103
9
TEST CONDITIONS
VCC = 5V
Temp. = 25°C
Wiper @ Tap 50
VH = 0.5VRMS
Normalized (0dB @ 1KHz)
Test Circuit #1
6
NORMALIZED GAIN (dB)
3
0
–3
–6
–9
–12
–15
–18
–21
0.01
0.10
1.00
10.00
100.00 1000.00
FREQUENCY IN KHz
3863 FHD F09
8
X9C102/103/104/503
Typical Total Harmonic Distortion for X9C103
2.0
TEST CONDITIONS
VCC = 5V
Temp. = 25°C
Wiper @ Tap 50
VH = 2VRMS
Test Circuit #1
1.8
1.6
1.4
THD (%)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.01
0.10
1.00
10.00
100.00 1000.00
FREQUENCY IN KHz
3863 FHD F10
Typical Linearity for X9C103
10
TEST CONDITIONS
VCC = 5V
Temp. = 25°C
Test Circuit #2
8
PERCENTAGE ERROR
6
4
2
KEY:
0
= ABSOLUTE
–2
= RELATIVE
0039–9
–4
–6
–8
–10
0
10
20
30
40
50
60
70
80
90 100
WIPER POSITION
3863 FHD F11
9
X9C102/103/104/503
Typical Frequency Response for X9C503
9
TEST CONDITIONS
VCC = 5V
Temp. = 25°C
Wiper @ Tap 50
VH = 0.5VRMS
Normalized (0dB @ 1 KHz)
Test Circuit #1
6
NORMALIZED GAIN (dB)
3
0
-3
-6
-9
-12
-15
-18
-21
0.01
0.10
1.00
10.00
100.00
1000.00
FREQUENCY IN KHz
3863 FHD F12
Typical Total Harmonic Distortion for X9C503
9
TEST CONDITIONS
VCC = 5V
Temp. = 25°C
Wiper @ Tap 50
VH = 2VRMS
Test Circuit #1
1.8
1.6
THD (%)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.01
0.10
1.00
10.00
100.00 1000.00
FREQUENCY IN KHz
3863 FHD F13
10
X9C102/103/104/503
Typical Linearity for X9C503
10
TEST CONDITIONS
VCC = 5V
Temp. = 25°C
Test Circuit #2
8
PERCENTAGE ERROR
6
4
2
KEY:
0
= ABSOLUTE
-2
= RELATIVE
0039–9
-4
-6
-8
-10
0
10
20
30
40
50
60
70
80
90 100
WIPER POSITION
3863 FHD F14
Typical Frequency Response for X9C104
9
TEST CONDITIONS
VCC = 5V
Temp. = 25°C
Wiper @ Tap 50
VH = 0.5VRMS
Normalized (0dB @ 1 KHz)
Test Circuit #1
6
NORMALIZED GAIN (dB)
3
0
-3
-6
-9
-12
-15
-18
-21
0.01
0.10
1.00
10.00
100.00
1000.00
FREQUENCY IN KHz
3863 FHD F15
11
X9C102/103/104/503
Typical Total Harmonic Distortion for X9C104
2.0
TEST CONDITIONS
VCC = 5V
Temp. = 25°C
Wiper @ Tap 50
VH = 2VRMS
Test Circuit #1
1.8
1.6
THD (%)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.01
0.10
1.00
10.00
100.00 1000.00 10000.00
FREQUENCY IN KHz
3863 FHD F16
Typical Linearity for X9C104
10
TEST CONDITIONS
VCC = 5V
Temp. = 25°C
Test Circuit #2
8
PERCENTAGE ERROR
6
4
2
KEY:
0
= ABSOLUTE
= RELATIVE
-2
0039–9
-4
-6
-8
-10
0
10
20
30
40
50
60
70
80
90 100
WIPER POSITION
3863 FHD F17
12
X9C102/103/104/503
PACKAGING INFORMATION
8-LEAD PLASTIC DUAL IN-LINE PACKAGE TYPE P
0.430 (10.92)
0.360 (9.14)
0.092 (2.34)
DIA. NOM.
0.255 (6.47)
0.245 (6.22)
PIN 1 INDEX
PIN 1
0.300
(7.62) REF.
HALF SHOULDER WIDTH ON
ALL END PINS OPTIONAL
0.140 (3.56)
0.130 (3.30)
SEATING
PLANE
0.020 (0.51)
0.015 (0.38)
0.062 (1.57)
0.058 (1.47)
0.150 (3.81)
0.125 (3.18)
0.020 (0.51)
0.016 (0.41)
0.110 (2.79)
0.090 (2.29)
0.015 (0.38)
MAX.
0.060 (1.52)
0.020 (0.51)
0.325 (8.25)
0.300 (7.62)
0°
15°
TYP. 0.010 (0.25)
NOTE:
ALLALL
DIMENSIONS
IN INCHES
(IN PARENTHESES
IN MILLIMETERS)
NOTE:
DIMENSIONS
IN INCHES
(IN PARENTHESES
IN MILLIMETERS)
3926 FHD F01
13
X9C102/103/104/503
PACKAGING INFORMATION
8-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S
0.150 (3.80)
0.158 (4.00)
0.228 (5.80)
0.244 (6.20)
PIN 1 INDEX
PIN 1
0.014 (0.35)
0.019 (0.49)
0.188 (4.78)
0.197 (5.00)
(4X) 7°
0.053 (1.35)
0.069 (1.75)
0.004 (0.19)
0.010 (0.25)
0.050 (1.27)
0.010 (0.25)
X 45°
0.020 (0.50)
0° – 8°
0.0075 (0.19)
0.010 (0.25)
0.027 (0.683)
0.037 (0.937)
NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESIS IN MILLIMETERS)
3926 FHD F22
14
X9C102/103/104/503
ORDERING INFORMATION
X9CXXX
X
X
Temperature Range
Blank = Commercial = 0°C to +70°C
I = Industrial = –40°C to +85°C
M = Military = –55°C to +125°C
Package
P = 8-Lead Plastic DIP
S = 8-Lead SOIC
End to End Resistance
102 = 1KΩ
103 = 10KΩ
503 = 50KΩ
104 = 100KΩ
LIMITED WARRANTY
Devices sold by Xicor, Inc. are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Xicor, Inc. makes no warranty,
express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement.
Xicor, Inc. makes no warranty of merchantability or fitness for any purpose. Xicor, Inc. reserves the right to discontinue production and change specifications and
prices at any time and without notice.
Xicor, Inc. assumes no responsibility for the use of any circuitry other than circuitry embodied in a Xicor, Inc. product. No other circuits, patents, licenses are
implied.
U.S. PATENTS
Xicor products are covered by one or more of the following U.S. Patents: 4,263,664; 4,274,012; 4,300,212; 4,314,265; 4,326,134; 4,393,481; 4,404,475;
4,450,402; 4,486,769; 4,488,060; 4,520,461; 4,533,846; 4,599,706; 4,617,652; 4,668,932; 4,752,912; 4,829, 482; 4,874, 967; 4,883, 976. Foreign patents and
additional patents pending.
LIFE RELATED POLICY
In situations where semiconductor component failure may endanger life, system designers using this product should design the system with appropriate error
detection and correction, redundancy and back-up features to prevent such an occurence.
Xicor's products are not authorized for use in critical components in life support devices or systems.
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant
injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or effectiveness.
15