TS5N412 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BANDWIDTH BUS SWITCH www.ti.com SCDS207 – AUGUST 2005 FEATURES APPLICATIONS • • • • • • • • • • • • • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 3 Ω Typ) 0- to 10-V Switching on Data I/O Ports Bidirectional Data Flow With Near-Zero Propagation Delay Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 20 pF Max, B Port) VCC Operating Range From 4.75 V to 5.25 V Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) Supports Both Digital and Analog Applications PCI Interface Differential Signal Interface Memory Interleaving Bus Isolation Low-Distortion Signal Gating DBQ OR PW PACKAGE (TOP VIEW) S 1B1 1B2 1A 2B1 2B2 2A GND 1 16 2 15 3 14 4 13 5 12 6 7 11 10 8 9 VCC OE 4B1 4B2 4A 3B1 3B2 3A DESCRIPTION/ORDERING INFORMATION The TS5N412 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the TS5N412 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems. The TS5N412 is a 4-bit 1-of-2 multiplexer/demultiplexer with a single output-enable (OE) input. The select (S) inputs control the data path of the multiplexer/demultiplexer. When OE is low, the multiplexer/demultiplexer is enabled and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the multiplexer/demultiplexer is disabled and a high-impedance state exists between the A and B ports. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION PACKAGE (1) TA –40°C to 85°C (1) ORDERABLE PART NUMBER SSOP (QSOP) – DBQ Tape and reel TS5N412DBQR TSSOP – PW Tape and reel TS5N412PWR TOP-SIDE MARKING YB412 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005, Texas Instruments Incorporated TS5N412 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BANDWIDTH BUS SWITCH www.ti.com SCDS207 – AUGUST 2005 FUNCTION TABLE INPUTS S INPUT/OUTPUT A FUNCTION L L B1 A port = B1 port L H B2 A port = B2 port H X Z Disconnect OE LOGIC DIAGRAM (POSITIVE LOGIC) 4 1A 2 1B1 SW 3 1B2 SW 7 2A 5 2B1 SW 6 2B2 SW 3A 9 11 SW 3B1 10 SW 12 4A 3B2 14 4B1 SW 13 SW 1 S 15 OE 2 4B2 TS5N412 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BANDWIDTH BUS SWITCH www.ti.com SCDS207 – AUGUST 2005 SIMPLIFIED SCHEMATIC, EACH FET SWITCH (SW) A B VCC Charge Pump EN(1) (1) EN is the internal enable signal applied to the switch. Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 7 V VIN Control input voltage range (2) (3) –0.5 7 V VI/O Switch I/O voltage range (2) (3) (4) –0.5 II/O ON-state switch current (5) ±100 mA Continuous current through VCC or GND ±100 mA θJA Package thermal impedance (6) Tstg Storage temperature range (1) (2) (3) (4) (5) (6) 11 DBQ package 90 PW package 108 –65 UNIT V °C/W 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to ground, unless otherwise specified. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. VI and VO are used to denote specific conditions for VI/O. II and IO are used to denote specific conditions for II/O. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions (1) MIN MAX UNIT 4.75 5.25 V High-level control input voltage 2 5.25 V VIL Low-level control input voltage 0 0.8 V VI/O Data input/output voltage 0 10 V TA Operating free-air temperature –40 85 °C VCC Supply voltage VIH (1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 3 TS5N412 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BANDWIDTH BUS SWITCH www.ti.com SCDS207 – AUGUST 2005 Electrical Characteristics (1) over recommended operating free-air temperature range, (unless otherwise noted) PARAMETER IIN MIN TYP (2) TEST CONDITIONS Control inputs MAX UNIT µA VCC = 5.25 V, VIN = 0 to VCC VCC = 5.25 V, VO = 0 to 10 V, VI = 0, Switch OFF, VIN = VCC or GND 10 VCC = 0 V, VO = Open, VI = 0 to 10 V 10 VCC = 5.25 V, II/O = 0, Switch ON or OFF, VIN = VCC or GND 10 mA VCC = 5 V, VIN = 10 V or 0 10 pF A port VCC = 5 V, Switch OFF, VIN = VCC or GND, VI/O = 10 V or 0 35 B port VCC = 5 V, Switch OFF, VIN = VCC or GND, VI/O = 10 V or 0 20 Cio(ON) VCC = 5 V, Switch ON, VIN = VCC or GND, VI/O = 10 V or 0 80 VCC = 4.75 V, TYP at VCC = 5 V VI = 0, IO = 50 mA ron (4) VI = 8 V, IO = –50 mA 7.5 VI = 10 V, IO = –50 mA 12.5 IOZ (3) ICC Cin Control inputs Cio(OFF) (1) (2) (3) (4) 10 µA pF 3 pF 7.5 Ω VIN and IIN refer to control inputs. VI, VO, II, and IO refer to data pins All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C. For I/O ports, the parameter IOZ includes the I/O leakage current. Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is determined by the lower of the voltages of the two (A or B) terminals. Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3) FROM (INPUT) TO (OUTPUT) tpd (1) A or B B or A tpd(s) S S OE PARAMETER ten tdis (1) VCC = 5 V ± 0.25 V MIN UNIT MAX 3 ns A 200 ns B 200 A or B 200 S B 200 OE A or B 200 ns ns The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). Dynamic Characteristics over recommended operating free-air temperature range, VCC = 5 V ± 5% (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT RL = 50 Ω, VI = 0.632 V (P-P), See Figure 4 OFF isolation (OISO) RL = 50 Ω, VI = 0.632 V (P-P), f = 25 MHz, See Figure 5 –50 dB Crosstalk (XTALK) RL = 50 Ω, VI = 0.632 V (P-P), f = 25 MHz, See Figure 6 and Figure 7 –50 dB Bandwidth (1) (2) 4 (BW) (2) 25 All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C. Bandwidth is the frequency at which the gain is –3 dB below the DC gain. MHz TS5N412 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BANDWIDTH BUS SWITCH www.ti.com SCDS207 – AUGUST 2005 TYPICAL PERFORMANCE ron − ON-State Resistance − Ω 6 TA = 25°C 5 4 3 2 1 0 0 1 2 3 4 5 6 7 8 9 10 VI − V Figure 1. Typical ron vs VI, VCC = 5 V and IO = –50 mA 0 0 Gain −10 Gain − dB Phase −2 −20 −3 −30 −4 −40 −5 −50 −6 0.1 Phase Margin − Deg −1 −60 1 10 f − Frequency − MHz 100 500 Figure 2. Frequency Response vs Bandwidth 5 TS5N412 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BANDWIDTH BUS SWITCH www.ti.com SCDS207 – AUGUST 2005 TYPICAL PERFORMANCE 140 0 120 Phase 100 80 Gain − dB −40 60 −60 40 Gain 20 −80 0 Phase Margin − Deg −20 −20 −100 −40 −120 0.1 −60 1 10 f − Frequency − MHz 100 500 Figure 3. Frequency Response vs OFF Isolation 160 0 140 120 Phase Gain − dB −40 100 −60 80 Gain 60 −80 40 −100 20 −120 0.1 0 1 10 f − Frequency − MHz 100 Figure 4. Frequency Response vs Crosstalk 6 500 Phase Margin − Deg −20 TS5N412 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BANDWIDTH BUS SWITCH www.ti.com SCDS207 – AUGUST 2005 PARAMETER MEASUREMENT INFORMATION VCC Input Generator VIN 50 Ω 50 Ω VG1 TEST CIRCUIT DUT 2 VCC Input Generator VI 50 Ω 50 Ω CL (see Note A) RL TEST VCC S1 RL VI CL tpd(s)† 5 V ± 0.25 V Open 100 Ω VCC 35 pF tPLZ/tPZL 5 V ± 0.25 V 2 VCC 100 Ω GND 35 pF 0.3 V tPHZ/tPZH 5 V ± 0.25 V GND 100 Ω VCC 35 pF 0.3 V V∆ tpds is measured with Demux inputs at opposite voltage levels, i.e. VB1 = 5 V, VB2 = GND. VCC Output Control (VIN) VCC/2 VCC VCC/2 VCC/2 0V tPLH VOH Output VCC/2 VCC/2 VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (tpd(s)) Output Waveform 1 S1 at 2 × VCC (see Note B) tPLZ VOH VCC/2 VOL + V∆ VOL tPZH tPHL VCC/2 0V tPZL Output Control (VIN) Open GND VG2 † S1 RL VO Output Waveform 2 S1 at GND (see Note B) tPHZ VOH VCC/2 VOH − V∆ 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 25 ns, tf < 25 ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd(s). The tpd propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). H. All parameters and waveforms are not applicable to all devices. Figure 5. Test Circuit and Voltage Waveforms 7 TS5N412 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BANDWIDTH BUS SWITCH www.ti.com SCDS207 – AUGUST 2005 PARAMETER MEASUREMENT INFORMATION VCC Network Analyzer 50 B1 Channel ON: B1 to A A Source Signal Network Analyzer Setup B2 Source Power = 0 dBM (632-mV P-P at 50- load) GND DC Bias = 350 mV 50 Figure 6. Bandwidth (BW) VCC Network Analyzer 50 B1 Channel OFF: B2 to A A Source Signal 50 Network Analyzer Setup B2 Source Power = 0 dBM (632-mV P-P at 50- load) GND 50 DC Bias = 350 mV Figure 7. OFF Isolation (OISO) VCC Network Analyzer 50 B1 Channel ON: B1 to A A Source Signal Channel OFF: B2 to A B2 Network Analyzer Setup 50 50 GND Source Power = 0 dBM (632-mV P-P at 50- load) DC Bias = 350 mV Figure 8. Crosstalk (XTALK) 8 TS5N412 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BANDWIDTH BUS SWITCH www.ti.com SCDS207 – AUGUST 2005 PARAMETER MEASUREMENT INFORMATION (continued) V+ Network Analyzer 50 Channel ON: 1B1 to 1A, 2B1 to 2A 1B1 1A Source Signal Network Analyzer Setup 2B1 50 2A 50 Source Power = 0 dBM (632 mV P-P at 50 load) DC Bias = 350 mV GND Figure 9. Adjacent Channel Crosstalk (XTALK) 9 TS5N412 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BANDWIDTH BUS SWITCH www.ti.com SCDS207 – AUGUST 2005 MECHANICAL DATA DBQ (R-PDSO-G**) 0.012 (0,30) 0.008 (0,20) 0.025 (0,64) 24 0.005 (0,13) 13 0.157 (3,99) 0.150 (3,81) 0.244 (6,20) 0.228 (5,80) 0.008 (0,20) NOM Gauge Plane 1 12 A 0.010 (0,25) 0°−8° 0.035 (0,89) 0.016 (0,40) 0.069 (1,75) MAX Seating Plane 0.010 (0,25) 0.004 (0,10) 0.004 (0,10) PINS ** 16 20 24 28 A MAX 0.197 (5,00) 0.344 (8,74) 0.344 (8,74) 0.394 (10,01) A MIN 0.189 (4,80) 0.337 (8,56) 0.337 (8,56) 0.386 (9,80) M0−137 VARIATION AB AD AE AF DIM D 4073301/F 02/2002 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). D. Falls within JEDEC MO−137. 10 TS5N412 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BANDWIDTH BUS SWITCH www.ti.com SCDS207 – AUGUST 2005 MECHANICAL DATA PW (R-PDSO-G**) 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°− 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 11 PACKAGE OPTION ADDENDUM www.ti.com 23-Sep-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TS5N412DBQR ACTIVE SSOP/ QSOP DBQ 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR TS5N412DBQRE4 ACTIVE SSOP/ QSOP DBQ 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR TS5N412PW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS5N412PWE4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS5N412PWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TS5N412PWRE4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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Addendum-Page 1 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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