[AK4203] AK4203 Stereo Cap-less LINE-Amp and Video-Amp GENERAL DESCRIPTION The AK4203 is an audio stereo cap-less line driver with 1-channel video driver. It eliminates the need for large DC-blocking capacitors with a built-in Charge-pump circuit. The AK4203 achieves 2Vrms outputs with excellent linearity 2Vrms output by single 3.3V power supply. The AK4203 is available in small 16-pin TSSOP, saving the system space and cost. FEATURE Audio Line-Amp Differential Input Stereo Cap-less Amplifier (No DC-blocking capacitors required) Line-Out level: 2.0Vrms THD+N: -90dB S/N: 102dB Output gain: 6dB Low-pass Filter: fc= 130kHz Pop Noise Free Ground-referenced Output Video Amp 1ch Stereo Cap-less Amplifier (No DC-blocking capacitors required) Integrated Video Amplifier (+6dB) Input Level: 1.5Vpp (max) SN: 75dB(typ), Bandwidth: 100kHz ∼ 6MHz LPF: -0.5dB@ 6.75MHz (typ), -43dB@27MHz (typ) Video Mute Function Power Supply: 3.0V ~ 3.6V Ta: −20 ∼ 85°C Package: 16TSSOP MS1376-E-00 2012/02 -1- [AK4203] ■ Block Diagram + LIN+ LOUT LIN- - Charge Pump + RIN+ VDD1 VDD2 VSS1 CVEE CP CN VSS2 ROUT RIN- VMUTE VIN Clamp LPF + VOUT Figure 1. AK4203 Block Diagram MS1376-E-00 2012/02 -2- [AK4203] ■ Ordering Guide −20 ∼ +85°C 16pin TSSOP (0.65mm pitch) Evaluation board for AK4203 AK4203ET AKD4203 ■ Pin Layout VIN 1 16 VDD2 VPDN 2 15 VSS2 CN 3 14 VOUT CP 4 13 VEE LINN 5 12 VSS1 LINP 6 11 VDD1 RINP 7 10 LOUT RINN 8 9 ROUT AK4203 Top View MS1376-E-00 2012/02 -3- [AK4203] PIN/FUNCTION No. Pin Name I/O 1 2 3 4 5 6 7 8 9 10 VIN VPDN CN CP LINN LINP RINP RINN I I I O I I I I ROUT LOUT O O 11 VDD1 - 12 VSS1 - 13 VEE O 14 15 VOUT VSS2 O - 16 VDD2 - Function Video Signal Input pin Video Mute pin Negative Charge Pump Capacitor Terminal pin Positive Charge Pump Capacitor Terminal pin Lch Audio Negative Input pin Lch Audio Positive Input pin Rch Audio Positive Input pin Rch Audio Negative Input pin Audio Output pin (R channel) Audio Output pin (L channel) Power Supply 1 pin, 3.0V∼3.6V Connect to VSS1 with a 0.1μF ceramic capacitor in parallel with a 10μF 3.3V electrolytic capacitor. Ground 1 pin Negative Voltage Output pin Connect to VSS1 with a 10μF 3.3V electrolytic capacitor. Video Signal Output pin Ground 2 pin Power Supply 2 pin, 3.0V∼3.6V Connect to VSS2 with a 0.1μF ceramic capacitor in parallel with a 10μF 3.3V electrolytic capacitor. ■ Handling of Unused Pin The unused I/O pins must be processed appropriately as below. Classification Digital Input Audio Input Audio, Video Output Pin Name VPDN LINP/N, RINP/N AOUT, VOUT Setting VSS1 VSS1 Open MS1376-E-00 2012/02 -4- [AK4203] ABSOLUTE MAXIMUM RATINGS (VSS1=VSS2 =0V (Note 1)) Parameter Power Supply Symbol VDD1 VDD2 IIN VINA VINV Ta Tstg min max Unit -0.3 4.0 V Input Current (any pins except for supplies) ±10 Audio Input Voltage (Note 4) VEE -0.3 VDD1 +0.3 Video Input Voltage -0.3 VDD2 +0.3 Ambient Operating Temperature -20 85 Storage Temperature -65 150 Note 1. All voltages are respect to ground. Note 2. VSS1 and VSS2 must be connected to the same analog plane. Note 3. VDD1 and VDD2 must be the same voltage. Note 4. VEE: The VEE pin voltage VEE is generated by the internal charge pump circuit. VEE voltage is “-VDD1 +0.2V” (typ). mA V V °C °C WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. RECOMMEND OPERATING CONDITIONS (VSS1=VSS2 =0V) Parameter Power Supply Symbol VDD1 VDD2 Note 3. VDD1 and VDD2 must be the same voltage. min 3.0 3.0 typ 3.3 3.3 max 3.6 3.6 Unit V V typ max Unit 18 30 mA Note: AKM assumes no responsibility for the usage beyond the conditions in this datasheet. ELECTICAL CHARACTERISTICS (Ta=25°C; VDD1= VDD2 = 3.3V; VSS1= VSS2 = 0V) Power Supplies Parameter min Power Supply (VDD1+VDD2) Normal Operation (Note 5) Note 5. No input and no load. MS1376-E-00 2012/02 -5- [AK4203] ANALOG CHARACTERISTICS (Audio) (Ta=25°C; VDD1=VDD2= 3.3V; VSS1=VSS2=0V; Input Signal Frequency =1kHz; Measurement band width=10Hz ∼ 20kHz; RL =5kΩ, unless otherwise specified) Parameter min typ max Unit Output Level (Note 6) 2 Vrms Gain 6 dB THD+N (at 2Vrms output, VDD1≥3.135V) 90 dB Dynamic Range (-60dBFS with A-weighted) 102 dB S/N (A-weighted) 102 dB Inter channel Isolation 100 dB Output Offset Voltage ±0 ±5 mV LPF Frequency Response -3dB 130 kHz Note 6. VDD1≥3.135V, THD+N=-90dB. ANALOG CHARACTERISTICS (Video) (Ta=25°C; VDD1=VDD2= 3.3V; VSS1=VSS2=0V; unless otherwise specified, Note 7, Note 8) Parameter Conditions min typ max Unit Input Signal 1.5 Vpp Output Gain Input=0.2Vp-p, 100kHz 6 dB Output Signal f=100kHz, THD=-30dB. 2.52 Vpp Frequency Response Response at 6.75MHz -0.5 dB Input=0.2Vpp, Sin Wave Response at 27MHz -43 dB (0dB at 100kHz) Group Delay Distortion |GD3MHz–GD6MHz| 10 nsec S/N (*) BW= 100kHz to 6MHz. 81 dB Load Resistance R1+R2 (Note 9) 140 150 160 Ω 400 pF Load Capacitance C1 (Note 9) 15 pF C2 (Note 9) Note 7. The analog characteristics are specified at the pin of each output. Note 8. Input Sync Tip Level=-0.43V∼-0.14V(the sync chip level based on the pedestal level) Horizontal Line Sync Pulse=4.0μs ∼5.4μs, Equalizing Pulse=2.0μs ∼2.7μs, Serration Pulse=4.0μs ∼5.4μs Note 9. Refer to the Figure 2. *CCIR 567 weighting. R1 75 Ω VOUT R2 C1 C2 max: 15pF (C2) 75 Ω max: 400pF (C1) Figure 2. Load Resistance R1+R2 and Load Capacitance C1/C2. MS1376-E-00 2012/02 -6- [AK4203] OPERATION OVERVIEW ■ Charge Pump Circuit Internal negative power supply circuit (Figure 3) supplies the negative voltage to the video amp and the video amp 0V output is used for a pedestal level in Figure 4 and Figure 5. Therefore, the output coupling capacitor can be removed. AK4203 VDD2 Charge Pump CP CN Negative Power VSS1 (+) 1uF C2 (+) C1 VEE 10uF Figure 3. Charge Pump Circuit Note 10. C1 and C2 should be low ESR (Equivalent Series Resistance) capacitors. When those capacitors have the polarity, each positive polarity pins should be connected to CP and VSS1 side. AK4203 2 Vrms 0V AOUTR (AOUTL) Figure 4. Audio Signal Output AK4203 75Ω VOUT 75Ω 0V Figure 5. Video Signal Output MS1376-E-00 2012/02 -7- [AK4203] ■ Audio Circuit Power-Up Sequence When power supply pins of the AK4203 are fed, the audio circuit and charge pump are powered-up automatically as shown below. Power Supply VDD1, VDD2 3.0V Audio Analog Circuit Charge Pump VEE Power up (1) Power up VEE=Negative voltage Power down VEE=0V -1.85V Audio Timer Circuit (2) time A LINP, N RINP, N LOUT ROUT Figure 6.System Reset Diagram Note: (1) When VDD1 and VDD2 are powered-up, audio analog output is connected to VSS internally via a mute switch. The charge pump is powered-up in slow start mode and VEE reaches -1.85V in 0.4ms. Do not apply a negative voltage to LINP/N and RINP/N pins until the charge pump output is stabilized. (2) When the VEE reaches -1.85V, the audio timer circuit starts counting the “timeA” period (max. 15ms). (3) After the “timeA” period, the mute switch is released and the audio output is enabled. (4) No audible click noise occurs under normal conditions. MS1376-E-00 2012/02 -8- [AK4203] ■ Video Circuit Power-Up Sequence The video circuit of the AK4203 is powered-up when the VPDN pin becomes “H”. Power Supply VDD1, VDD2 3.0V VPDN Charge Pump VEE Video Circuit Power down VEE=0V Power up VEE=Negative voltage Power up Power down Video Timer Circuit (1) time B VIN VOUT Video Input Signal (2) VSS2=0V Video Output Signal VSS2=0V Figure 7. System Reset Diagram Note: (1) When the VPDN pin goes to “H”, the video timer circuit starts counting “time B” period (max. 100ms). (2) After the “time B” period, the video output becomes enabled exiting 0V state. MS1376-E-00 2012/02 -9- [AK4203] SYSTEM DESIGN Figure 8 shows the system connection diagram for the AK4203. An evaluation board [AKD4203] demonstrates the optimum layout, power supply arrangements and measurement results. Analog 3.3V 0.1u Video In 75 μP Audio In L Audio In L Audio In R Audio In R 1u (1) 1u 1u 1u 1u + VIN VDD2 16 2 VPDN VSS2 15 3 CN VOUT 14 4 CP VEE 13 5 LINN 6 LINP VDD1 11 7 RINP AOUTL 10 8 RINN AOUTR 9 1 AK4203 VSS1 12 0.1μ + 10μ 75 Video Out + 10μF 0.1μ + 10μ 220 220 Lch Out Rch Out Figure 8. Typical Connection Diagram MS1376-E-00 2012/02 - 10 - [AK4203] 1. Grounding and Power Supply Decoupling The AK4203 requires careful attention to power supply and grounding arrangements. VDD1 and VDD2 are usually supplied from the analog supply in the system. If VDD1 and VDD2 are supplied separately, they must be powered-up at the same time. VSS1 and VSS2 pins must be connected to the analog ground plane. System analog ground and digital ground should be wired separately and connected together as close as possible to where the supplies are brought onto the printed circuit board. Decoupling capacitors for high frequency should be placed as near as possible to the supply pin. 2. Notes for Drawing a Board Analog input and output pins should be as near as possible in order to avoid unwanted coupling into the AK4203. Unused pins should be open. 3. Analog Input 3-1. Audio Signal Input The audio signal inputs are differential input. The output signal of LINP/RINP has the same phase. Connect a capacitor about 1uF to each input pin for AC coupling. 3-2. Video Signal Input Tip Sync level is fixed by an internal clamp circuit. Connect a capacitor about 0.1uF to the VIN pin for AC coupling. 4. Analog Output 4-1. Audio Signal Output The audio signal outputs are single-ended output. The output rages to 2.0Vrms (typ) centered VSS (0V, typ) via LPF. The DC offset is less than ±5mV. 4-2. Video Signal Output The integrated 1-channel video amplifier has drivability for a load resistance of 150Ω. The output gain is +6dB (typ) via LPF. DC offset is less than ±100mV. MS1376-E-00 2012/02 - 11 - [AK4203] PACKAGE *5.0±0.1 0.17±0.05 9 1 8 0.13 M 0.22±0.1 6.4±0.2 *4.4±0.1 16 0.5±0.2 16pin TSSOP (Unit: mm) 0.65 0 ∼ 10° 1.1 MAX 0.10 S 0.1±0.1 S NOTE: Dimension "*" does not include mold flash. ■ Package & Lead Frame Material Package molding compound: Epoxy Resign, Halogen (Br, Cl) Free Lead frame material: Cu Alloy Lead frame surface treatment: Solder (Pb free) Plate MS1376-E-00 2012/02 - 12 - [AK4203] MARKING 4203ET XXXYY 1) 2) 3) Pin #1 indication Date Code: XXXYY (5 digits) XXX: Date Code YY: Lot# Marketing Code: 4203ET REVISION HISTORY Date (YY/MM/DD) 12/02/16 Revision 00 Reason First Edition Page MS1376-E-00 Contents 2012/02 - 13 - [AK4203] IMPORTANT NOTICE z These products and their specifications are subject to change without notice. When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei Microdevices Corporation (AKM) or authorized distributors as to current status of the products. z Descriptions of external circuits, application circuits, software and other related information contained in this document are provided only to illustrate the operation and application examples of the semiconductor products. You are fully responsible for the incorporation of these external circuits, application circuits, software and other related information in the design of your equipments. AKM assumes no responsibility for any losses incurred by you or third parties arising from the use of these information herein. AKM assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of such information contained herein. z Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. z AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or other hazard related device or systemNote2), and AKM assumes no responsibility for such use, except for the use approved with the express written consent by Representative Director of AKM. As used here: Note1) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. z It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification. MS1376-E-00 2012/02 - 14 -