Advanced ADPCM SOUND DSP for Mobile QS6400 1. General Description . QS6400 is a high quality sound DSP for mobile phones that plays music through a built-in ADPCM decoder with sound font rom. QS6400 is equipped with HWASS's QPCM synthesizer,which is capable of generating up to 64 voices with different tones. QS6400 can also play two channels of wavefiles of differing sampling rates. Since data in the FIFO buffer is processed on demand, the length of the data(MIDI & WAVE) is not limited, making QS6400 an excellent platform for applications such as incoming melody distribution service. The MIDI handler built in to QS6400 can play MIDI data without an extra buffer. Included is a PWM module for audio out with a maximum output of 500mw at 8Ω load registance(PVDD=4.0V). For earphone use, QS6400 provides a single-ended stereophonic output terminal. To operate QS6400 to full capability, "Standard MIDI File(SMF) Format 0" is recommended. 2. Features ADPCM synthesizer functions - 64 voices generated at 39kH simultaneously. - Compatible with stereophonic sound generation. - Master Volume control Individual channel volume / master volume. - Built-in MIDI handler(sequencer) - Equipped with two buffers of 128 bytes FIFO for MIDI play. - Built-in 4 bit or 8 bit ADPCM decorder. TONE - Supports GENERAL MIDI LITE specification. GM 128 voices + 47 voices percussion. Support to control parameters by "BxH xxh"(see the MIDI implementation chart) - Additional 8 voices to play korean traditional music. Gayagum/Daegum/Haegum/Taepyoungso/Buk/Ggwengary/Jang-goo/Jing. - Various sampling rate : 8 ~ 39Khz WAVE - Support to playback ADPCM wavefile(2 Channels) - Separate wave volume control(0~255). Gayagum/Daegum/Haegum/Taepyoungso/Buk/Ggwengary/Jang-goo/Jing. CPU INTERFACING - 14 Wires parallel interfacing QS6400 ADPCM SOUND DSP for For Mobile QS6400 64Advanced Poly ADPCM Sound Synthesizer Mobile Phone AUDIO OUTPUT - PWM or 16bit DAC output can be selected. - PWM output mode : 500mW when PVDD=4.0V, RL=8Ω -Provides Stereo or Mono output for earphone. POWER SUPPLY - Includes three power supplies for sub-system PVDD power supply devoted to PWM block.(3.3 ~ 4.2V) EVDD power supply devoted to earphone block.(2.7 ~ 3.6V) VDD is normal power supply.(2.7 ~ 3.6V) QS6400 3. Block Diagram 3- 1 Outline of Blocks 3- 2 Pin Description ADPCM SOUND DSP for For Mobile QS6400 64Advanced Poly ADPCM Sound Synthesizer Mobile Phone QS6400 ADPCM SOUND DSP for For Mobile QS6400 64Advanced Poly ADPCM Sound Synthesizer Mobile Phone 3- 2 Description of Blocks Explanations about each block of QS6400 and flows of the signal are as follows. 1) Register Block : QS6400 has registers of 32 x 8 for storing control data. Built-in 8052 can communicate directly with the register blocks, which are used to change control values and communicate commands. 23 x 8 registers are used for this purpose. The extra registers are available to support additional features. 2) SMF FIFO buffer : This FIFO is used in receiving SMF file blocks (128bytes) from Host. SMF FIFO Buffer has two banks of memory block and each buffer is filled with data according to REG_IREQ_TYPE (When bit 2 is "1" ) from built- in 8052. When receiving a data request (IRQB) for the next procedure you should read the interrupt request type register (REG_IREQ_TYPE) to check which data is required. 3) WAVE FIFO buffer : This FIFO is used in receiving wave data blocks (64 or 128 bytes) from Host. WAVE FIFO Buffer has four banks of memory block, of 64 bytes each. The buffer size is determined by user specification (using REG_WAVE_CHAN). Each bank is filled with wave data accoding to REG_IREQ_TYPE( when bit 1 or bit 0 is "1") If you intend to play high-sampling-rate(up to 22khz) wave files, we recommend that you use only one wave channel, due to the high transmission rate of data. In this case, WAVE FIFO Buffer size is preset to 128bytes. 4) Power control : This block is in charge of power management. You can select whether to enter or wake-up from power down mode. 5) Clock generator : This block is a clock generator for the internal master clock. QS6400 need the external clock input to operate normally. 6) CPU & ROM : This block describes 8052 micom and 12k bytes program ROM memory. Built-in 8052 interprets SMF and Wave file. 7) PWM Speaker out : This block converts audio data into PWM format. It supports stereophonic audio out. You can also mute this output. 8) Earphone out : This block converts audio data into single-ended earphone signal. You should connect poled-capacitor and bypass capacitor. QS6400 ADPCM SOUND DSP for For Mobile QS6400 64Advanced Poly ADPCM Sound Synthesizer Mobile Phone 9) D/A interface : This block generates 16bit DAC interfacing out for high quality sound. If you have an additonal DAC, you can also use this interfacing out. When you use the DAC OUT mode, earphone is disabled. 10) Sound font : This is an embedded maskrom for GM 128 sound map and 47 percussion. The sound font built in this device stores the sampling data according to GM 128 sound map. Additionally QS6400 has sampling data to support korean traditional music. QS6400 ADPCM SOUND DSP for For Mobile QS6400 64Advanced Poly ADPCM Sound Synthesizer Mobile Phone 4. Pin Rotation and Descriptions 4- 1 Pin Rotation 4-1-1 40P MLF ADPCM SOUND DSP for For Mobile QS6400 64Advanced Poly ADPCM Sound Synthesizer Mobile Phone QS6400 4- 2 Pin Rotation PIN NO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 PIN NO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 PIN NAME NC NC NC VSS VDD SOUT D0 D1 D2 D3 D4 NC NC D5 D6 D7 WAKEB WRB RDB IRQB MIDI CSB A0 NC NC MRSTB MODE0 MODE1 TEST XIN XOUT VDD VSS NC NC NC NC VSS PWML(-) PWMR(-) PVDD PWML(+) PWMR(+) PVSS I/O X X X P P O I/O I/O I/O I/O I/O X X I/O I/O I/O I I I O I I I X X I I/O I/O I I I P P X X X X P O O I O O I DESCRIPTION No Connect No Connect No Connect Ground Power Supply Serial Data Out for DAC Bidirection DATA BUS Bidirection DATA BUS Bidirection DATA BUS Bidirection DATA BUS Bidirection DATA BUS No Connect No Connect Bidirection DATA BUS Bidirection DATA BUS Bidirection DATA BUS WakeUp Signal(Active Low) Write Enable Read Enable Request Data Block( Active Low ) MIDI IN ( UART ) Chip Select Register Address or Data Strobe No Connect No Connect Master Reset ( Active Low ) LED control port or test mode Vibrator control port or test mode Test Mode Select( must be Low) Master Clock In MODE0 and MODE1 I/O select Power Supply Ground No Connect No Connect No Connect No Connect Ground PWM Output Left (-) PWM Output Right (-) PWM Power PWM Output Left (+) PWM Output Right (+) PWM Ground 38 45 EarPhone_R(*Wclk) O EarPhone out Right or Word Clock for DAC 39 40 46 47 EarPhone_L(*Sclk) EVDD O P EarPhone out Left or Serial Clock for DAC Power for EarPhone QS6400 ADPCM SOUND DSP for For Mobile QS6400 64Advanced Poly ADPCM Sound Synthesizer Mobile Phone 4- 3 Detail pin descriptions. POWER SUPPLY PINS - VDD ( 4,27 ) - These pins are connected to a normal power supply. - VSS ( 3,28,31 ) - These pins are GNDs of power. - PVDD( 34 ), EVDD( 40 ),PVSS (37) - PVDD is VDD for PWM block. It's capable of driving a voltage of MAX 4.2V down to 3.3V. - EVDD is VDD for EarPhone block. Its range covers 3.6V to 2.7V. - PVSS is PWM block GND. POWER RESET - MRSTB ( 21 ) - Reset is accomplished by holding the MRSTB pin low for at least 60 oscillator periods while the oscillator is running. To ensure proper power-on reset, the MRSTB pin must be high long enough to allow the oscillator time to start up plus 40 oscillator periods. - RESET should be free from glitch noise. - At power-on, the voltage on VDD and MRSTB must come up at the same time for a proper start-up. - After RESET, all registers and internal RAM are initialized to "0x00“ AUDIO INTERFACE - Support to playback ADPCM wavefile(2 Channels) - Separate wave volume control(0~255). Gayagum/Daegum/Haegum/Taepyoungso/Buk/Ggwengary/Jang-goo/Jing. CPU INTERFACING - 14 Wires parallel interfacing