QS6400 Datasheets 64 Poly ADPCM Sound Synthesizer For Mobile Phone. Version 2.6 Contents Chapter 1 General Description Chapter 2 Features Chapter 3 Block Diagram 3-1 Outline of Block 3-2 Description of blocks Chapter 4 Pin Rotation and Pin Description 4-1 Pin Rotation 4-2 Pin Descriptions 4-3 Detail Pin Description Chapter 5 Details of Block 5-1 Register 5-1-1 Register Table 5-1-2 Read and Write Operation 5-1-3 Deatailed Register Description and Usage Each Action. 5-2 FIFO 5-3 D/A Interfacing 5-4 PWM Output Chapter 6 Application Flow Chart 6-1 Application Flow Chart 6-2 Application Circuit Chapter 7 Electrical Charateristics and soldering temperature Chapter 8 SMF Sound Table Chapter 9 Outline Dimensions and weight Chapter 10 Marking 1/38 Advanced ADPCM SOUND DSP for Mobile Chapter 1 QS6400 General Description QS6400 is a high quality sound DSP for mobile phones that plays music through a built-in ADPCM decoder with sound font rom. QS6400 is equipped with Altonics' QPCM synthesizer,which is capable of generating up to 64 voices with different tones. QS6400 can also play two channels of wavefiles of differing sampling rates. Since data in the FIFO buffer is processed on demand, the length of the data(MIDI & WAVE) is not limited, making QS6400 an excellent platform for applications such as incoming melody distribution service. The MIDI handler built in to QS6400 can play MIDI data without an extra buffer. Included is a PWM module for audio out with a maximum output of 500mw at 8Ω load registance(PVDD=4.0V For earphone use, QS6400 provides a single-ended stereophonic output terminal. To operate QS6400 to full capability, "Standard MIDI File(SMF) Format 0" is recommended. Chapter 2 Features ADPCM synthesizer functions ▶ 64 voices generated at 39kH simultaneously. ▶ Compatible with stereophonic sound generation. ▶ Master Volume control Individual channel volume / master volume. ▶ Built-in MIDI handler(sequencer) ▶ Equipped with two buffers of 128 bytes FIFO for MIDI play. ▶ Built-in 4 bit or 8 bit ADPCM decorder. TONE ▶ Supports GENERAL MIDI LITE specification. GM 128 voices + 47 voices percussion. Support to control parameters by "BxH xxh"(see the MIDI implementation chart) ▶ Additional 8 voices to play korean traditional music. Gayagum/Daegum/Haegum/Taepyoungso/Buk/Ggwengary/Jang-goo/Jing. ▶ Various sampling rate : 8 ~ 39Khz WAVE ▶ Support to playback ADPCM wavefile(2 Channels) ▶ Separate wave volume control(0~255) CPU INTERFACING ▶ 14 Wires parallel interfacing 2/38 Advanced ADPCM SOUND DSP for Mobile QS6400 AUDIO OUTPUT ▶ PWM or 16bit DAC output can be selected. ▶ PWM output mode : 500mW when PVDD=4.0V, RL=8Ω ▶ Provides Stereo or Mono output for earphone. POWER SUPPLY ▶ Includes three power supplies for sub-system PVDD power supply devoted to PWM block.(3.3 ~ 4.2V) EVDD power supply devoted to earphone block.(2.7 ~ 3.6V) VDD is normal power supply.(2.7 ~ 3.6V) 3/38 Advanced ADPCM SOUND DSP for Mobile Chapter 3 QS6400 Block Diagram 3-1. Outline of Blocks D0~D7 WRB D0~D7 RDB Register 32 * 8 CSB A0 CPU & ROM SMFSMFBuffer Buffer 128 * 88 128* FIFO FIFO 4Mbit Built In Sound Font ROM Wave Wave Wave Wave Buffer Buffer Buffer Buffer 6464*64 8 64***888 FIFO FIFO FIFO FIFO WAKEB XIN XOUT MIDI IRQB MRSTB Sound Memory Interface SMF file Decoder & Power Control Vibrato & LFO ADPCM Wave Digital Filter Decoder Clock Generater Mixing & Panning D/A Interface EarPhone OUT SPK out ( PWM L SPK out ( PWM R ) MUX MUX SOUT Right Left EVDD PWML( - ) PWML( + ) PWMR( - ) PWMR( + ) (*Wclk)(*Sclk) 4/38 Advanced ADPCM SOUND DSP for Mobile QS6400 3-2. Descripion of Blocks Explanations about each block of QS6400 and flows of the signal are as follows. 1) Register Block : QS6400 has registers of 32 x 8 for storing control data. Built-in 8052 can communicate directly with the register blocks, which are used to change control values and communicate commands. 23 x 8 registers are used for this purpose. The extra registers are available to support additional features. 2) SMF FIFO buffer : This FIFO is used in receiving SMF file blocks (128bytes) from Host. SMF FIFO Buffer has two banks of memory block and each buffer is filled with data according to REG_IREQ_TYPE (When bit 2 is "1" ) from built- in 8052. When receiving a data request (IRQB) for the next procedure you should read the interrupt request type register (REG_IREQ_TYPE) to check which data is required. 3) WAVE FIFO buffer : This FIFO is used in receiving wave data blocks (64 or 128 bytes) from Host. WAVE FIFO Buffer has four banks of memory block, of 64 bytes each. The buffer size is determined by user specification (using REG_WAVE_CHAN). Each bank is filled with wave data accoding to REG_IREQ_TYPE( when bit 1 or bit 0 is "1" If you intend to play high-sampling-rate(up to 22khz) wave files, we recommend that you use only one wave channel, due to the high transmission rate of data. In this case, WAVE FIFO Buffer size is preset to 128bytes. 4) Power control : This block is in charge of power management. You can select whether to enter or wake-up from power down mode. 5) Clock generator : This block is a clock generator for the internal master clock. QS6400 need the external clock input to operate normally. 6) CPU & ROM : This block describes 8052 micom and 12k bytes program ROM memory. Built-in 8052 interprets SMF and Wave file. 7) PWM Speaker out : This block converts audio data into PWM format. It supports stereophonic audio out. You can also mute this output. 8) Earphone out : This block converts audio data into single-ended earphone signal. You should connect poled-capacitor and bypass capacitor. P38/P39 Earphone_R/L 1uf/10v 104p 5/38 Advanced ADPCM SOUND DSP for Mobile QS6400 9) D/A interface : This block generates 16bit DAC interfacing out for high quality sound. If you have an additonal DAC, you can also use this interfacing out. When you use the DAC OUT mode, earphone is disabled. 10) Sound font : This is an embedded maskrom for GM 128 sound map and 47 percussion. The sound font built in this device stores the sampling data according to GM 128 sound map. Additionally QS6400 has sampling data to support korean traditional music. 6/38 Advanced ADPCM SOUND DSP for Mobile Chapter 4 QS6400 Pin Rotation and Descriptions. 4-1. Pin Rotation 4-1-1 40P MLF 7/38 Advanced ADPCM SOUND DSP for Mobile QS6400 4-2. Pin Descriptions PIN NO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 PIN NO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 PIN NAME I/O NC NC NC VSS VDD SOUT D0 D1 D2 D3 D4 NC NC D5 D6 D7 WAKEB WRB RDB IRQB MIDI CSB A0 NC NC MRSTB MODE0 MODE1 TEST XIN XOUT VDD VSS NC NC NC NC VSS PWML(-) PWMR(-) PVDD PWML(+) PWMR(+) PVSS EarPhone_R(*Wclk) EarPhone_L(*Sclk) EVDD X X X P P O I/O I/O I/O I/O I/O X X I/O I/O I/O I I I O I I I X X I I/O I/O I I I P P X X X X P O O I O O I O O P DESCRIPTION No Connect No Connect No Connect Ground Power Supply Serial Data Out for DAC Bidirection DATA BUS Bidirection DATA BUS Bidirection DATA BUS Bidirection DATA BUS Bidirection DATA BUS No Connect No Connect Bidirection DATA BUS Bidirection DATA BUS Bidirection DATA BUS WakeUp Signal(Active Low) Write Enable Read Enable Request Data Block( Active Low ) MIDI IN ( UART ) Chip Select Register Address or Data Strobe No Connect No Connect Master Reset ( Active Low ) LED control port or test mode Vibrator control port or test mode Test Mode Select( must be Low) Master Clock In MODE0 and MODE1 I/O select Power Supply Ground No Connect No Connect No Connect No Connect Ground PWM Output Left (-) PWM Output Right (-) PWM Power PWM Output Left (+) PWM Output Right (+) PWM Ground EarPhone out Right or Word Clock for DAC EarPhone out Left or Serial Clock for DAC Power for EarPhone 8/38 Advanced ADPCM SOUND DSP for Mobile QS6400 4-3. Detail pin descriptions. ▶ POWER SUPPLY PINS VDD ( 4,27 ) These pins are connected to a normal power supply. VSS ( 3,28,31 ) These pins are GNDs of power. PVDD( 34 ), EVDD( 40 ),PVSS (37) PVDD is VDD for PWM block. It's capable of driving a voltage of MAX 4.2V down to 3.3V. EVDD is VDD for EarPhone block. Its range covers 3.6V to 2.7V. PVSS is PWM block GND. ▶ POWER RESET MRSTB ( 21 ) Reset is accomplished by holding the MRSTB pin low for at least 60 oscillator periods while the oscillator is running. To ensure proper power-on reset, the MRSTB pin must be high long enough to allow the oscillator time to start up plus 40 oscillator periods. RESET should be free from glitch noise. At power-on, the voltage on VDD and MRSTB must come up at the same time for a proper start-up. After RESET, all registers and internal RAM are initialized to "0x00". ▶ AUDIO INTERFACE QS6400 supports two kinds of output mode; DAC out or PWM out There is a register for selecting output mode. In using PWM mode, you can select Stereo or Mono out. Thus QS6400 can support application such as high-quality stereo mobile phones. QS6400 also provides single-ended stereophonic earphone output, showing superb playback quality through both External speakers and earphones. You can select these modes using REG_OUT_MODE. PWML-( 32 ), PWML+( 35 ), PWMR-(33),PWMR+(36) QS6400 supports Stereo PWM out for the Speaker. This output can be muted if desired. PWML- and PWMR- are connected to the speaker's minus(-) terminal. PWML+ and PWMR+ should be connected to the plus(+) terminal. EarPhone_R(38), EarPhone_L(39) EarPhone_R and EarPhone_L are single- Ended Stereo EarPhone output modes. EVDD is prepared to power earphone operation seperately. Also you can mute PWM output signal by control bit located in REG_OUT_MODE. WCLK ( *38 ), SCLK ( *39 ), SOUT ( 5 ) If you write data "1xxxxxxxH" to "(Out_Mode)" after reset, DAC mode is enabled and Earphone out is disabled. On the other hand, if you need EarPhone out mode, you can choose EarPhone out Mode. If you want more detailed information, see "Chapter 5-3 D/A interface and Chapter 5-4 Earphone out". *Pin numbers correspond to MLF40 packaging 9/38 Advanced ADPCM SOUND DSP for Mobile QS6400 ▶ CPU INTERFACE QS6400 provides 14 wires parallel interface. MIDI ( 18 ) Interface for serial MIDI signal. The input signal should be of asynchronous serial type with no-parity bit and should have one start and stop bit each, thus consisting of ten total bits. The transfer mode should be MSB first method. IRQB ( 17 ) Request pin(IRQB) that is activated when QS6400 is ready to receive next packet data block. After receiving this request, you must read the interrupt request type register(REG_IREQ_TYPE) which you want. At this time IRQB is cleared. To play MIDI file you should transfer 128 byte data blocks. To play wave files, you should transfer 64 or 128 bytes of data. You can select the block size by writing value to wave channel number register(REG_WAVE_CHAN If you take one wave channel, data block size is 128 bytes. If you want to play two wavefiles simultaneously. the data block should be 128bytes/2. WAKEB ( 14 ) WAKEB is to release from Power-Down Mode. A wake operation is accomplished by holding the WAKEB pin low for a minimum 70ns period. After wakeup, all internal registers and RAM buffers are initialized to zero. A0( 20 ) This pin is used to select between Register Address or Command and Data. If the pin is high, the data to be written is the Register Address(Index) . Otherwise if the pin is low, the data to be written is Command or Data. CSB( 19 ) Chip Select for QS6400. This pin must be low for read and write operation. D0~D7(6~13) These are data buses for INDEX and DATA. We recommend use of COMMON DATA BUS. ▶ EXTRA PINS XIN ( 25 ) XOUT ( 26 ) This pin determines I/O status of MODE0 and MODE1. When High, MODE0 and MODE1 are set to input mode. However, in this case either one of MODE0 or MODE1 must be High. If both are Low, that signals a self diagnostic mode. When XOUT is Low, MODE0 and MODE1 are used in output mode, with MODE0 and MODE1 each controling the LED and the Vibrator, respectively. *Pin numbers correspond to MLF40 packaging 10/38 Advanced ADPCM SOUND DSP for Mobile Chapter 5 QS6400 Details of Blocks. 5-1. REGISTER 5-1-1. REGISTER TABLE Registers RESERVED RESERVED RESERVED REG_SMF_CTRL REG_VOLUME REG_SMF_EOP REG_PIO_MIDI REG_WAVE_CHAN REG_WAV1_CTRL REG_WAV_VOL REG_PTR_FIFO REG_WAV1_SR REG_WAV2_CTRL REG_LED_MODE REG_VIB_MODE REG_WAV2_SR REG_LV_CTRL REG_SMF_BUF REG_WAV1_BUF REG_WAV2_BUF REG_READY_QS REG_REF_TUNE REG_OUT_MODE REG_P_DOWN REG_EARP_VOL REG_PWM_CLOCK REG_IREQ_TYPE RESERVED REG_QDSP_MODE READ_WRITE_BACK RESERVED RESERVED RESERVED RESERVED REG_IF_FLAG1 REG_IF_FLAG2 REG_IF_FLAG3 REG_IF_FLAG4 Address 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH 1DH 1EH 1FH 20H 21H 22H 23H 24H 25H R/W X X X W W W W W W W W W W W W W W W W W W W W W W W R X R R X X X X R R R R Description Reserved Reserved Reserved SMF play control register (play/stop/etc.) PWMR and PWML gain control register End of a packet(128 bytes) register for the SMF Parallel MIDI interface register Register to specify number of wave channels to use Wave channel 1 play control register Wave volume control register Pointer register of the SMF fifo for single midi mode Wave channel 1 sample rate select register Wave channel 2 play control register LED mode select register Vibrator mode select register wave channel 2 sample rate select register Led and vibrator on/off control register SMF packet block buffer register (128bytes ) Wave channel 1 packet block buffer register Wave channel 2 packet block buffer register Ready for active of QS6400 Reference Clock Select Audio output mode select register Power down mode register Earphone volume control register PWM Clock Rate Selector Interrupt request type register(Read only) Reserved Status bit for SMF & WAVE Channel.(Read only) Read the INDEX to be written before (Read only) Reserved Reserved Reserved Reserved Flag1 register to notify 8-registers writing state Flag2 register to notify 8-registers writing state Flag3 register to notify 8-registers writing state Flag4 register to notify 8-registers writing state 11/38 Advanced ADPCM SOUND DSP for Mobile QS6400 5-1-2. READ AND WRITE OPERATION Set Address Read Register Write Register WRB ↑ H ↑ RDB H ↑ H A0 H L L CSB L L L D0 ~D7 Set register address to write or read Read data from QS6400 Write command to QS6400 To write Data or a Command to a register, first set A0 to High and CSB to low. After writing the Index Address of target register, set both A0 and CSB to low to write command or data. ● Read Command Flow Set Register Read Status ● Write Command Flow Set Register Write Data or Command 5-1-3. DETAILED REGISTER DECRIPTIONS AND USEAGES IN EACH ACTION ▶ INITAIL SETUP WHEN POWER ON RESET. 1) RELATED TO DEVICE READY CHECK BETWEEN HOST AND QS6400 REG_READY_QS : 0x14 Data Description 0x4D Ready command for ACTION of QS6400 This register relays an initialization signal to the QS6400. For normal initialization write “0x4D”. *Warning => This register is also used to test the operation of the chip, and any other value should not be written to it REG_QDSP_MODE : 0x1C Internal operation status of QS6400 Bit 0 H L Bit 1 H L Bit 2 H L Bit 3 H L Bit 4 H L Bit 5 H L Bit 6 H L Bit 7 H L Ready Wave Channel #1 Busy Wave Channel #1 Ready Wave Channel #2 Busy Wave Channel #2 fade out complete mode by power down normal mode midi file play mode midi file stop mode not used reserved single MIDI protocol FIFO mode normal FIFO using mode abnormal wake up mode normal wake up mode normal wake up mode abnormal wake up mode 12/38 Advanced ADPCM SOUND DSP for Mobile Read and Check Host "0x4D" write "10xxxxxxB" write QDSP MODE REGISTER READY_QS Read and ready to action REGISTER "QS6400" QS6400 Micom in QS6400 2) RELATED TO QS6400 INITIAL VALUE REG_VOLUME : 0x04 DATA Description 0x00 ~ OxFF PWMR and PWML gain control This register adjusts the output gain on Speaker driven by internal amplifier of QS6400. Valid range is 0~255. User sets this value according to desired output. REG_WAVE_CHAN : 0x07 DATA 0x00 0x01 Description Do not use any Wave(ADPCM) decoder channels. Use one Wave(ADPCM) decoder channel.On request of Wave Data Packet, 128 bytes must be transferred. 0x02 Use two Wave(ADPCM) decoder channels.On request of Wave Data Packet, 64 bytes must be transferred. The number of ADPCM decoder channels to be used during ADPCM wave file playback is decided by this register. The internal Wave FIFO buffer is utilized differently depending on this value. REG_WAV_VOL : 0x09 DATA Description 0x00 ~ 0xFF Set Wave Play Volume for Wave Channels Sets the volume of the ADPCM decoder. Range is 0~255. REG_EARP_VOL : 0x18 Bit7 Description 1 Earphone Out Left Volume. Range : 0 ~ 127(Bit6 ~ Bit0) 0 Earphone Out Right Volume. Range : 0 ~ 127(Bit6 ~ Bit0) This register sets earphone out volume. REG_PWM_CLOCK : 0x19 DATA Description 0x00 40Mhz for PWM drive clock 0x01 20Mhz for PWM drive clock Register to select internal clock mode to drive PWM. 13/38 Advanced ADPCM SOUND DSP for Mobile QS6400 3) AUDIO OUT SELECT REGISTER REG_OUT_MODE : 0x16 DATA Bit 7 Description L Select PWM for Audio out H Select DAC for Audio out L Set PWM out Enable Bit 6 H Set PWM out Disable(Mute) Bit 5 Undefined L Undefined H Set Stereo Mode L Bit 4 H Set Mono Mode L Undefined Bit 3 H Undefined Earphone Right Out Enable L Bit 2 H Earphone Right Out Disable(Mute) L Earphone Left Out Enable Bit 1 Earphone Left Out Disable(Mute) H Undefined Bit 0 x Sets stereo/mono mode of Audio out and also enables/disables mute for each output signal. 4) REFERENCE CLOCK SELECT REGISTER REG_REF_TUNE : 0x15 This register is used to correct the internal clock that is generated in tandem to the external reference clock. It has to be set to the correct value according to the clock frequency received on Xin. A disparage between the frequency of clock value set in this register and Xin will result in sounds of abnormal pitch and tempo. Values for each frequency are as follows: DATA 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Xin Reference Clock Reference Clock = 13Mhz Reference Clock = 19.2Mhz Reference Clock = 26Mhz Reference Clock = 24Mhz Reference Clock = 13Mhz Reference Clock = 19.2Mhz Reference Clock = 26Mhz Reference Clock = 24Mhz Reference Clock = 13Mhz Reference Clock = 19.68Mhz Reference Clock = 26Mhz Reference Clock = 24Mhz Reference Clock = 13Mhz Reference Clock = 19.68Mhz Reference Clock = 26Mhz Reference Clock = 24Mhz 14/38 Advanced ADPCM SOUND DSP for Mobile 16 ~ 255 QS6400 Reference Clock = Register Value / 10 ex) Register Value = 16, Reference Clock = 1.6Mhz Register Value = 21, Reference Clock = 2.1Mhz Register Value = 96, Reference Clock = 9.6Mhz ▶ RELATED TO PLAY MIDI REGISTER REG_SMF_CTRL : 0x03 This register controls Standard MIDI File(SMF) playback. Operations are decided by bits written to this register. Function Data Description Starts play of SMF. Playback 0x11 Stops play of SMF. 0x12 0x13 Pauses play of SMF. Should only be used during playback. Tempo FIFO Key Shift 0x14 Resumes play of SMF from pause state. Should only be used when paused. 0x20 Sets Tempo to base tempo, removing any changes that have been made to the Tempo. 0x21 Tempo increases in steps of 1% against base tempo, to a maximum of 25%.(Cannot be used while playing an ADPCM Wave File) 0x22 Tempo decreases in steps of 1% against base tempo, to a maximum of 25%.(Cannot be used while playing an ADPCM Wave File) 0x31 Sets mode of MIDI FIFO buffer to be used as a MIDI protocol input buffer to an external MIDI sequencer.The internal sequencer of the QS6400 is disabled in this mode. 0x32 Returns to normal mode, canceling use of the MIDI FIFO buffer as input to an external sequencer. 0x40 Sets key to base key, removing any changes that have been made to the key. 0x41 Key is increased by one pitch. Can be increased by a maximum of 12. 0x42 Key is decreased by one pitch. Can be decreased by a maximum of 12. *Tempo step up from original tempo value.( Total 50 steps ) -5% -1% 1% Tempo down 5% Tempo up Original Tempo 15/38 Advanced ADPCM SOUND DSP for Mobile QS6400 REG_SMF_BUF : 0x11 Write data to this register during SMF data packet transfer. For a continuous write, just initiate the first write. This can also be used as a buffer for direct external input of MIDI protocol data. Description DATA SMF DATA MIDI Packet Data Buffer Write Address( 128Bytes) After receiving the next data request. you should write the data to this address in a block of 128 bytes. And then write dummy data to "REG_SMF_EOP" register to acquire to finish this packet. REG_SMF_EOP : 0x05 DATA ANY DATA Description Finished MIDI data write. This register notifies the transfer of a 128 byte data packet is completed upon request for the next SMF data packet during playback. It is only used to control SMF data transfer, and is activated by any non-zero value. REG_IREQ_TYPE : 0x1A Determines which request has been made when IRQB pin is Low. Reading this register resets IRQB to High. Description DATA On request of next data packet of Wave channel 2. Bit 0 Bit 1 On request of next data packet of Wave channel 1. Bit 2 On request for next data packet of Song File Bit 3 Reserved Bit 4 Reserved Bit 5 When playback of Song File has ended Bit 6 Start/Stop of Wave channel 2 during playback of Song File. Bit 7 Start/Stop of Wave channel 1 during playback of Song File. ( H : request active , L : no request ) 1st byte in 2nd packet < Play SMF sequency > 128 Bytes WRB REG DATA REG_SMF_BUF SMF DATA 1 Byte 1 Byte REG_SMF_EOP REG_SMF_CTRL DUMMY-DATA 0x11 Start MIDI SMF_DATA IRQB <Next data block request> Check REG_IREQ_TYPE for bit 2 set to "1" and then write the packet data to be required. 16/38 QS6400 Advanced ADPCM SOUND DSP for Mobile < Detailed register control to play the SMF file > - STEP 1- REG_SMF_BUF(11H) <---- OxXX ; To write the 1st packet data(128bytes). - STEP 2- REG_SMF_CTRL(03H) <---- Ox11 ; Start play of the SMF file. - STEP 3- REG_SMF_EOP(05H) <---- OxXX ; Write the dummy data for finishing packet data transfer. packet data writing process - STEP 4- Check "Data Request" ; Next packet reguest(IRQB) from QS6400 - STEP 5- REG_IREQ_TYPE(1AH ; Read "REG_IREQ_TYPE" and Check if bit 2 is "1" - STEP 6- REG_SMF_BUF(11H) <---- OxXX ; To write the 2nd packet data(128bytes). - STEP 7- REG_SMF_EOP(05H) <---- OxXX ; Write the dummy data for finishing packet data transfer. Repeat packet data writing process . " " " " " " " " " . Repeat packet data writing process - STEP 8- Check "Data Request" ; Next packet reguest(IRQB) from QS6400 - STEP 9- REG_IREQ_TYPE(1AH <---- ; Read "REG_IREQ_TYPE" and Check if bit 2 is "SET" - STEP10- REG_SMF_BUF(11H) <---- OxXX ; Write the last packet data(128bytes). - STEP11- REG_SMF_EOP(05H) <---- OxXX ; Write the dummy data for finishing packet data transfer. Last packet - STEP 12- Check "Data Request" ; Next packet reguest(IRQB) from QS6400 - STEP 13- REG_IREQ_TYPE(1AH <---- ; Read "REG_IREQ_TYPE" and Check if bit 5 is "SET" Stop the SMF Play 17/38 Advanced ADPCM SOUND DSP for Mobile QS6400 ▶ RELATED TO PLAY WAVE REGISTER REG_WAV1_CTRL : 0x08 DATA Description 0x11 Start decode on Wave Channel 1. 0x12 Stop decode on Wave Channel 1 This controls the ADPCM decoder of the first Wave Channel. REG_WAV1_SR : 0x0B Sets type of ADPCM decoder channel 1. Bit7 ~ Bit6 Bit5 ~ Bit4 Bit3 ~ Bit0 ADPCM table Select Filter Select or Sub Sampling Rate Select Sampling Rate Bit6 0 0 1 1 0 1 0 1 Bit5 Bit4 Description 0 0 1 1 0 1 0 1 Without Filter Mode Filter 1 Mode Filter 2 Mode Sub Sampling Mode ADPCM table Select Filter Select or Sub Sampling Rate Select Bit3 ~ Bit0 Sampling Rate Description Bit7 Using Using Using Using ADPCM ADPCM ADPCM ADPCM table table table table 1 2 3 4 (19T) (08T) (04T) (02T) Main Sampling Rate Sub Sampling Rate 0x00 0x01 0x02 0x03 0x04 0x0A 0x0B 0x0C 0x0D 0x0E 22.1K 14.7K 11K 8.82K 4.41K 8K 7K 6K 5K 3.6K REG_WAV2_CTRL : 0x0C DATA Description Start decode on Wave Channel 2. 0x11 0x12 Stop decode on Wave Channel 2 This controls the ADPCM decoder of the second Wave Channel. REG_WAV2_SR : 0x0F Sets type of ADPCM decoder channel 2. Bit7 ~ Bit6 Bit5 ~ Bit4 Bit3 ~ Bit0 ADPCM table Select Filter Select or Sub Sampling Rate Select Sampling Rate 18/38 Advanced ADPCM SOUND DSP for Mobile ADPCM table Select Filter Select or Sub Sampling Rate Select Bit3 ~ Bit0 Sampling Rate QS6400 Description Bit7 Bit6 0 0 1 1 0 1 0 1 Bit5 Bit4 Description 0 0 1 1 0 1 0 1 Without Filter Mode Filter 1 Mode Filter 2 Mode Sub Sampling Mode Using Using Using Using ADPCM ADPCM ADPCM ADPCM table table table table 1 2 3 4 (19T) (08T) (04T) (02T) Main Sampling Rate Sub Sampling Rate 0x00 0x01 0x02 0x03 0x04 0x0A 0x0B 0x0C 0x0D 0x0E 22.1K 14.7K 11K 8.82K 4.41K 8K 7K 6K 5K 3.6K REG_WAV1_BUF : 0x12 & REG_WAV2_BUF : 0x13 DATA Description Wave#1/2 Packet Data Buffer (**bytes) WAVE DATA **bytes : If you select one-wave channel, you should write packet data of 128 byte. If you select two-wave channel, you should write packet data of 64 byte. < Play the wave sequency > 1 Byte 128(64) Bytes WRB REG DATA 0x00 or 01 or 02 "A" <Next data block request> Check REG_IEQ_TYPE, if bit 0 or 1 is "1" and then write required packet DATA 1 Byte REG_WAV#1/2_BU WAV_CTRL#1 or 2# WAVE_DATA 0x11 Start WAVE WAVE_DATA IRQB "A" : SET number of WAVE channel. 19/38 Advanced ADPCM SOUND DSP for Mobile QS6400 < Detailed register control for playing the WAVE file "When using single wave channel" > - STEP 1- REG_WAV_VOL(09H) <---- Ox00 ~OxFF ; Set Wave volume - STEP 2- REG_WAV1_SR(0BH) <---- Ox00 ~ Ox09 ; Set sampling-rate and number of data bit. - STEP 3- REG_WAV1_BUF(12H)<---- OxXX ; Write the packet data for playing wave.(128byte) - STEP 4- REG_WAV1_CTRL(08H<---- Ox11 ; Start the WAVE file. - STEP 5- Check "Data Request" ; Next packet reguest(IRQB) from QS6400 - STEP 6- REG_IREQ_TYPE(1AH ; Read "REG_IREQ_TYPE" and Check if bit 1 is "SET" - STEP 7- REG_WAV1_BUF(12H)<---- OxXX ; Write the 2nd packet data for playing wave.(128byte) Repeat packet data writing process . " " " " " " " " " Repeat packet data writing process - STEP 8- Check "Data Request" ; Next packet reguest(IRQB) from QS6400 - STEP 9- REG_IREQ_TYPE(1AH ; Read "REG_IREQ_TYPE" and Check if bit 1 is "SET" - STEP10- REG_WAV1_BUF(12H)<---- - STEP11- REG_WAV1_CTRL(08H<---- OxXX ; Write the last packet data(128bytes). Last packet data Ox12 ; STOP the WAVE play. 20/38 Advanced ADPCM SOUND DSP for Mobile QS6400 ▶ RELATED TO ONE NOTE MIDI PLAY REG_PIO_MIDI : 0x06 DATA Description MIDI BYTE Support to input midi data by parallel format This register is used for direct input of MIDI protocol by the user. The data is provided by the user and 0~2mSec are required for data read. This is useful for producing a Key Tone of a specific sound in the GM sound map. REG_PTR_FIFO : 0x0A Used to notify the QS6400 on the 256byte buffer offset Address during transfer on a by MIDI protocol data basis, using the SMF FIFO buffer. ▶ POWER MANEGEMENT REGISTER REG_P_DOWN : 0x17 Puts QS6400 in power down mode. This is also used to stop internal clock generator adjustment. DATA 0xAA 0x55 0x01 Description Enters Power Down Mode Gradually reduces currently operating Polys. (Fade Out) Stops internal clock adjustment algorithm ▶ GPIO CONTROL REGISTER REG_LED_MODE : 0x0D Sets behavior of LED when controlled using MODE0(#22) pin. Bit7 Bit6 ~ Bit4 0 LED operation mode Bit3 ~ Bit0 LED blink frequency (LED_BF) *Bit7 must be ‘0’. Setting to ‘1’ signals use of register for sound test, so it must be set to ‘0’ for this register to be used as a control parameter. Bit7 = ‘1’, Bit6 = ‘0’: Bit5~Bit0 become internal ENV_ATTENUATE. Bit7 = ‘1’, Bit6 = ‘1’: Bit5~Bit0 become internal VOL_ATTENUATE. * LED operation Mode Bit6 0 0 0 1 1 Bit5 0 1 1 1 1 etc Bit4 0 0 1 0 1 Sync. with LED control Sync. with LED control Sync. with LED control + Blinking Reserved Mode Reserved Mode Reserved Mode * LED blink freq. Blinking Frequency = 100 / ( 4 x LED_BF) Hz Will not blink if LED_BF is set to “0”. 21/38 Advanced ADPCM SOUND DSP for Mobile QS6400 REG_VIB_MODE : 0x0E Sets behavior of Vibrator when controlled using MODE1(#23) pin. Bit7 Bit6 ~ Bit4 Bit3 ~ Bit0 Vibrator blink frequency (VIB_BF) *Bit7 must be ‘0’. Setting to ‘1’ signals use of register for sound test, so it must be set to ‘0’ for this register to be used as a control parameter. Bit7 = ‘1’, Bit6 = ‘0’: Bit5~Bit0 become internal PD_ENV_DECAY. Bit7 = ‘1’, Bit6 = ‘1’: Bit5~Bit0 become internal MUTE_ENV_DECAY. 0 Vibrator operation mode * Vibrator operation Mode Bit6 0 0 0 1 1 Bit5 0 1 1 1 1 etc Bit4 0 0 1 0 1 Sync. with Vibrator control Sync. with Vibrator control Sync. with Vibrator control + Blinking Reserved Mode Reserved Mode Reserved Mode * Vibrator blink freq. Blinking Frequency = 100 / ( 4 x VIB_BF) Hz Will not blink if VIB_BF is set to “0”. REG_WRITE_BACK : 0x1D Returns Register Index Number when QS6400 reads a Command or Data that has previously been written to some register. Used to verify that the internal processor has read some specific value that was written. 22/38 Advanced ADPCM SOUND DSP for Mobile QS6400 5-2. FIFO QS6400 has two FIFO regions to play MIDI and WAVE DATA. These FIFOs are prepared for receiving the SMF file and Wave data from Host. Both of them have two banks of memory block and each buffer is filled with data according to REG_IREQ_TYPE from built- in 8052. They both have the same address. Address is automatically incremented during operation. When receiving the data request(IRQB) for next procedure you should read the REG_IREQ_TYPE register and then send the next data by request type. < FIFO for MIDI > *03H 0 1 2 3 4 5 …. 122 123 124 125 126 127 *03H 2 3 4 5 …. 122 123 124 125 126 127 2 2 2 2 3 3 3 3 4 4 4 4 5 5 5 5 …. …. …. …. 58 58 58 58 59 59 59 59 60 60 60 60 61 61 61 61 62 62 62 62 63 63 63 63 0 1 < FIFO for WAVE > WAVE_CH#1 0 1 0 1 WAVE_CH#2 0 1 0 1 5-3. D/A AND EARPHONE OUTPUT QS6400 provides switchable audio out mode beteen DAC and EARPHONE. Using the output-mode register you can select whether audio output is DAC or Earphone. When using earphone out, the DAC interface is in accessible, because the DAC and Earphone out pin actually use the same hardware pin. Earphone Right enable or disable Mono or "REG_OUT_MODE BIT5" Stereo enable or disable Earphone Left P38 :*WCLK or Earphone_right Sel P39 :*SCLK or Earphone_left "REG_OUT_MODE BIT4" D/AC Interface "REG_OUT_MODE BIT6" enable or disable P5 :Sout 23/38 Advanced ADPCM SOUND DSP for Mobile QS6400 5-4. STEREO PWM OUTPUT QS6400 supports two kinds of speaker out mode, DAC out or PWM out. In using PWM mode, you should select whether it is Stereo or Mono. PWM Right enable or disable P36 :PWM R(+) P_CHN N_CHN Mono or "REG_OUT_MODE BIT7" P33 :PWM R(-) Stereo enable or disable PWM Left P35 :PWM L(+) P_CHN N_CHN Sel P32 :PWM L(-) "REG_OUT_MODE BIT4" MUTE "REG_OUT_MODE BIT6" Chapter 6 Appplication 6-1. Application flow chart [ QS6400 Initialize ] 1) Reset or Wake Up from Power Down Mode 2) Read Register : Value = REG_QDSP_MODE 3) Value == 0x83 4) Write Register : REG_READY_QS = 0x4D 5) Initialize Registers Write Register : REG_WAVE_CHAN = 0x00 Write Register : REG_OUT_MODE = 0x00 Write Register : REG_PWM_CLOCK = 0x01 Etc. [Note] If “0x83” is not detected on step 3) for over 300mSec, regard as hardware failure in QS6400. 24/38 Advanced ADPCM SOUND DSP for Mobile QS6400 [ QS6400 MIDI File Play Flow ] 1) Initialize Process 2) Command Out : REG_SMF_CTRL = 0x11 3) Set Register Index : REG_SMF_BUF CNT = 0; 4) Write 1 Byte Data CNT = CNT + 1; 5) CNT == 128 6) Write Register : REG_SMF_EOP = 0x05 7) IRQB == 0 8) Read Register : Value = REG_IREQ_TYPE 9) Value.5 == 1 10) Value.2 == 1 END 25/38 Advanced ADPCM SOUND DSP for Mobile QS6400 [ QS6400 WAVE File Play Flow ] 1) Initialize Process 2) Set Wave Channel : REG_WAVE_CHAN = 0x01 Set Sampling Rate : REG_WAV1_SR 3) Command Out : REG_WAV1_CTRL = 0x11 4) Set Register Index : REG_WAV1_BUF CNT = 0; 5) Write 1 Byte Data CNT = CNT + 1; 6) CNT == 128 7) IRQB == 0 8) Read Register : Value = REG_IREQ_TYPE 9) End of Wave Data? 10) Value.1 == 1 11) Command Our : REG_WAV1_CTRL = 0x12 26/38 Advanced ADPCM SOUND DSP for Mobile QS6400 6-2. Application Circuit 27/38 Advanced ADPCM SOUND DSP for Mobile QS6400 Chapter 7 Eletrical Charateristics and soldering temperature Absolute maximum range Item PVDD terminal power supply voltage VDD terminal power supply voltage EVDD terminal power supply voltage Digital input voltage Operating ambient temperature Carrier temperature Symbol PVDD VDD EVDD VIND TOP TCA Min -0.5 -0.5 -5 VSS-0.5 -20 -50 Max 4.5 4.0 4.0 VDD+0.5 85 125 Min 2.7 2.7 2.7 -20 Typ 3 3 3 25 Max 4.2 3.6 3.6 85 Recommended operating condition Symbol Item PVDD operating voltage PVDD EVDD operating voltage EVDD VDD operating voltage VDD TOP Operating ambient temperature DC characteristics Item Input voltage "H" level Input voltage "L" level Output voltage "H" level, IOH = -4m Output voltage "L" level, IOL = 4m Earphone VOH , IOH = -16mA Earphone VOL , IOL = 16mA PWM VOH , IOH = -100mA PWM VOH , IOL = 100mA Input leakage current Input capacity AC characteristics MRSTB,XIN Item MRTSB active "L" pulse width XIN frequecy XIN rising / falling time XIN duty Note : VDD = 3.3V , VSS = 0V Typ Min Max 0.7*VDD 3.6 0.3*VDD 0.8*VDD 0.4 2.4 0.4 2.4 0.4 1 -1 10 Symbol VIH VIL VOH VOL VEOH VEOL VPOH VPOL IL CI Symbol TRSTW 1/TFREQ TR/TF TH/TFREQ Min 512 2 30 Unit V V V V deg. C deg. C Unit V V deg. C Unit V V V V V V V V uA pF Note : VDD = 3V±0.3 ,Copacitor load = 50pF Max Typ Unit *xin 26 Mhz 30 ns 50 70 % TRSTW VIH MSRTB VIL TH TF VIH VIL XIN TR TFREQ 28/38 Advanced ADPCM SOUND DSP for Mobile CSB, WRB, RDB, A0, IREQB, D0~D7 Item Symbol CSB active "L" pulse width(write) TCSW Address setup time TAS WRB active "L" pulse width TWW Data setup time TWDS Data hold time TWDH CSB active "L" pulse width(read) TCSR Address setup time TRAS RDB active "L" pulse width TRW Data read access time TACC Data hold time TRDH IREQB active "L" pulse width TREQW QS6400 When XIN = 20Mhz Max Typ Unit ns ns ns ns ns ns ns ns 70 ns 50 ns us Min 120 10 100 30 5 120 10 100 10 1.6 A0 TCSW TCSW CSB TAS TWW TAS TWW WRB TWDS TWDS TWDH D0~D7 Invalid Index Valid TWDH Invalid Data Valid Timing of Write Operation A0 TCSW TCSR CSB TAS TWW WRB TRAS TRW RDB TWDS TWDH D0~D7 Invalid Index Valid Invalid TACC TRDH Data Valid Timing of Read Operation 29/38 Advanced ADPCM SOUND DSP for Mobile QS6400 BCLK WCLK MSB LSB MSB LSB SDATA BCLK,WCLK,SDATA When XIN = 20Mhz Item Symbol Min Typ Max Unit BCLK 1/Freq time TBLK 820 ns WCLK 1/Freq time TWLK 26 us SDATA 1/Freq time TWW 100 ns Power consumption Item Typ Max 20 40 mA Power consumption 8Ω load and 360mW out 200 mA Power down mode 10 uA Min VDD section ( without speaker ) Unit TOP =-20~85°C Note : PVDD=VDD = 3.3V Soldering temperature Item Soldering temperature Min Typ Max -5 235 5 Unit ℃ 30/38 Advanced ADPCM SOUND DSP for Mobile QS6400 Chapter 8 SMF Sound Table 1) GM LITE SOUND TABLE PC# 1 2 3 Piano 4 5 ChPercu ssion Organ Guita r Bass 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 CCO 0 1 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Tone name Acoustic Grand Piano Daegum Bright Acoustic Piano Taepyoungso Electric Grand Piano Haegum Honkey tonk Piano Gayagum Electric Piano 1 Electric Piano 2 Harpsichord Clavi Celesta Glockenspiel Music Box Vibraphone Marinba Xylophone Tubular Bells Dulcimer Drawbar Organ Percussive Organ Rock Organ Church Organ Reed Organ Accordion Harmonica Tango Accordion Acoustic Guitar (nylon) Acoustic Guitar (steel) Electric Guitar (jazz) Electric Guitar (clean) Electric Guitar (muted) Overdriven Guitar Distortion Guitar Guitar harmonics Acoustic Bass Electric Bass (finger) Electric Bass (pick) Bass String / Orche stra Emsemble Brass Reed Pipe PC# CCO 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Tone name Fretless Bass Slap Bass 1 Slap Bass 2 Synth Bass 1 Synth Bass 2 Violin Viola Cello Contrabass Tremolo Stings Pizzicato Strings Orchestral Harp Timpani String Ensemble 1 String Ensemble 2 SynthStrings 1 SynthStrings 2 Choir Aashs Voice Oohs Synth Voice Orchestra Hit Trumpet Trombone Tuba Muted Trumpet French Hom Brass Section SynthBrass 1 SynthBrass 2 Soprano Sax Alto Sax Tenor Sax Baritone Sax Oboe English Hom Bassoon Clarinet Piccolo Flute Recorder continude next page 31/38 Advanced ADPCM SOUND DSP for Mobile PC# 76 77 Pipe 78 79 80 81 82 83 Synth 84 lead 85 86 87 88 89 90 91 Synth 92 pad 93 94 95 96 97 98 99 Synth 100 SFX 101 102 103 104 105 106 107 Ethni 108 c 109 110 111 112 113 Percu 114 ssive 115 CCO 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Tone name PC# Pan Flute Blown Bottle Shakuhachi Whistle Ocarina Lead 1 (square) Lead 2 (sawtooth) Lead 3 (calliope) Lead 4 (chiff) Lead 5 (charang) Lead 6 (voice) Lead 7(fifths) Lead 8(bass + lead) Pad 1 (new age) Pad 2 (warm) Pad 3 (polysynth) Pad 4 (choir) Pad 5 (bowed) Pad 6 (metallic) Pad 7 (halo) Pad 8 (sweep) FX 1 (rain) FX 2 (soundtrack) FX3 (crystal) FX 4 (atmosphere) FX 5 (brightness) FX 6 (goblins) FX7 (echoes) FX 8 (sci-fi) Sitar Banjo Shamisen Koto Kalimba Bag pipe Fiddle Shanai Tinkle Bell Agogo Steel Drums 116 117 Percu 118 ssive 119 120 121 122 123 124 SFX 125 126 127 128 CCO 0 0 0 0 0 0 0 0 0 0 0 0 0 QS6400 Tone name Woodblock Taiko Drum Melodic Tom Synth Drum Reverse Cymbol Guitar Fret Noise Breath Noise Seashore Bird Tweet Telephone Ring Helicopter Applause Gunshot PC# : CC0 : 32/38 Advanced ADPCM SOUND DSP for Mobile QS6400 2) Percussion Map( Channel 10 PC#1 ) Note 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 PC#1:STANDARD Set Kick Drum 2/Jazz BD2 Kick Drum 1/Jazz BD1 Side Stick Snare Drum 1 Hand Clap Snare Drum 2 Low Tom 2 Closed Hi-hat [EXC1] Low Tom 1 Pedai Hi-hat [EXC1] Mid Tom 2 Open Hi-hat [EXC1] Mid Tom 1 High Tom 2 Cymbal 1 High Tom 1 Ride Cymbal 1 Chinese Cymbal Ride Bell Tambourine Splash Cymbal Cowbell Crash Cymbal 2 Vibra - slap Ride Cymbal 2 High Bongo Low Bongo Mute High Conga Open High Conga Low Conga High Timbale Low Conga 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 High Agogo Low Agogo Cabasa Maracas Short Hi Whistle [EXC2] Long Low Whistle [EXC2] Short Guiro [EXC3] Long Guiro [EXC3] Claves High Wood Block Low Wood Block Mute Cuica [EXC4] Open Cuica [EXC4] Mute Triangle [EXC5] Open Triangle [EXC5] - 33/38 Advanced ADPCM SOUND DSP for Mobile QS6400 Percussion Map( Channel 10 PC#2 ) Note 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 PC#2:ALTONICS Set Muted Ggwengary Ggwengary Jing Muted Jing Jang-goo Muted Jang-goo BUK Muted Jang-goo Kick Drum 2/Jazz BD2 Kick Drum 1/Jazz BD1 Side Stick Snare Drum 1 Hand Clap Snare Drum 2 Low Tom 2 Closed Hi-hat [EXC1] Low Tom 1 Pedai Hi-hat [EXC1] Mid Tom 2 Open Hi-hat [EXC1] Mid Tom 1 High Tom 2 Cymbal 1 High Tom 1 Ride Cymbal 1 Chinese Cymbal Ride Bell Tambourine Splash Cymbal Cowbell Crash Cymbal 2 Vibra - slap Ride Cymbal 2 High Bongo Low Bongo Mute High Conga Open High Conga Low Conga High Timbale Low Conga 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 High Agogo Low Agogo Cabasa Maracas Short Hi Whistle [EXC2] Long Low Whistle [EXC2] Short Guiro [EXC3] Long Guiro [EXC3] Claves High Wood Block Low Wood Block Mute Cuica [EXC4] Open Cuica [EXC4] Mute Triangle [EXC5] Open Triangle [EXC5] Muted Ggwengary Ggwengary Jing Muted Jing Jang-goo Muted Jang-goo BUK Muted Jang-goo 34/38 Advanced ADPCM SOUND DSP for Mobile QS6400 MIDI Implementation Chart Recognized Function Remarks Transmitted default X 1~16 Channel Changed X 1~16 Each Mode Default X Mode 1* X 21 ~108 Basic Note number Velocity ON X O Velocity OFF X O After Touch Key's X X After Touch Chn's X X X O 0,32 X O Bank Selection 1 X O Modulation 6,38 X O Data entry(100,101 Only) Pitch Bender Control Change Program System Common 7 X O Volume 10 X O Panpot 11 X O Expression 64 X O Sustain 66 X X Soft 67 X X Sustanuto 100,101 X O RPN LSB MSB(00,00 Only) 120 X O All sound off 121 X O Reset all controller 123 X O All note off Change X 0-127 Exclusive X X Song position X X Song selection X X Tune X X Mode 1* : Omni ON / Poly ON 35/38 Advanced ADPCM SOUND DSP for Mobile QS6400 Chapter 9 Outline Dimensions QFN40 36/38 Advanced ADPCM SOUND DSP for Mobile QS6400 Chapter 10 Marking - Part_number =QS6400 - Datecode = Year/Numbers of week ex) Production day = 2003/1/07 QS6400 "0302" History of Revision. Date 2003-03-31 Change of Contents Revision Number - Ver 1.0 2003-09-01 Revision the "Chapter 5-1 Register Table" - 2004-03-30 Added the "Chapter 5-1 Register Table and Detail" Ver 2.0 2004-12-16 Fixed formatting and typos. Ver 2.2 2005-06-15 Revised 4-1 Pin Rotation, 4-2 Pin Descriptions, 4-3 Detail Pin Descriptions, 9 Outline Dimensions Ver 2.3 2005-08-12 Added "Chapter 6-2 Application circuit" Ver 2.4 2007-04-25 Revised 9 Outline Dimensions (deleted obsolete QFP48 package) Ver 2.5 2009-03-30 Corrected revision history. Ver 2.6 37/38 38/38