TI SN54HC05

SN54HC05, SN74HC05
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS080B – MARCH 1984 – REVISED MAY 1997
D
SN54HC05 . . . J OR W PACKAGE
SN74HC05 . . . D OR N PACKAGE
(TOP VIEW)
Package Options Include Plastic
Small-Outline (D) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
1A
1Y
2A
2Y
3A
3Y
GND
description
These devices contain six independent inverters.
They perform the Boolean function Y = A in
positive logic. The open-drain outputs require
pullup resistors to perform correctly. They may be
connected to other open-drain outputs to
implement active-low wired-OR or active-high
wired-AND functions.
L
H
13
3
12
4
11
5
10
6
9
7
8
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
6Y
NC
5A
NC
5Y
3Y
GND
NC
4Y
4A
OUTPUT
Y
L
2
VCC
6A
6Y
5A
5Y
4A
4Y
1Y
1A
NC
VCC
6A
2A
NC
2Y
NC
3A
FUNCTION TABLE
(each inverter)
H
14
SN54HC05 . . . FK PACKAGE
(TOP VIEW)
The SN54HC05 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC05 is characterized for
operation from –40°C to 85°C.
INPUT
A
1
NC – No internal connection
logic symbol†
1A
2A
3A
4A
5A
6A
1
2
1
3
4
5
6
9
8
11
10
13
12
1Y
2Y
3Y
4Y
5Y
6Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
logic diagram (positive logic)
A
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN54HC05, SN74HC05
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS080B – MARCH 1984 – REVISED MAY 1997
absolute maximum ratings over operating free-air temperature range†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
recommended operating conditions
SN54HC05
VCC
Supply voltage
VIH
High-level input voltage
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
VIL
Low-level input voltage
VI
VO
Input voltage
Output voltage
tt
Input transition (rise and fall) time
TA
SN74HC05
MIN
NOM
MAX
MIN
NOM
MAX
2
5
6
2
5
6
1.5
1.5
3.15
3.15
4.2
4.2
0.5
0
0.5
0
1.35
0
1.35
0
1.8
0
1.8
0
0
0
VCC
VCC
0
VCC
VCC
VCC = 2 V
VCC = 4.5 V
0
1000
0
1000
0
500
0
500
VCC = 6 V
0
400
0
400
–55
125
–40
85
Operating free-air temperature
V
V
0
VCC = 4.5 V
VCC = 6 V
UNIT
V
V
V
ns
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
IOH
TEST CONDITIONS
VI = VIH or VIL,
VO = VCC
IOL = 20 µA
VOL
VI = VIH or VIL
IOL = 4 mA
IOL = 5.2 mA
II
ICC
Ci
2
VI = VCC or 0
VI = VCC or 0,
IO = 0
VCC
MIN
TA = 25°C
TYP
MAX
SN54HC05
SN74HC05
MIN
MIN
MAX
MAX
6V
0.01
0.5
10
5
UNIT
µA
2V
0.002
0.1
0.1
0.1
4.5 V
0.001
0.1
0.1
0.1
6V
0.001
0.1
0.1
0.1
4.5 V
0.17
0.26
0.4
0.33
6V
0.15
0.26
0.4
0.33
6V
±0.1
±100
±1000
±1000
nA
2
40
20
µA
10
10
10
pF
6V
2 V to 6 V
POST OFFICE BOX 655303
3
• DALLAS, TEXAS 75265
V
SN54HC05, SN74HC05
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS080B – MARCH 1984 – REVISED MAY 1997
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
FROM
(INPUT)
PARAMETER
tPLH
TO
(OUTPUT)
A
tPHL
Y
A
Y
tf
Y
VCC
MIN
TA = 25°C
TYP
MAX
SN54HC05
SN74HC05
MIN
MIN
MAX
MAX
2V
60
115
175
145
4.5 V
13
23
35
29
6V
10
20
30
25
2V
45
85
130
105
4.5 V
9
17
26
21
6V
8
14
22
18
2V
38
75
110
95
4.5 V
8
15
22
19
6V
6
13
19
16
UNIT
ns
ns
ns
operating characteristics, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance per inverter
No load
TYP
20
UNIT
pF
PARAMETER MEASUREMENT INFORMATION
VCC
RL = 1 kΩ
From Output
Under Test
VCC
Test
Point
Input
tPLH
In-Phase
Output
LOAD CIRCUIT
Input
50%
10%
90%
tr
50%
0V
CL = 50 pF
(see Note A)
90%
50%
90%
10%
tPHL
VCC
50%
10% 0 V
tPHL
Out-of-Phase
Output
90%
tf
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
tPLH
50%
10%
10%
VOH
50%
10% V
OL
tf
VOH
VOL
tf
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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• DALLAS, TEXAS 75265
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Copyright  1998, Texas Instruments Incorporated