SN54ACT32, SN74ACT32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCAS530A – AUGUST 1995 – REVISED MAY 1996 D SN54ACT32 . . . J OR W PACKAGE SN74ACT32 . . . D, DB, N, OR PW PACKAGE (TOP VIEW) Inputs Are TTL-Voltage Compatible EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic (N) and Ceramic (J) DIPS 1A 1B 1Y 2A 2B 2Y GND description The ’ACT32 are quadruple 2-input positive-OR gates. The devices perform the Boolean function Y = A + B or Y = A • B in positive logic. H X H X H H L L L 1A 1B 2A 2B 3A 3B 4A 4B 12 4 11 5 10 6 9 7 8 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4A NC 4Y NC 3B NC – No internal connection logic symbol† 1 3 VCC 4B 4A 4Y 3B 3A 3Y 2Y GND NC 3Y 3A B A 13 1B 1A NC VCC 1Y NC 2A NC 2B FUNCTION TABLE (EACH GATE) OUTPUT Y 14 2 SN54ACT32 . . . FK PACKAGE (TOP VIEW) The SN54ACT32 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74ACT32 is characterized for operation from –40°C to 85°C. INPUTS 1 4B D D logic diagram (positive logic) ≥1 3 2 1Y A Y B 4 6 5 2Y 9 8 10 3Y 12 11 13 4Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, DB, J, N, PW, and W packages. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. Copyright 1996, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ACT32, SN74ACT32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCAS530A – AUGUST 1995 – REVISED MAY 1996 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA Maximum power dissipation at TA = 55°C (in still air) (see Note 2): D package . . . . . . . . . . . . . . . . . . . 1.25 W DB package . . . . . . . . . . . . . . . . . . . 0.5 W N package . . . . . . . . . . . . . . . . . . . . 1.1 W PW package . . . . . . . . . . . . . . . . . . . 0.5 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils, except for the N package, which has a trace length of zero. recommended operating conditions (see Note 3) SN54ACT32 MAX MIN MAX 4.5 5.5 4.5 5.5 VCC VIH Supply voltage VIL VI Low-level input voltage Input voltage 0 VO IOH Output voltage 0 IOL ∆t/∆v Low-level output current High-level input voltage 2 2 0.8 High-level output current VCC VCC 0 0 –24 24 Input transition rise or fall rate TA Operating free-air temperature NOTE 3: Unused inputs must be held high or low to prevent them from floating. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 2 SN74ACT32 MIN POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT V V 0.8 V VCC VCC V –24 mA V 24 mA 0 8 0 8 ns/V –55 125 –40 85 °C SN54ACT32, SN74ACT32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCAS530A – AUGUST 1995 – REVISED MAY 1996 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –50 50 µA VOH 24 mA IOH = –24 IOH = –50 mA† IOH = –75 mA† SN54ACT32 4.5 V 4.4 4.4 5.5 V 5.4 5.4 5.4 4.5 V 3.86 3.7 3.76 5.5 V 4.86 4.7 4.76 MIN MAX IOL = 50 mA† IOL = 75 mA† MIN nICC‡ One input at 3.4 V, Other inputs at VCC or GND IO = 0 V 3.85 4.5 V 0.001 0.1 0.1 5.5 V 0.001 0.1 0.1 0.1 0.1 5.5 V 0.36 0.5 0.44 5.5 V 0.36 0.5 0.44 V 1.65 5.5 V VI = VCC or GND VI = VCC or GND, UNIT 3.86 5.5 V II ICC MAX 4.4 5.5 V IOL = 24 mA SN74ACT32 MIN 5.5 V IOL = 50 µA VOL TA = 25°C TYP MAX VCC 1.65 5.5 V ±0.1 ±1 ±1 µA 5.5 V 2 40 20 µA 1.6 1.5 mA 5.5 V 0.6 Ci VI = VCC or GND 5V 2.6 † Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms. ‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC. pF " switching characteristics over recommended operating free-air temperature range, VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A or B Y MIN TA = 25°C TYP MAX SN54ACT32 MIN MAX SN74ACT32 MIN MAX 1 6.5 9 1 10 1 6.5 9 1 10 UNIT ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance CL = 50 pF, f = 1 MHz TYP UNIT 40 pF PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54ACT32, SN74ACT32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCAS530A – AUGUST 1995 – REVISED MAY 1996 PARAMETER MEASUREMENT INFORMATION TEST S1 tPLH/tPHL Open From Output Under Test CL = 50 pF (see Note A) S1 Open 1.5 V 1.5 V 0V tPHL tPLH 2 × VCC 500 Ω 3V Input (see Note B) In-Phase Output 50% VCC tPLH tPHL 500 Ω Out-of-Phase Output LOAD CIRCUIT VOH 50% VCC VOL 50% VCC VOH 50% VCC VOL VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. 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