SN74AVCB324245 32-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES485A – AUGUST 2003 – REVISED MARCH 2005 • FEATURES • • • • • Member of the Texas Instruments Widebus+™ Family DOC™ Circuitry Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation Dynamic Drive Capability Is Equivalent to Standard Outputs With IOH and IOL of – ±24 mA at 3-V VCC – ±15 mA at 2.3-V VCC – ±9 mA at 1.65-V VCC – ±6 mA at 1.4-V VCC Control Inputs VIH/VIL Levels Are Referenced to VCCB Voltage If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State • • • • Inputs/Outputs Can Tolerate up to 4.6 V, Which Allows Mixed-Voltage-Mode Data Communications Ioff Supports Partial-Power-Down Mode Operation Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.4-V to 3.6-V Power-Supply Range Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) DESCRIPTION/ORDERING INFORMATION This 32-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. The SN74AVCB324245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated. The SN74AVCB324245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCB. To ensure the high-impedance state during power up or power down, OE shall be tied to VCCB through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND, both ports are in the high-impedance state. ORDERING INFORMATION PACKAGE (1) TA –40°C to 85°C (1) LFBGA – GKE LFBGA – ZKE (Pb-free) ORDERABLE PART NUMBER Tape and reel SN74AVCB324245KR 74AVCB324245ZKER TOP-SIDE MARKING WD4245 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus+, DOC are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2005, Texas Instruments Incorporated SN74AVCB324245 32-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES485A – AUGUST 2003 – REVISED MARCH 2005 GKE OR ZKE PACKAGE (TOP VIEW) 1 2 3 4 5 6 A B C D E F G H J K L M N P R T TERMINAL ASSIGNMENTS 1 2 3 4 5 6 A 1B2 1B1 1DIR 1OE 1A1 1A2 B 1B4 1B3 GND GND 1A3 1A4 C 1B6 1B5 VCCB VCCA 1A5 1A6 D 1B8 1B7 GND GND 1A7 1A8 E 2B2 2B1 GND GND 2A1 2A2 F 2B4 2B3 VCCB VCCA 2A3 2A4 G 2B6 2B5 GND GND 2A5 2A6 H 2B7 2B8 2DIR 2OE 2A8 2A7 J 3B2 3B1 3DIR 3OE 3A1 3A2 K 3B4 3B3 GND GND 3A3 3A4 L 3B6 3B5 VCCB VCCA 3A5 3A6 M 3B8 3B7 GND GND 3A7 3A8 N 4B2 4B1 GND GND 4A1 4A2 P 4B4 4B3 VCCB VCCA 4A3 4A4 R 4B6 4B5 GND GND 4A5 4A6 T 4B7 4B8 4DIR 4OE 4A8 4A7 FUNCTION TABLE (EACH 8-BIT SECTION) INPUTS 2 OPERATION OE DIR L L B data to A bus L H A data to B bus H X Isolation www.ti.com SN74AVCB324245 32-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES485A – AUGUST 2003 – REVISED MARCH 2005 LOGIC DIAGRAM (POSITIVE LOGIC) 1DIR A3 2DIR A4 1A1 H4 1OE A5 2A1 A2 H3 E5 E2 1B1 To Seven Other Channels 3DIR J3 4DIR T4 4A1 J2 T3 3OE J5 To Seven Other Channels 2B1 To Seven Other Channels J4 3A1 2OE 4OE N5 N2 3B1 4B1 To Seven Other Channels 3 SN74AVCB324245 32-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES485A – AUGUST 2003 – REVISED MARCH 2005 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCCA, VCCB Supply voltage range VI Input voltage range (2) MIN MAX –0.5 4.6 I/O ports (A port) –0.5 4.6 I/O ports (B port) –0.5 4.6 Control inputs –0.5 4.6 A port –0.5 4.6 B port –0.5 4.6 A port –0.5 VCCA + 0.5 B port –0.5 VCCB + 0.5 UNIT V V VO Voltage range applied to any output in the high-impedance or power-off state (2) VO Voltage range applied to any output in the high or low state (2) (3) IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 Continuous current through each VCCA, VCCB, or GND θJA Package thermal impedance (4) Tstg Storage temperature range (1) (2) (3) (4) 4 GKE/ZKE package –65 V V mA 40 °C/W 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed. The package thermal impedance is calculated in accordance with JESD 51-7. www.ti.com SN74AVCB324245 32-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES485A – AUGUST 2003 – REVISED MARCH 2005 Recommended Operating Conditions (1) (2) (3) VCCI VCCO MIN MAX UNIT VCCA Supply voltage 1.4 3.6 V VCCB Supply voltage 1.4 3.6 V 1.4 V to 1.95 V VCCI × 0.65 3.6 1.95 V to 2.7 V 1.7 3.6 2.7 V to 3.6 V 2 3.6 1.4 V to 1.95 V 0 VCCI × 0.35 1.95 V to 2.7 V 0 0.7 2.7 V to 3.6 V 0 0.8 1.4 V to 1.95 V VCCB × 0.65 VCCB 1.95 V to 2.7 V 1.7 VCCB VIH High-level input voltage VIL Low-level input voltage VIH High-level input voltage VIL Low-level input voltage VO Output voltage IOH Data inputs Data inputs Control inputs (referenced to VCCB) Control inputs (referenced to VCCB) High-level output current IOL Low-level output current ∆t/∆v Input transition rise or fall rate TA Operating free-air temperature (1) (2) (3) 2.7 V to 3.6 V 2 VCCB 1.4 V to 1.95 V 0 VCCB × 0.35 1.95 V to 2.7 V 0 0.7 2.7 V to 3.6 V 0 0.8 0 VCCO 1.4 V to 1.6 V –2 1.65 V to 1.95 V –4 2.3 V to 2.7 V –8 3 V to 3.6 V –12 1.4 V to 1.6 V 2 1.65 V to 1.95 V 4 2.3 V to 2.7 V 8 3 V to 3.6 V 12 –40 V V V V V mA mA 5 ns/V 85 °C VCCI is the VCC associated with the data input port. VCCO is the VCC associated with the output port. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 5 SN74AVCB324245 32-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES485A – AUGUST 2003 – REVISED MARCH 2005 Electrical Characteristics (1) (2) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOH VOL VOH VOL II Control inputs A port Ioff B port A or B ports IOZ (4) B port A port ICCA TEST CONDITIONS VCCB MIN TYP (3) MAX IOH = –100 µA VI = VIH 1.4 V to 3.6 V 1.4 V to 3.6 V IOH = –2 mA VI = VIH 1.4 V 1.4 V IOH = –4 mA VI = VIH 1.65 V 1.65 V 1.2 IOH = –8 mA VI = VIH 2.3 V 2.3 V 1.75 IOH = –12 mA VI = VIH 3V 3V 2.3 IOH = 100 µA VI = VIL 1.4 V to 3.6 V 1.4 V to 3.6 V 0.2 IOH = 2 mA VI = VIL 1.4 V 1.4 V 0.35 IOH = 4 mA VI = VIL 1.65 V 1.65 V 0.45 IOH = 8 mA VI = VIL 2.3 V 2.3 V 0.55 IOH = 12 mA VI = VIL 3V 3V IOHD = –6 mA VI = VIH 1.4 V 1.4 V 1.05 IOHD = –9 mA VI = VIH 1.65 V 1.65 V 1.2 IOHD = –15 mA VI = VIH 2.3 V 2.3 V 1.75 IOHD = –24 mA VI = VIH 3V 3V 2.3 IOHD = 6 mA VI = VIL 1.4 V 1.4 V 0.35 IOHD = 9 mA VI = VIL 1.65 V 1.65 V 0.45 IOHD = 15 mA VI = VIL 2.3 V 2.3 V 0.55 IOHD = 24 mA VI = VIL 3V 3V 0.7 1.4 V to 3.6 V 3.6 V ±2.5 0V 0 to 3.6 V ±10 0 to 3.6 V 0V ±10 3.6 V 3.6 V ±12.5 VI = VCCB or GND VI or VO = 0 to 3.6 V OE = VIH VO = VCCO or GND, OE = don't VI = VCCI or GND care VI = VCCI or GND, ICCB VCCA VI = VCCI or GND, IO = 0 IO = 0 UNIT VCCO – 0.2 1.05 V V 0.7 V 0V 3.6 V ±12.5 3.6 V 0V ±12.5 1.6 V 1.6 V 40 1.95 V 1.95 V 40 2.7 V 2.7 V 60 0V 3.6 V –80 3.6 V 0V 80 3.6 V 3.6 V 80 1.6 V 1.6 V 40 1.95 V 1.95 V 40 2.7 V 2.7 V 60 0V 3.6 V 80 3.6 V 0V –80 V µA µA µA µA µA 3.6 V 3.6 V Ci Control inputs VI = 3.3 V or GND 3.3 V 3.3 V 4 pF Cio A or B ports VO = 3.3 V or GND 3.3 V 3.3 V 5 pF (1) (2) (3) (4) 6 VCCI is the VCC associated with the input port. VCCO is the VCC associated with the output port. All typical values are at TA = 25°C. For I/O ports, the parameter IOZ includes the input leakage current. 80 SN74AVCB324245 32-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES485A – AUGUST 2003 – REVISED MARCH 2005 Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 2) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A B ten OE tdis OE VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V MIN MAX MIN MAX MIN MAX MIN MAX B 1.7 6.7 1.9 6.4 1.8 5.5 1.5 5.8 A 1.8 6.8 1.7 6.2 1.6 5.9 1.5 5.9 A 2.1 9 2.9 9.8 3.2 10 3 9.8 B 2.5 8.4 2.4 8 2.3 7.6 2.2 7.5 A 2.1 7.1 2.3 6.4 1.7 5.1 1.6 4.8 B 2.2 6.9 1.8 6.4 1.1 5.8 1.8 5.7 UNIT ns ns ns Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 2) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A B ten OE tdis OE VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V MIN MAX MIN MAX MIN MAX MIN MAX B 1.7 6.4 1.8 6 1.7 4.7 1.6 4.3 A 2 6.6 1.8 6 1.8 5.6 1.8 5.5 A 1.8 7.6 2.6 7.7 2.6 7.6 2.6 7.4 B 2.5 8.2 2.5 7.5 2.4 7.4 2.3 7.2 A 1.8 7 2.5 6.3 1.8 4.7 1.7 4.4 B 2.5 6.7 2.3 6.1 2.2 5.5 1.3 5.3 UNIT ns ns ns Switching Characteristics over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 2) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A B B A ten OE tdis OE VCCB = 1.5 V ± 0.1 V MIN VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V MAX MIN MAX MIN MAX MIN MAX 1.6 6 1.8 5.6 1.5 4 1.5 3.4 1.7 5.4 1.7 4.6 1.5 4 1.5 3.7 A 1.7 5.7 2.2 5.5 2.2 5.3 2.2 5.1 B 3.1 6.1 2.5 5.6 2.2 5.3 1.9 4.2 A 1.2 5.8 1.9 5 1.4 3.6 1.3 3.3 B 2.4 6 3 5.2 1.4 3.6 1.2 3 UNIT ns ns ns Switching Characteristics over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 2) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A B ten OE tdis OE VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V MIN MAX MIN MAX MIN MAX MIN MAX B 1.5 5.9 1.7 5.4 1.5 3.7 1.4 3.1 A 1.5 5.8 1.5 4.2 1.5 3.3 1.4 3.1 A 1.6 4.9 2 4.5 2 4.3 1.9 4.1 B 2 5.1 2 4.6 2.2 5.2 1.9 4.1 A 1.3 6.9 2.1 5.5 1.6 3.8 1.5 3.5 B 2.3 5.5 1.9 4.5 1.3 3.5 1.2 3.5 UNIT ns ns ns 7 SN74AVCB324245 32-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES485A – AUGUST 2003 – REVISED MARCH 2005 Operating Characteristics VCCA and VCCB = 3.3 V, TA = 25°C PARAMETER CpdA (VCCA) CpdB (VCCB) 8 Power-dissipation capacitance per transceiver, A-port input, B-port output TEST CONDITIONS Outputs enabled Outputs disabled TYP CL = 0, f = 10 MHz 7 Power-dissipation capacitance per transceiver, B-port input, A-port output Outputs enabled Outputs disabled 7 Power-dissipation capacitance per transceiver, A-port input, B-port output Outputs enabled 20 Power-dissipation capacitance per transceiver, B-port input, A-port output Outputs enabled Outputs disabled Outputs disabled UNIT 14 CL = 0, f = 10 MHz 20 7 14 7 pF pF SN74AVCB324245 32-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES485A – AUGUST 2003 – REVISED MARCH 2005 Output Description The dynamic output control (DOC™) circuitry is implemented, which, during the transition, initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry Technology and Applications, literature number SCEA009. 3.2 TA = 25°C Process = Nominal - Output Voltage - V 2.8 2.4 VCC = 3.3 V 2.0 1.6 VCC = 2.5 V 1.2 OH VCC = 1.8 V 0.8 V VOL - Output Voltage - V 2.8 TA = 25°C Process = Nominal 2.4 2.0 1.6 1.2 0.8 VCC = 3.3 V 0.4 0.4 0 17 34 51 68 85 102 119 IOL - Output Current - mA 136 153 170 VCC = 2.5 V VCC = 1.8 V -160 -144 -128 -112 -96 -80 -64 -48 IOH - Output Current - mA -32 -16 0 Figure 1. Typical Output Voltage vs Output Current 9 SN74AVCB324245 32-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES485A – AUGUST 2003 – REVISED MARCH 2005 PARAMETER MEASUREMENT INFORMATION 2 × VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO CL RL VTP 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 15 pF 30 pF 30 pF 30 pF 2 kΩ 1 kΩ 500 Ω 500 Ω 0.1 V 0.15 V 0.15 V 0.3 V VCCI/2 0V VOLTAGE WAVEFORMS PULSE DURATION VCCB Output Control (low-level enabling) VCCB/2 VCCB/2 0V tPZL VCCI Input VCCI/2 VCCI/2 0V tPLH Output tPHL VCCO/2 VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOH VCCO/2 VOL tPLZ VCCO Output Waveform 1 S1 at 2 × VCCO (see Note B) VCCO/2 VOL + VTP VOL tPZH Output Waveform 2 S1 at GND (see Note B) tPHZ VCCO/2 VOH − VTP VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns, dv/dt ≥1 V/ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. VCCI is the VCC associated with the input port. I. VCCO is the VCC associated with the output port. Figure 2. Load Circuit and Voltage Waveforms 10 PACKAGE OPTION ADDENDUM www.ti.com 18-Jul-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty 74AVCB324245ZKER ACTIVE LFBGA ZKE 96 1000 Green (RoHS & no Sb/Br) SN74AVCB324245KR ACTIVE LFBGA GKE 96 1000 TBD Lead/Ball Finish MSL Peak Temp (3) SNAGCU Level-3-250C-168 HR SNPB Level-3-220C-168 HR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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