COMCHIP CSRV065V0P_12

Low Capacitance ESD Protection Array
CSRV065V0P
RoHs Device
Features
SC70-6L(SOT-363)
-ESD Protect for 4 high-speed I/O channels.
-IEC61000-4-2 (ESD)±14kV(Contact),±18kV(Air).
0.087(2.20)
0.079(2.00)
-IEC61000-4-4 (FET)20A for I/O,80A for Power.
-Working voltage: 5V
0.053(1.35)
0.045(1.15)
-Low capacitance:1.3pF(Typ.).
-High component density.
0.055(1.40)
Mechanical data
0.047(1.20)
-Case: SC70-6L(SOT-363) standard package,
molded plastic.
0.039(1.00)
0.035(0.90)
-Terminals: Solder plated, solderable per
MIL-STD-750,method 2026.
0.014(0.35)
0.006(0.15)
-Mounting position: Any
-Weight: 0.0091 gram(approx.).
Circuit Diagram
0.004(0.10)max
0.006(0.15)
0.003(0.08)
0.096(2.45)
0.085(2.15)
5
1
3
4
6
0.010(0.26)min.
2
Dimensions in inches and (millimeters)
Pin Configuration
6
5
4
1
2
3
Maximum Ratings (at TA=25°C unless otherwise noted)
Symbol
Value
Unit
Peak pulse current ( tp = 8/20 us)
IPP
6.5
A
Operating supply voltage
VDC
6
V
ESD per IEC 61000-4-2(Air)
ESD per IEC 61000-4-2(Contact)
ESD
18
14
kV
ESD_VDD
30
kV
TSOL
260 ( 10 sec)
°C
Tj
-55 to +85
°C
TSTG
-55 to +125
°C
VIO
(GND -0.5) to (VDD +0.5)
V
Parameter
ESD per IEC 61000-4-2(Air)(VDD-GND)
ESD per IEC 61000-4-2(Contact)(VDD-GND)
Lead soldering temperature
Operating temperature
Storage temperature
DC voltage at any I/O pin
REV:C
Page 1
QW-BP010
Comchip Technology CO., LTD.
Low Capacitance ESD Protection Array
Electrical Characteristics (at TA=25°C unless otherwise noted)
Parameter
Reverse stand-Off voltage
Conditions
Pin 5 to Pin 2
Symbol Min Typ Max Unit
5
VRWM
5
VRWM = 5 V, Pin 5 to Pin 2
Reverse leakage current
uA
IR
1
VPIN 5 = 5 V, VPIN 2 =0V ,VIO = 0~5V
Diode breakdown voltage
IR = 1 mA, Pin 5 to Pin 2
VBD
Forward voltage
IF = 15 mA, Pin 2 to Pin 5
VF
IPP = 5 A, tp=8/20us,
Any Channel Pin to Ground
Clamping voltage
IEC 61000-4-2 +6kV,Contact mode
Any Channel Pin to Ground
VC
IEC 61000-4-2 +6kV,Contact moed
VDD Pin to Ground
Vpin5 = 5V,Vpin2= 0V, VIO=2.5V
f = 1MHz,Between Channel Pins
Vpin5 = 5V,Vpin2= 0V, VIN=2.5V
f = 1MHz,Channel_x pin to ground channel_y pin to ground
6
9
V
0.8
1
V
8.1
9
V
12.5
9
Vpin5 = 5V,Vpin2= 0V, VIO=2.5V,
f = 1MHz,Any Channel Pin to Ground
Junction capacitance
V
Cj
1.3
1.6
0.12
0.14
0.05
0.07
pF
REV:C
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QW-BP010
Comchip Technology CO., LTD.
Low Capacitance ESD Protection Array
RATING AND CHARACTERISTIC CURVES (CSRV065V0P)
Fig. 1 - Power derating curve
Fig. 2 - Clamping voltage vs.
Peak pulse current
12
110
10
Clamping voltage ( V )
11
90
% of Rated power or IPP
100
80
70
60
50
40
30
9
8
7
6
5
Waveform
Parameters:
tr=8us
td=20us
4
I/O pin to GND PIN
3
20
2
10
1
0
0
0
25
50
75
100
125
150
4.5
5.0
5.5
6.0
6.5
7.0
7.5
Peak pulse current (A)
Ambient temperature (°C)
Fig.3 - Forward voltage v.s.
forward current
Fig.4 - Typical variation of CIN v.s. VIN
2.0
4.0
1.8
3.5
1.6
Input capacitance(pF)
Forward voltage (V)
3.0
2.5
2.0
Waveform
Parameters:
tr=8us
td=20us
1.5
I/O pin to GND PIN
1.0
1.4
1.2
1.0
0.8
0.6
0.2
0
0.0
4.5
5.0
5.5
6.0
6.5
7.0
VDD =5V,GND =0V,f =1MHz,TA=25°C
0.4
0.5
7.5
0
1
Peak pulse current(A)
1.30
1.25
1.20
1.15
VDD =5V,GND =0V,VIN =2.5V f=1MHz
1.10
1.05
1.00
20
40
60
80
Temperature (°C)
100
120
Transmission line pulsing(TLP)current(A)
Input capacitance(pF)
1.40
1.35
4
5
Fig.7 -Transmission line pulsing
(TLP) measurement
Fig. 6 - Transmission line pulsing
(TLP) measurement
Transmission line pulsing(TLP)current(A)
1.45
3
Input voltage (V)
Fig. 5 - Typical variation of CIN v.s.
temperature
1.50
2
18
16
14
V_pulse
Pulse from a
transmission line
12
100ns
10
TLP_I
+
TLP_V
DUT
8
6
I/O to GND
4
2
0
0
1
2
3
4
5
6
7
8
Transmission line pulsing(TLP)voltage(V)
18
16
14
V_pulse
12
Pulse from a
transmission line
10
100ns
TLP_I
+
TLP_V
8
DUT
-
6
4
VDD to GND
2
0
0
1
2
3
4
5
6
7
REV:C
Page 3
QW-BP010
Comchip Technology CO., LTD.
8
9
10
Transmission line pulsing(TLP)voltage(V)
Low Capacitance ESD Protection Array
Reel Taping Specification
d
P0
P1
Index hole
T
E
F
W
B
C
P
A
12
o
0
D2
D1 D
W1
Trailer
.......
.......
End
Device
.......
.......
Leader
.......
.......
.......
.......
10 pitches (min)
Start
10 pitches (min)
Direction of Feed
SC70-6L
(SOT-363)
SC70-6L
(SOT-363)
SYMBOL
A
B
C
d
D
D1
D2
(mm)
2.20 ± 0.10
2.40 ± 0.10
1.35 ± 0.10
1.55 ± 0.10
178 ± 1
50.0 MIN.
13.0 ± 0.20
(inch)
0.087 ± 0.004
0.094 ± 0.004
0.053 ± 0.004
0.061 ± 0.004
7.008 ± 0.040
1.969 MIN.
0.512 ± 0.008
SYMBOL
E
F
P
P0
P1
W
W1
(mm)
1.75 ± 0.10
3.50 ± 0.05
4.00 ± 0.10
4.00 ± 0.10
2.00 ± 0.05
8.00 ± 0.30
14.4 MAX.
(inch)
0.069 ± 0.004
0.138 ± 0.002
0.157 ± 0.004
0.157 ± 0.004
0.079 ± 0.002
0.315 ± 0.012
0.567 MAX
REV:C
Page 4
QW-BP010
Comchip Technology CO., LTD.
Low Capacitance ESD Protection Array
Marking Code
6
Part Number
Marking Code
CSRV065V0P
C05XY
5
4
. C05XY
1
2
3
C05 = Device code
X = Date Code
Y = Control Code
Suggested PAD Layout
C
SC70-6L(SOT-363)
SIZE
A
(mm)
(inch)
0.80
0.031
A
D
B
0.35
0.014
C
1.30
0.051
D
1.94
0.076
E
2.74
0.108
E
B
Standard Packaging
REEL PACK
Case Type
SC70-6L
(SOT-363)
REEL
Reel Size
( pcs )
(inch)
3,000
7
REV:C
Page 5
QW-BP010
Comchip Technology CO., LTD.