FUJITSU MICROELECTRONICS DATA SHEET DS07-16907-2E 32-bit Microcontrollers CMOS FR80 MB91610 Series MB91F610A/613 ■ DESCRIPTION The MB91610 series is a line of Fujitsu Microelectronics microcontrollers based on a 32-bit RISC CPU core that feature a variety of peripheral functions for embedded applications that demand high-performance and high-speed CPU processing. This series is based on the FR80* family CPU and is implemented as a single chip. * : FR, the abbreviation of FUJITSU RISC controller, is a line of products of Fujitsu Microelectronics Limited. ■ FEATURES • FR80 CPU • 32-bit RISC, load/store architecture, five-stage pipeline • General-purpose registers : 32-bit × 16 • 16-bit fixed-length instructions (basic instructions) : 1 instruction per cycle • Instructions suitable for embedded applications - Memory-to-memory transfer, bit processing, barrel shift instructions, etc. - Instruction support for high level languages Function entry and exit instructions, instructions for register multi-load and multi-store - Bit search instruction “1” detection, “0” detection, transition point detection - Branch instructions with delay slots Reduced overhead when processing branches - Register interlock functions Facilitate coding in assembly language (Continued) For the information for microcontroller supports, see the following web site. This web site includes the "Customer Design Review Supplement" which provides the latest cautions on system development and the minimal requirements to be checked to prevent problems before the system development. http://edevice.fujitsu.com/micom/en-support/ Copyright©2008-2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved 2009.8 MB91610 Series - Built-in multiplier/instruction-level support - Signed 32-bit multiplication : 5 cycles - Signed 16-bit multiplication : 3 cycles - Interrupts (save PC and PS) : 6 cycles, 16 priority levels - Harvard architecture allowing program access and data access to be executed simultaneously - Instruction prefetch function has been added with 4 word instruction queue of CPU • Instruction compatible with FR family CPU - Additional bit search instructions - No resource instructions and coprocessor instructions • Maximum operating frequency • CPU : 33 MHz • Resources : 33 MHz • DMA controller (DMAC) • 8 channels • Address space : 32 bits (4 Gbytes) • Transfer modes : Block transfer/burst transfer/demand transfer • Address update : Increment/decrement/fixed (increment/decrement step size of 1, 2, or 4) • Transfer data length : Selectable from 8-bit, 16-bit, 32-bit • Block size : 1 to 16 • Number of transfers : 1 to 65535 • Transfer requests - Requests from software - Interrupt requests from peripheral resources (interrupt requests are shared, including external interrupts) • Reload functions : Reload can be specified on all channels • Priority order : Fixed (ch.0 > ch.1 > ch.2 > ch.3 > ...) or round-robin • Interrupt requests : Interrupts can be generated for transfer complete, transfer error, and transfer interrupted. • Multifunction serial interface • 4 channels with 16-byte FIFO, 4 channels without FIFO • Operation mode is selectable from UART/CSIO/I2C for each channel (For ch.0, I2C is not available.) • UART - Full-duplex double buffer - Selectable parity on/off - Built-in dedicated baud rate generator - External clock can be used as a serial clock - Error detection function for parity, frame and overrun errors • CSIO - Full-duplex double buffer - Built-in dedicated baud rate generator - Overrun error detection function • I2C - Supports both standard mode (Max 100 kbps) and Fast mode (Max 400 kbps) - Some channels are 5 V tolerant (Continued) 2 DS07-16907-2E MB91610 Series • Interrupts • Total of 16 external interrupts (some pins are 5 V tolerant) • Interrupts from peripheral resources • Programmable interrupt levels (16 levels) • Can be used to return from stop mode, sleep mode • A/D converter • 8 channels, 1 unit • 10-bit resolution • Conversion time : approx. 1.2 μs (PCLK = 33 MHz) • Priority conversion (2 levels) • Conversion modes : Single-shot conversion mode, scan conversion mode • Activation sources : Software, external trigger, base timer • Built-in FIFO for storing conversion data (for scan conversion:16, for priority conversion:4) • Base timer • 8 channels • Operation mode is selectable from the followings for each channel - 16/32-bit reload timer - 16-bit PWM timer - 16/32-bit PWC timer - 16-bit PPG timer • Cascading connection between 2 channels allows them to be used as one 32-bit timer • Multiple channels can be started simultaneously • Input/output select function • 16-bit reload timer • 3 channels (including 1 channel for REALOS) • Interval timer function • Count clock select function (peripheral clock (PCLK) divided by 2 to 64) • Compare timer • 32-bit input capture : 4 channels • 32-bit output compare : 4 channels • 32-bit free-run timer : 1 channel • Other interval timers • Watch counter : 1 channel • Watchdog timer : 2 channels - Watchdog timer 0 - After resetting this device, the watchdog timer becomes active when an arbitrary value is written to the WDTCPR0 register. - The cycle of the watchdog timer 0 can be selected from the peripheral clock (PCLK) × (29 to 224). - Watchdog timer 1 - After releasing the reset of this device, it counts with the CPU clock (CCLK). - Disable/ enable of the counter operation can be controlled by HWDE pin. - The cycle of the watchdog timer 1 is CCLK × 223 cycle fixed. (Continued) DS07-16907-2E 3 MB91610 Series • USB function / HOST • 1 channel • Supports Full-Speed only • The USB function and USB HOST are the switch types (USB I/O multiplexed) • Support of DMA transfer • USB Function - Support of up to six endpoints - Endpoint 0 is provided for the fixed use of control transfers - Bulk or interrupt transfer can be selected for endpoint 1 to 5 - Double buffer structure for endpoint 1 to 5 • USB HOST - Support control transfer, bulk transfer, interrupt transfer, and isochronous transfer - Automatic detection of connection/disconnection of USB devices - Automatic processing of a handshake packet for IN/OUT token processing - Support of a maximum packet length of up to 256 bytes - Support for a wakeup function • HDMI-CEC/Remote Control Reception • 1 channel • HDMI-CEC reception function (with automatic ACK response function) • Remote control reception function (built-in 4-byte receive buffer) • OSDC function • 16 bits RGB (256 colors available among 65536 colors) • Analog RGB output : Max 50 MHz Digital RGB output : Max 75 MHz • A font in 32 × 32 dots can be displayed up to 60 × 32 • Two-layered display of MAIN/SUB • 16384 characters at the maximum • Equipped with one PLL for dot clock generation • Main timer • 1 channel • Counts the oscillation stabilization wait time of the main clock (MCLK) • Counts the oscillation stabilization wait time of the PLL clock (PLLCLK) • Can be used as an interval timer while the main clock (MCLK) oscillations is stable • Sub timer • 1 channel • Counts the oscillation stabilization wait time of the sub clock (SBCLK) • Can be used as an interval timer while the sub clock (SBCLK) oscillations is stable • Clock generation • Main clock (MCLK) oscillator • Sub clock (SBCLK) oscillator • PLL clock (PLLCLK) oscillator (Continued) 4 DS07-16907-2E MB91610 Series (Continued) • Low-power dissipation mode • Stop mode • Watch mode • Sleep mode • Doze mode • Clock division function • Other features • I/O port • INIT pin is provided as a reset pin • Watchdog timer reset, software reset • Delay interrupt • Power supply - Single power supply (3.0 V to 3.6 V) DS07-16907-2E 5 MB91610 Series ■ PRODUCT LINEUP Product Name MB91F610A MB91613 Flash memory product MASK ROM product 512 Kbytes (Flash) 512 Kbytes (ROM) Items Product type Built-in program memory capacity Built-in RAM capacity 32 Kbytes DMA controller (DMAC) 8 channels Base timer 8 channels Without FIFO : 4 channels (ch.0 to ch.3) With FIFO : 4 channels (ch.8 to ch.11) Multifunction serial interface External interrupt 16 channels 10-bit A/D converter 8 channels (1 unit) 16-bit reload timer 3 channels Compare timer 32-bit input capture : 4 channels 32-bit output compare : 4 channels 32-bit free-run timer : 1 channel Watch counter 1 channel I/O port 50 (Max) USB function / HOST 1 channel HDMI-CEC/Remote control reception 1 channel OSDC Font FLASH : 16384 characters Font ROM : 7168 characters Main timer 1 channel Sub timer 1 channel Wild register 16 channels Debug function ⎯ DSU4 ■ PACKAGES Product name MB91F610A MB91613 Package FPT-120P-M21 : Supported Note: Refer to “■ PACKAGE DIMENSIONS” for detailed information on each package. 6 DS07-16907-2E MB91610 Series ■ PIN ASSIGNMENT VSS P27/OUT3 P26/SCK9/OUT2 P25/SIN9/OUT1 P24/SOUT9/OUT0 P23/RCIN_1 P22/SCK8 P21/SIN8 P20/SOUT8 P17/TIOB7/INT7 P16/TIOA7/SCK3/INT6 P15/TIOB6/SIN3/INT5 P14/TIOA6/SOUT3/INT4 P13/TIOB5/INT3 P12/TIOA5/SCK2/INT2 P11/TIOB4/SIN2/INT1 P10/TIOA4/SOUT2/INT0 P07/TIOB3 P06/TIOA3/SCK1 P05/TIOB2/SIN1 P04/TIOA2/SOUT1 P03/TIOB1/IN3 P02/TIOA1/SCK0_1/IN2 P01/TIOB0/SIN0_1/IN1 P00/TIOA0/SOUT0_1/IN0 ICD3* ICD2* ICD1* ICD0* C 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 53 54 55 56 ROUT GOUT BOUT VCC 60 52 VRO C 51 VREF 59 50 VSSD VDDD VSS 49 58 48 CPO 57 47 VCI UDP 46 VDDP UDM 45 40 VOB VSSP 39 VOA2 44 38 VOA1 HSYNC 37 VOA0 43 36 B4 VSYNC 35 B3 42 34 B2 DCKI 33 41 32 B1 DCKO 31 B0 LQFP-120 VSS VCC P30/SOUT10/INT8 P31/SIN10/INT9 P32/SCK10/INT10 P33/INT11 P34/SOUT11/INT12 P35/SIN11/INT13 P36/SCK11/INT14 P37/INT15 P50 P51 P52 P53 P54/RCIN P55/ADTRG P56/FRCK P57 VSS R0 R1 R2 R3 R4 G0 G1 G2 G3 G4 G5 VCC 120 (TOP VIEW) VSS VCC ICS2* ICS1* ICS0* IBREAK* ICLK* TRST* AVRH AVSS AVCC P77/AN7/SCK0/TMI2 P76/AN6/SIN0/TMI1 P75/AN5/SOUT0/TMI0 P74/AN4/TMO2 P73/AN3/TMO1/OUT3_1 P72/AN2/TMO0/OUT2_1 P71/AN1/OUT1_1 P70/AN0/OUT0_1 INIT MD0 MD1 X0 X1 VSS PK0/X1A PK1/X0A HWDE VCC VSS (FPT-120P-M21) * : N.C. pin for MB91613. Note : The number after the underscore (“_”) in pin names such as XXX_1 and XXX_2 indicates the port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. DS07-16907-2E 7 MB91610 Series ■ PIN DESCRIPTION The number after the underscore (“_”) in pin names such as XXX_1 and XXX_2 indicates the port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. I/O circuit Pin no. Pin name Function type* 1 VCC ⎯ P30 2 3 4 SOUT10 (SDA10) General-purpose I/O port C 7 8 P31 General-purpose I/O port SIN10 C Multifunction serial ch.10 input INT9 External interrupt 9 input P32 General-purpose I/O port SCK10 (SCL10) C P33 INT11 SOUT11 (SDA11) Multifunction serial ch.10 clock [operation modes 0 to 2] I2C ch.10 serial clock line [operation mode 4] External interrupt 10 input C General-purpose I/O port External interrupt 11 input General-purpose I/O port C Multifunction serial ch.11 output [operation modes 0 to 2] I2C ch.11 serial data line [operation mode 4] INT12 External interrupt 12 input P35 General-purpose I/O port SIN11 C Multifunction serial ch.11 input INT13 External interrupt 13 input P36 General-purpose I/O port SCK11 (SCL11) C INT14 9 I2C ch.10 serial data line [operation mode 4] External interrupt 8 input P34 6 Multifunction serial ch.10 output [operation modes 0 to 2] INT8 INT10 5 3.3 V power supply P37 INT15 Multifunction serial ch.11 clock [operation modes 0 to 2] I2C ch.11 serial clock line [operation mode 4] External interrupt 14 input C General-purpose I/O port External interrupt 15 input 10 P50 B General-purpose I/O port 11 P51 B General-purpose I/O port (Continued) 8 DS07-16907-2E MB91610 Series Pin no. Pin name I/O circuit type* 12 P52 B General-purpose I/O port 13 P53 B General-purpose I/O port P54 14 15 RCIN P55 ADTRG 16 P56 FRCK B B B Function General-purpose I/O port Remote control I/O General-purpose I/O port A/D converter external trigger input General-purpose I/O port Free-run timer clock input 17 P57 B General-purpose I/O port 18 VSS ⎯ GND 19 R0 H RGB digital output 20 R1 H RGB digital output 21 R2 H RGB digital output 22 R3 H RGB digital output 23 R4 H RGB digital output 24 G0 H RGB digital output 25 G1 H RGB digital output 26 G2 H RGB digital output 27 G3 H RGB digital output 28 G4 H RGB digital output 29 G5 H RGB digital output 30 VCC ⎯ 3.3V power supply 31 VSS ⎯ GND 32 B0 H RGB digital output 33 B1 H RGB digital output 34 B2 H RGB digital output 35 B3 H RGB digital output 36 B4 H RGB digital output 37 VOA0 H Alpha blend output 38 VOA1 H Alpha blend output 39 VOA2 H Alpha blend output (Continued) DS07-16907-2E 9 MB91610 Series Pin no. Pin name I/O circuit type* 40 VOB H OSD display period output 41 DCKO H Dot clock output 42 DCKI F Dot clock input 43 VSYNC F Vertical synchronous input 44 HSYNC F Horizontal synchronous input 45 VSSP ⎯ Dot clock PLL ground 46 VDDP ⎯ Dot clock PLL power supply 47 VCI ⎯ VCO control voltage input 48 CPO M Charge pump output 49 VSSD ⎯ RGB analog output GND 50 VDDD ⎯ RGB analog output power supply 51 VREF M RGB analog output reference power supply 52 VRO M RGB analog output resistance connected pin 53 ROUT M R output (analog) 54 GOUT M G output (analog) 55 BOUT M B output (analog) 56 VCC ⎯ 3.3 V power supply 57 UDP USB USB pin 58 UDM USB USB pin 59 VSS ⎯ GND 60 C ⎯ C pin for a regulator 61 VSS ⎯ GND 62 VCC ⎯ 3.3 V power supply 63 HWDE F Hardware watchdog enable input 64 65 PK1 X0A PK0 X1A G G Function General-purpose I/O port 32kHz oscillation pin General-purpose I/O port 32 kHz oscillation pin 66 VSS ⎯ GND 67 X1 A Main oscillation pin 68 X0 A Main oscillation pin (Continued) 10 DS07-16907-2E MB91610 Series Pin no. Pin name I/O circuit type* 69 MD1 F, L Mode pin 70 MD0 F, L Mode pin 71 INIT F, L Initial (reset) pin P70 72 AN0 General-purpose I/O port D OUT0_1 AN1 General-purpose I/O port D OUT1_1 AN2 TMO0 General-purpose I/O port D OUT2_1 AN3 TMO1 D 77 Reload timer ch.1 output General-purpose I/O port D A/D converter ch.4 analog input TMO2 Reload timer ch.2 output P75 General-purpose I/O port AN5 SOUT0 78 A/D converter ch.3 analog input Output compare ch.3 output (Port 1) P74 AN4 Reload timer ch.0 output General-purpose I/O port OUT3_1 76 A/D converter ch.2 analog input Output compare ch.2 output (Port 1) P73 75 A/D converter ch.1 analog input Output compare ch.1 output (Port 1) P72 74 A/D converter ch.0 analog input Output compare ch.0 output (Port 1) P71 73 Function D A/D converter ch.5 analog input Multifunction serial ch.0 output [operation modes 0 to 2] TMI0 Reload timer ch.0 input P76 General-purpose I/O port AN6 SIN0 TMI1 D A/D converter ch.6 analog input Multifunction serial ch.0 input Reload timer ch.1 input (Continued) DS07-16907-2E 11 MB91610 Series Pin no. Pin name I/O circuit type* P77 79 AN7 SCK0 Function General-purpose I/O port D TMI2 A/D converter ch.7 analog input Multifunction serial ch.0 clock [operation modes 0 to 2] Reload timer ch.2 input 80 AVCC ⎯ A/D converter analog power supply 81 AVSS ⎯ A/D converter GND 82 AVRH ⎯ A/D converter analog reference power supply 83 TRST E Tool reset input for DSU4 N.C. pin for MASK products. 84 ICLK K Clock pin for DSU4 N.C. pin for MASK products. 85 IBREAK I Break pin for DSU4 N.C. pin for MASK products. 86 ICS0 H DSU4 status N.C. pin for MASK products. 87 ICS1 H DSU4 status N.C. pin for MASK products. 88 ICS2 H DSU4 status N.C. pin for MASK products. 89 VCC ⎯ 3.3 V power supply 90 VSS ⎯ GND 91 C ⎯ C pin for a regulator 92 ICD0 J DSU4 data N.C. pin for MASK products. 93 ICD1 J DSU4 data N.C. pin for MASK products. 94 ICD2 J DSU4 data N.C. pin for MASK products. 95 ICD3 J DSU4 data N.C. pin for MASK products. P00 96 TIOA0 SOUT0_1 IN0 General-purpose I/O port B Base timer ch.0 TIOA Multifunction serial ch.0 output (Port 1) [operation modes 0 to 2] Input capture ch.0 input (Continued) 12 DS07-16907-2E MB91610 Series Pin no. Pin name I/O circuit type* P01 97 98 TIOB0 SIN0_1 100 General-purpose I/O port B P02 General-purpose I/O port B P03 General-purpose I/O port B Base timer ch.1 TIOB IN3 Input capture ch.3 input P04 General-purpose I/O port SOUT1 B P05 TIOB2 Base timer ch.2 TIOA Multifunction serial ch.1 output [operation modes 0 to 2] I2C ch.1 serial data line [operation mode 4] (SDA1) General-purpose I/O port B Base timer ch.2 TIOB SIN1 Multifunction serial ch.1 input P06 General-purpose I/O port TIOA3 SCK1 B P07 TIOB3 B P10 (SDA2) INT0 Multifunction serial ch.1 clock [operation modes 0 to 2] General-purpose I/O port Base timer ch.3 TIOB General-purpose I/O port TIOA4 SOUT2 Base timer ch.3 TIOA I2C ch.1 serial clock line [operation mode 4] (SCL1) 104 Multifunction serial ch.0 clock (Port 1) [operation modes 0 to 2] Input capture ch.2 input TIOA2 103 Base timer ch.1 TIOA IN2 TIOB1 102 Multifunction serial ch.0 input (Port 1) Input capture ch.1 input SCK0_1 101 Base timer ch.0 TIOB IN1 TIOA1 99 Function Base timer ch.4 TIOA B Multifunction serial ch.2 output [operation modes 0 to 2] I2C ch.2 serial data line [operation mode 4] External interrupt 0 input (Continued) DS07-16907-2E 13 MB91610 Series Pin no. Pin name I/O circuit type* P11 105 TIOB4 SIN2 General-purpose I/O port B P12 General-purpose I/O port SCK2 Base timer ch.5 TIOA B INT2 External interrupt 2 input P13 General-purpose I/O port TIOB5 B External interrupt 3 input P14 General-purpose I/O port SOUT3 Base timer ch.6 TIOA B INT4 External interrupt 4 input P15 General-purpose I/O port TIOB6 SIN3 B 112 Base timer ch.6 TIOB Multifunction serial ch.3 input INT5 External interrupt 5 input P16 General-purpose I/O port SCK3 Base timer ch.7 TIOA B Multifunction serial ch.3 clock [operation modes 0 to 2] I2C ch.3 serial clock line [operation mode 4] (SCL3) 111 Multifunction serial ch.3 output [operation modes 0 to 2] I2C ch.3 serial data line [operation mode 4] TIOA7 110 Base timer ch.5 TIOB INT3 (SDA3) 109 Multifunction serial ch.2 clock [operation modes 0 to 2] I2C ch.2 serial clock line [operation mode 4] TIOA6 108 Multifunction serial ch.2 input External interrupt 1 input (SCL2) 107 Base timer ch.4 TIOB INT1 TIOA5 106 Function INT6 External interrupt 6 input P17 General-purpose I/O port TIOB7 B Base timer ch.7 TIOB INT7 External interrupt 7 input P20 General-purpose I/O port SOUT8 (SDA8) C Multifunction serial ch.8 output [operation modes 0 to 2] I2C ch.8 serial data line [operation mode 4] (Continued) 14 DS07-16907-2E MB91610 Series (Continued) Pin no. Pin name P21 113 SIN8 I/O circuit type* C P22 114 SCK8 P23 RCIN_1 C SOUT9 (SDA9) C C C (SCL9) 120 P27 OUT3 VSS I2C ch.9 serial data line [operation mode 4] Multifunction serial ch.9 input General-purpose I/O port C OUT2 119 Multifunction serial ch.9 output [operation modes 0 to 2] Output compare ch.1 output P26 SCK9 Remote control I/O (1) General-purpose I/O port OUT1 118 General-purpose I/O port Output compare ch.0 output P25 SIN9 Multifunction serial ch.8 clock [operation modes 0 to 2] General-purpose I/O port OUT0 117 Multifunction serial ch.8 input I2C ch.8 serial clock line [operation mode 4] P24 116 General-purpose I/O port General-purpose I/O port (SCL8) 115 Function Multifunction serial ch.9 clock [operation modes 0 to 2] I2C ch.9 serial clock line [operation mode 4] Output compare ch.2 output C ⎯ General-purpose I/O port Output compare ch.3 output GND * : Refer to “■ I/O CIRCUIT TYPE” for details on the I/O circuit types. DS07-16907-2E 15 MB91610 Series ■ I/O CIRCUIT TYPE Type Circuit Remarks A X1 Clock input • Oscillation feedback resistance approx.1 MΩ • With standby control X0 Standby control B • • • • R P-ch R P-ch Digital output N-ch Digital output CMOS level output CMOS level hysteresis input With pull-up control With standby control Note: When this pin is used as an I2C pin, the digital output P-ch transistor is always off. Pull-up control Digital input Standby control (Continued) 16 DS07-16907-2E MB91610 Series Type Circuit Remarks C P-ch N-ch Digital output Digital output • • • • CMOS level output CMOS level hysteresis input 5 V tolerant input With standby control Note: When this pin is used as an I2C pin, the digital output P-ch transistor is always off. R Digital input Standby control D R P-ch P-ch N-ch R Digital output Digital output • • • • • • CMOS level output CMOS level hysteresis input With input control Analog input With pull-up control With standby control Note: When this pin is used as an I2C pin, the digital output P-ch transistor is always off. Pull-up control Digital input Standby control Analog input Input control (Continued) DS07-16907-2E 17 MB91610 Series Type Circuit Remarks E • CMOS level hysteresis input • With pull-up R P-ch P-ch N-ch R Digital input F CMOS level hysteresis input P-ch N-ch R Digital input (Continued) 18 DS07-16907-2E MB91610 Series Type Circuit Remarks G X1A P-ch Digital output N-ch Digital output • Oscillation feedback resistance approx.10MΩ • CMOS level output • CMOS level hysteresis input • With standby control R Digital input Standby control Clock input Standby control Digital input R X0A Standby control P-ch Digital output N-ch Digital output H CMOS level output P-ch Digital output N-ch Digital output (Continued) DS07-16907-2E 19 MB91610 Series Type Circuit Remarks I • CMOS level hysteresis input • With Pull-down control P-ch N-ch R R Pull-down control Digital input J • CMOS level output • CMOS level input • With Pull-down control P-ch Digital output N-ch Digital output R R Pull-down control Digital input K CMOS level output (8 mA) P-ch Digital output N-ch Digital output (Continued) 20 DS07-16907-2E MB91610 Series (Continued) Type Circuit Remarks L • Flash memory product only • CMOS level hysteresis input • High voltage control for testing Flash memory N-ch N-ch Control pin N-ch N-ch N-ch Mode input R M Analog pin P-ch N-ch USB USB I/O pin UDP ( + ) output UDP ( + ) input UDP(+) Differential UDM(-) Differential input UDM ( − ) input UDM ( − ) output Direction DS07-16907-2E 21 MB91610 Series ■ PRECAUTIONS FOR HANDLING THE DEVICES Any semiconductor devices have inherently a certain rate of failure. The possibility of failure is greatly affected by the conditions in which they are used (circuit conditions, environmental conditions, etc.). This page describes precautions that must be observed to minimize the chance of failure and to obtain higher reliability from your FUJITSU MICROELECTRONICS semiconductor devices. 1. Precautions for Product Design This section describes precautions when designing electronic equipment using semiconductor devices. • Absolute Maximum Ratings Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. • Recommended Operating Conditions The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. • Processing and Protection of Pins These precautions must be followed when handling the pins which connect semiconductor devices to power supply and input/output functions. (1) Preventing Over-Voltage and Over-Current Conditions Exposure to voltage or current levels in excess of maximum ratings at any pin is likely to cause deterioration within the device, and in extreme cases leads to permanent damage of the device. Try to prevent such overvoltage or over-current conditions at the design stage. (2) Protection of Output Pins Shorting of output pins to supply pins or other output pins, or connection to large capacitance can cause large current flows. Such conditions if present for extended periods of time can damage the device. Therefore, avoid this type of connection. (3) Handling of Unused Input Pins Unconnected input pins with very high impedance levels can adversely affect stability of operation. Such pins should be connected through an appropriate resistance to a power supply pin or ground pin. - PLL pin for OSD (recommended pin handling when PLL for OSD is not in use) Pin no. Pin name Recommended handling of unused pin 45 VSSP VSS (PLL macro GND) 46 VDDP VSS (PLL macro power supply) 47 VCI VSS 48 CPO VSS - Analog OSD (recommended pin handling when analog OSD is not in use) Pin no. Pin name Recommended handling of unused pin 49 VSSD VSS (DAC macro GND) 22 DS07-16907-2E MB91610 Series 50 51 52 53 54 55 VDDD VREF VRO ROUT GOUT BOUT VSS (DAC macro power supply) VSS VSS VSS VSS VSS - Digital OSD (recommended pin handling when digital OSD is not in use) Pin no. Pin name Recommended handling of unused pin 19 R0 OPEN 20 R1 OPEN 21 R2 OPEN 22 R3 OPEN 23 R4 OPEN 24 G0 OPEN 25 G1 OPEN 26 G2 OPEN 27 G3 OPEN 28 G4 OPEN 29 G5 OPEN 32 B0 OPEN 33 B1 OPEN 34 B2 OPEN 35 B3 OPEN 36 B4 OPEN - Other OSD pins Pin no. Pin name 37 VOA0 38 VOA1 39 VOA2 40 VOB 41 DCKO 42 DCKI 43 VSYNC 44 HSYNC Recommended handling of unused pin OPEN OPEN OPEN OPEN OPEN pull-down pull-down pull-down - USB (example of pin handling when USB is not in use) Pin no. Pin name Recommended handling of unused pin 57 UDP pull-down 58 UDM pull-down - DSU pin Pin no. 83 84 85 86 87 88 92 93 94 95 DS07-16907-2E Pin name TRST ICLK IBREAK ICS0 ICS1 ICS2 ICD0 ICD1 ICD2 ICD3 Recommended handling of unused pin Reset signal input from user board OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN 23 MB91610 Series • Latch-up Semiconductor devices are constructed by the formation of P-type and N-type areas on a substrate. When subjected to abnormally high voltages, internal parasitic PNPN junctions (called thyristor structures) may be formed, causing large current levels in excess of several hundred mA to flow continuously at the power supply pin. This condition is called latch-up. Note: The occurrence of latch-up not only causes loss of reliability in the semiconductor device, but can cause injury or damage from high heat, smoke or flame. To prevent this from happening, do the following: (a) Be sure that voltages applied to pins do not exceed the absolute maximum ratings. This should include attention to abnormal noise, surge levels, etc. (b) Be sure that abnormal current flows do not occur during the power-on sequence. • Observance of Safety Regulations and Standards Most countries in the world have established standards and regulations regarding safety, protection from electromagnetic interference, etc. Customers are requested to observe applicable regulations and standards in the design of products. • Fail-Safe Design Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. • Precautions Related to Usage of Devices FUJITSU MICROELECTRONICS semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU MICROELECTRONICS sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. 24 DS07-16907-2E MB91610 Series 2. Precautions for Package Mounting Package mounting may be either lead insertion type or surface mount type. In either case, for heat resistance during soldering, you should only mount under FUJITSU MICROELECTRONICS's recommended conditions. For detailed information about mount conditions, contact your sales representative. • Lead Insertion Type Mounting of lead insertion type packages onto printed circuit boards may be done by two methods: direct soldering on the board, or mounting by using a socket. Direct mounting onto boards normally involves processes for inserting leads into through-holes on the board and using the flow soldering (wave soldering) method of applying liquid solder. In this case, the soldering process usually causes leads to be subjected to thermal stress in excess of the absolute ratings for storage temperature. Mounting processes should conform to recommended mounting conditions. If socket mounting is used, differences in surface treatment of the socket contacts and IC lead surfaces can lead to contact deterioration after long periods. For this reason it is recommended that the surface treatment of socket contacts and IC leads be verified before mounting. • Surface Mount Type Surface mount packaging has longer and thinner leads than lead-insertion packaging, and therefore leads are more easily deformed or bent. The use of packages with higher pin counts and narrower pin pitch results in increased susceptibility to open connections caused by deformed pins, or shorting due to solder bridges. You must use appropriate mounting techniques. FUJITSU MICROELECTRONICS recommends the solder reflow method, and has established a ranking of mounting conditions for each product. Users are advised to mount packages in accordance with FUJITSU MICROELECTRONICS ranking of recommended conditions. • Lead-Free Packaging Note: When ball grid array (BGA) packages with Sn-Ag-Cu balls are mounted using Sn-Pb eutectic soldering, junction strength may be reduced under some conditions of use. • Storage of Semiconductor Devices Because plastic chip packages are formed from plastic resins, exposure to natural environmental conditions will cause absorption of moisture. During mounting, the application of heat to a package that has absorbed moisture can cause surfaces to peel, reducing moisture resistance and causing packages to crack. To prevent, do the following: (a) Avoid exposure to rapid temperature changes, which cause moisture to condense inside the product. Store products in locations where temperature changes are slight. (b) Use dry boxes for product storage. Products should be stored below 70% relative humidity, and at temperatures between 5 °C and 30 °C. When you open Dry Package that recommends humidity 40% to 70% relative humidity. (c) When necessary, FUJITSU MICROELECTRONICS packages semiconductor devices in highly moistureresistant aluminum laminate bags, with a silica gel desiccant. Devices should be sealed in their aluminum laminate bags for storage. (d) Avoid storing packages where they are exposed to corrosive gases or high levels of dust. DS07-16907-2E 25 MB91610 Series • Baking Packages that have absorbed moisture may be de-moisturized by baking (heat drying). Follow the FUJITSU MICROELECTRONICS recommended conditions for baking. Condition: + 125 °C/24 h • Static Electricity Because semiconductor devices are particularly susceptible to damage by static electricity, you must take the following precautions: (a) Maintain relative humidity in the working environment between 40% and 70%. Use of an apparatus for ion generation may be needed to remove electricity. (b) Electrically ground all conveyors, solder vessels, soldering irons and peripheral equipment. (c) Eliminate static body electricity by the use of rings or bracelets connected to ground through high resistance (on the level of 1 MΩ). Wearing of conductive clothing and shoes, use of conductive floor mats and other measures to minimize shock loads is recommended. (d) Ground all fixtures and instruments, or protect with anti-static measures. (e) Avoid the use of styrofoam or other highly static-prone materials for storage of completed board assemblies. • Precautions for Use Environment Reliability of semiconductor devices depends on ambient temperature and other conditions as described above. For reliable performance, do the following: (1) Humidity Prolonged use in high humidity can lead to leakage in devices as well as printed circuit boards. If high humidity levels are anticipated, consider anti-humidity processing. (2) Discharge of Static Electricity When high-voltage charges exist close to semiconductor devices, discharges can cause abnormal operation. In such cases, use anti-static measures or processing to prevent discharges. (3) Corrosive Gases, Dust, or Oil Exposure to corrosive gases or contact with dust or oil may lead to chemical reactions that will adversely affect the device. If you use devices in such conditions, consider ways to prevent such exposure or to protect the devices. (4) Radiation, Including Cosmic Radiation Most devices are not designed for environments involving exposure to radiation or cosmic radiation. Users should provide shielding as appropriate. (5) Smoke, Flame Note : Plastic molded devices are flammable, and therefore should not be used near combustible substances. If devices begin to smoke or burn, there is danger of the release of toxic gases. Customers considering the use of FUJITSU MICROELECTRONICS products in other special environmental conditions should consult with sales representatives. 26 DS07-16907-2E MB91610 Series ■ HANDLING DEVICES • Power supply pins In products with multiple VCC and VSS pins, respective pins at the same potential are interconnected within the device in order to prevent malfunctions such as latch-up. However, all of these pins should be connected externally to the power supply or ground lines in order to reduce electromagnetic emission levels, to prevent abnormal operation of strobe signals caused by the rise in the ground level, and to conform to the total output current rating. Moreover, connect the current supply source with the VCC and VSS pins of this device at low impedance. It is also advisable that a ceramic capacitor of approximately 0.1 μF be connected as a bypass capacitor between VCC and VSS near this device. • Crystal oscillator circuit Noise near the X0 and X1 pins may cause the device to malfunction. Design the printed circuit board so that X0, X1, the crystal oscillator (or ceramic oscillator), and the bypass capacitor to ground are located as close to the device as possible. It is strongly recommended that the PC board artwork be designed such that the X0 and X1 pins are surrounded by ground plane as this is expected to produce stable operation. • OSDC output pin The OSDC output pins (R0 to R4, G0 to G5, B0 to B4, VOA0 to VOA2, VOB, DCKO) are high-speed corresponded output pin. Adjust the signal waveform such as by inserting damping resistor on the board as needed. • Using an external clock When using an external clock, the clock signal should be input to the X0 pin only and the X1 pin should be kept open. • Example of Using an External Clock X0 Open X1 MB91610 series • C Pin As MB91610 series includes an internal regulator, always connect a bypass capacitor of approximately 4.7 μF to the C pin for use by the regulator. C MB91610 series 4.7 µF VSS GND DS07-16907-2E 27 MB91610 Series • Mode pins (MD0, MD1) Connect the MD pin (MD0, MD1) directly to VCC or VSS pins. Design the printed circuit board such that the pullup/down resistance stays low, as well as the distance between the mode pins and VCC pins or VSS pins is as short as possible and the connection impedance is low, when the pins are pulled-up/down such as for switching the pin level and rewriting the Flash memory data. It is because of preventing the device erroneously switching to test mode due to noise. • Notes on power-on • To ensure that the internal regulator and the oscillator have stabilized immediately after the power is turned on, keep an “L” level input connected to the INIT pin for the duration of the regulator voltage stabilization wait time + the oscillator start time of the oscillator + the main oscillator stabilization wait time. • Turn power on/off in the following order Turning on : VCC → AVCC → AVRH Turning off : AVRH → AVCC → VCC • Release the reset (INIT pin “L” level to “H” level) after the power supply has stabilized. • Caution on operations during PLL clock mode On this microcontroller, if in case the crystal oscillator breaks off or an external reference clock input stops while the PLL clock mode is selected, a self-oscillator circuit contained in the PLL may continue its operation at its self-running frequency. However, Fujitsu Microelectronics will not guarantee results of operations if such failure occurs. 28 DS07-16907-2E MB91610 Series ■ BLOCK DIAGRAM Step-down regulator FR80 CPU DSU4 Crossbar switch Internal program memory Flash memory RAM On-chip bus DMAC 8 channels Peripheral bus bridge OSDC USB function / HOST Interrupt controller Delay interrupt Ports External interrupt, 16 channels 16-bit reload timer, 3 channels 16-bit peripheral bus Watchdog timer 32-bit peripheral bus Clock control Clock generation USB clock generation Watch counter 32-bit free-run timer, 1 channel Base timer, 8 channels 32-bit output compare, 4 channels A/D converter, 8 channels (1 unit) Ports 32-bit input capture, 4 channels Multifunction serial interface, 4 channels HDMI-CEC/ Remote control reception, 1 channel Multifunction serial interface with FIFO, 4 channels Ports DS07-16907-2E 29 MB91610 Series ■ MEMORY SPACE 1. Memory Space The FR family has 4 Gbytes of logical address space (232 addresses) available to the CPU by linear access. • Direct Addressing Areas The following areas in the address space are used as I/O areas. These areas are called direct addressing areas, and the address of an operand in these areas can be specified directly within an instruction. The size of the directly addressable area depends on the length of the data being accessed as follows. • Byte data access : 0000 0000H to 0000 00FFH • Half word data access : 0000 0000H to 0000 01FFH • Word data access : 0000 0000H to 0000 03FFH 30 DS07-16907-2E MB91610 Series 2. Memory Map MB91613 ROM 512 Kbytes RAM 32 Kbytes MB91F610A FLASH 512 Kbytes RAM 32 Kbytes 0000 0000H 0000 0000H I/O area (Direct addressing) I/O area (Direct addressing) 0000 0400H 0000 0400H I/O area 0001 0000H I/O area 0001 0000H Reserved 0003 8000H Reserved 0003 8000H Built-in RAM area 32 Kbytes 0004 0000H Built-in RAM area 32 Kbytes 0004 0000H Reserved 0008 0000H Reserved 0008 0000 H FLASH area 512 Kbytes 000F 8000H ROM area 512 Kbytes Small-sector area 0010 0000H 0010 0000H Reserved FFFF FFFFH Reserved FFFF FFFFH Notes: • Small sector area is related to flash products only. Please refer to the Flash Memory section of the Hardware Manual for more details. • Do not access the reserved areas. DS07-16907-2E 31 MB91610 Series ■ I/O MAP [How to read the table] Address Register Block +0 +1 +2 +3 0000 0000H PDR0 [R/W] B, H XXXXXXXX PDR1 [R/W] B, H XXXXXXXX PDR2 [R/W] B, H XXXXXXXXXXX PDR3 [R/W] B, H XXXXXXXX 0000 003CH WDTCR0 [R/W] B, H -0--0000 WDTCPR0 [R/W] B, H 00000000 ⎯ Watchdog timer 0000 0040H EIRR0 [R/W] B, H, W 000 0000 ENIR0 [R/W] B, H, W 00000000 ELVR0 [R/W] B, H, W 00000000 00000000 External interrupt 0 to 7 Port data register ⎯ : Reserved area Initial value after reset “1” : Initial value“1” “0” : Initial value“0” “X” : Initial value undefined “ - ” : Reserved bit or undefined bit Access unit (B : byte, H : half word, W : word) Read/write attribute “R” : Indicates that there is a read only bit. “R/W” : Indicates that there is a read/write bit. “W” : Indicates that there is a write only bit. Register name (column 1 of the register is at address 4n, column 2 is at address 4 n + 2...) Leftmost register address (For word-length access, column 1 of the register is the MSB of the data.) Notes : • When performing a data access, the addresses should be as below. - Word access : Address should be multiples of 4 (least significant 2 bits should be “00B”) - Half word access : Address should be multiples of 2 (least significant bit should be “0B”) - Byte access : ⎯ • Do not access the reserved areas. 32 DS07-16907-2E MB91610 Series Register Address +0 +1 +2 +3 0000 0000H PDR0 [R/W] B,H XXXXXXXX PDR1 [R/W] B,H XXXXXXXX PDR2 [R/W] B,H XXXXXXXX PDR3 [R/W] B,H XXXXXXXX 0000 0004H ⎯ PDR5 [R/W] B,H XXXXXXXX ⎯ PDR7[R/W] B,H XXXXXXXX 0000 0008H to 0000 0010H ⎯ PDRK [R/W] B ------XX 0000 0014H Block Port data register ⎯ 0000 0018H to 0000 001CH ⎯ 0000 0020H RCCR [R/W] B 0---0000 RCST [R/W] B 00000000 RCSHW [R/W] B 00000000 RCDAHW [R/W] B 00000000 0000 0024H RCDBHW [R/W] B 00000000 ⎯ RCADR1 [R/W] B ---00000 RCADR2 [R/W] B ---00000 0000 0028H RCDTHH [R] B,H,W 00000000 RCDTHL [R] B,H,W 00000000 RCDTLH [R] B,H,W 00000000 RCDTLL [R] B,H,W 00000000 0000 002CH RCCKD [R/W] H ---00000 00000000 0000 0030H to 0000 0038H ⎯ ⎯ 0000 003CH WDTCR0[R/W] B,H 00000000 WDTCPR0[R/W] B,H 00000000 0000 0040H EIRR0[R/W] B,H,W 00000000 ENIR0[R/W] B,H,W 00000000 0000 0044H DICR [R/W] B -------0 HDMI-CEC/ Remote controller Reserved WDTCR1[R] B,H XXXX0000 WDTCPR1[R/W] B,H 00000000 ELVR0[R/W] B,H,W 00000000 00000000 ⎯ 0000 0048H TMRLRA0 [R/W] H XXXXXXXX XXXXXXXX TMR0 [R] H XXXXXXXX XXXXXXXX 0000 004CH ⎯ TMCSR0 [R/W] H --000000 --000000 0000 0050H TMRLRA1 [R/W] H XXXXXXXX XXXXXXXX TMR1 [R] H XXXXXXXX XXXXXXXX 0000 0054H ⎯ TMCSR1 [R/W] H --000000 --000000 Watchdog timer External interrupt 0 to 7 Delay interrupt 16-bit reload timer ch.0 16-bit reload timer ch.1 (Continued) DS07-16907-2E 33 MB91610 Series Address Register +0 +1 +2 +3 0000 0058H TMRLRA2 [R/W] H XXXXXXXX XXXXXXXX TMR2 [R] H XXXXXXXX XXXXXXXX 0000 005CH ⎯ TMCSR2 [R/W] H --000000 --000000 0000 0060H 0000 0064H 0000 0068H 0000 006CH SCR0 [R/W] B,H,W 0--00000 SMR0 [R/W] B,H,W 000-0000 SSR0 [R,R/W] B,H,W 0-000011 RDR0[R]/TDR0[W] B,H,W*1 -------0 00000000 SCR1[R/W] IBCR1[R,R/W] B,H,W*2 0--00000 BGR10[R/W]H,W 00000000 SMR1 [R/W] B,H,W 000-0000 ISBA1 [R/W] B,H*2 -------- 0000 0074H SCR2[R/W] IBCR2[R,R/W] B,H,W*2 0--00000 SMR2 [R/W] B,H,W 000-0000 ISMK2 [R/W] B,H*2 -------- ISBA2 [R/W] B,H*2 -------- 0000 0080H SCR3[R/W] IBCR3[R,R/W] B,H,W*2 0--00000 SMR3 [R/W] B,H,W 000-0000 0000 008CH to 0000 00BCH ⎯ ESCR2[R/W] IBSR2 [R,R/W] B,H,W*2 -0000000 Multi-function BGR12[R/W] H,W BGR02[R/W] H,W serial interface ch.2 00000000 00000000 RDR2[R]/TDR2[W] B,H,W*1 -------0 00000000 ⎯ ESCR3[R/W] IBSR3[R,R/W] B,H,W*2 -0000000 SSR3 [R,R/W] B,H,W 0-000011 Multi-function BGR13[R/W] H,W BGR03[R/W] H,W serial interface ch.3 00000000 00000000 RDR3[R]/TDR3[W] B,H,W*1 -------0 00000000 ISMK3 [R/W] B,H*2 -------- ESCR1[R/W] IBSR1[R,R/W] B,H,W*2 -0000000 SSR2 [R,R/W] B,H,W 0-000011 0000 007CH 0000 0088H Multi-function serial interface ch.0 BGR00[R/W] H,W 00000000 Multi-function BGR11[R/W] H,W BGR01[R/W] H,W serial interface ch.1 00000000 00000000 RDR1[R]/TDR1[W] B,H,W*1 -------0 00000000 ISMK1 [R/W] B,H*2 -------- 0000 0084H 16-bit reload timer ch.2 ESCR0 [R/W] B,H,W -0000000 SSR1 [R,R/W] B,H,W 0-000011 0000 0070H 0000 0078H Block ISBA3 [R/W] B,H*2 -------⎯ ⎯ Reserved (Continued) 34 DS07-16907-2E MB91610 Series Address 0000 00C0H 0000 00C4H 0000 00C8H Register +0 +1 0000 00D4H +3 SSEL0123 [R/W] B ------00 Multi-function serial interface serial clock selection ⎯ ⎯ SCR8 [R/W] IBCR8 [R,R/W] B,H,W*2 0--00000 SMR8 [R/W] B,H,W 000-0000 RDR8[R]/TDR8[W] B,H,W*1 -------0 00000000 Reserved SSR8 [R,R/W] B,H,W 0-000011 ESCR8 [R/W] IBSR8 [R,R/W] B,H,W*2 -0000000 BGR18 [R/W] H,W 00000000 BGR08 [R,R/W] H,W 00000000 0000 00D8H ISMK8 [R/W] B,H*2 -------- ISBA8 [R/W] B,H*2 -------- 0000 00DCH FCR18 [R/W] B,H,W ---00100 FCR08 [R,R/W] B,H,W -0000000 FBYTE28 [R/W] B,H,W 00000000 FBYTE18 [R/W] B,H,W 00000000 0000 00E0H SCR9 [R/W] IBCR9 [R,R/W] B,H,W*2 0--00000 SMR9 [R/W] B,H,W 000-0000 SSR9 [R,R/W] B,H,W 0-000011 ESCR9 [R/W] IBSR9[R,R/W] B,H,W*2 -0000000 0000 00E4H Block RDRM0 [R]/ RDRM1 [R]/ RDRM2 [R]/ RDRM3 [R]/ Multi-function TDRM0[W] B,H,W TDRM1[W] B,H,W TDRM2[W] B,H,W TDRM3[W] B,H,W serial interface 00000000 00000000 00000000 00000000 data register (mirror) ⎯ 0000 00CCH 0000 00D0H +2 RDR9[R]/TDR9[W] B,H,W*1 -------0 00000000 0000 00E8H ISMK9 [R/W] B,H*2 -------- ISBA9 [R/W] B,H*2 -------- 0000 00ECH FCR19 [R/W] B,H,W ---00100 FCR09 [R,R/W] B,H,W -0000000 Multi-function serial interface ch. 8 (FIFO) ⎯ BGR19 [R/W] H,W BGR09 [R/W] H,W 00000000 00000000 ⎯ FBYTE29 [R/W] B,H,W 00000000 Multi-function serial interface ch. 9 (FIFO) FBYTE19 [R/W] B,H,W 00000000 (Continued) DS07-16907-2E 35 MB91610 Series Address 0000 00F0H 0000 00F4H Register +0 +1 +2 +3 SCR10 [R/W] IBCR10 [R,R/W] B,H,W*2 0--00000 SMR10 [R/W] B,H,W 000-0000 SSR10 [R,R/W] B,H,W 0-000011 ESCR10 [R/W] IBSR10 [R,R/W] B,H,W*2 -0000000 BGR110 [R/W] H,W 00000000 BGR010 [R/W] H,W 00000000 RDR10[R]/TDR10[W] B,H,W*1 -------0 00000000 0000 00F8H ISMK10 [R/W] B,H*2 -------- ISBA10 [R/W] B,H*2 -------- 0000 00FCH FCR110 [R/W] B,H,W ---00100 FCR010 [R,R/W] B,H,W -0000000 FBYTE210 [R/W] B,H,W 00000000 FBYTE110 [R/W] B,H,W 00000000 0000 0100H SCR11 [R/W] IBCR11 [R,R/W] B,H,W*2 0--00000 SMR11 [R/W] B,H,W 000-0000 SSR11 [R,R/W] B,H,W 0-000011 ESCR11 [R/W] IBSR11 [R,R/W] B,H,W*2 -0000000 BGR111 [R/W] H,W 00000000 BGR011 [R/W] H,W 00000000 0000 0104H RDR11[R]/TDR11[W] B,H,W*1 -------0 00000000 0000 0108H ISMK11 [R/W] B,H*2 -------- ISBA11 [R/W] B,H*2 -------- 0000 010CH FCR111 [R/W] B,H,W ---00100 FCR011 [R,R/W] B,H,W -0000000 0000 0110H EIRR1[R/W] B,H,W 00000000 ENIR1[R/W] B,H,W 00000000 0000 0114H to 0000 011CH ⎯ ⎯ FBYTE211 [R/W] B,H,W 00000000 Multi-function serial interface ch.10 (FIFO) Multi-function serial interface ch.11 (FIFO) FBYTE111 [R/W] B,H,W 00000000 ELVR1[R/W] B,H,W 00000000 00000000 ⎯ Block External interrupt 8 to 15 Reserved (Continued) 36 DS07-16907-2E MB91610 Series Register Address +0 +1 0000 0120H ADCR0[R/W] B,H 000-0000 ADSR0[R,R/W] B,H 00---000 ⎯ 0000 0124H SCCR0[R,R/W] B,H 1000-000 SFNS0[R/W] B,H ----0000 SCFD0[R] B,H XXXXXXXX XX-XXXXX +3 0000 012CH PCCR0[R,R/W] B,H 1000-000 PFNS0[R/W] B,H ------00 0000 0130H PCIS0[R/W] B 00000000 ⎯ PCFD0[R] B,H XXXXXXXX XXXXXXXX CMPD0[R/W] B,H 00000000 ADST00[R/W] B,H ADST10[R/W] B,H 00100000 00100000 0000 0140H 0000 0144H 0000 0148H BT0TMR[R]H 00000000 00000000 ⎯ 0000 0154H 0000 0158H 0000 015CH ADCT0[R/W] B -----111 ⎯ Reserved BT0TMCR[R/W] B,H -0000000 00000000 BT0STC[R/W]B 0000-000 ⎯ BT0PDUT/BT0PRLH/BT0DTBF [R/W]H XXXXXXXX XXXXXXXX BT0PCSR/BT0PRLL[R/W]H XXXXXXXX XXXXXXXX Base timer ch.0 ⎯ 0000 014CH 0000 0150H CMPCR0[R/W] B,H 00000000 ⎯ 0000 013CH A/D converter ADSS00[R/W] B 00000000 ⎯ 0000 0134H Block SCIS00[R/W] B 00000000 ⎯ 0000 0128H 0000 0138H +2 BT1TMR[R]H 00000000 00000000 ⎯ BT1TMCR[R/W] B,H -0000000 00000000 BT1STC[R/W]B 0000-000 ⎯ BT1PDUT/BT1PRLH/BT1DTBF [R/W]H XXXXXXXX XXXXXXXX BT1PCSR/BT1PRLL[R/W]H XXXXXXXX XXXXXXXX Base timer ch.1 ⎯ (Continued) DS07-16907-2E 37 MB91610 Series Address 0000 0160H 0000 0164H 0000 0168H Register +0 +1 BT2TMR[R]H 00000000 00000000 0000 0174H 0000 0178H 0000 017CH +3 Block BT2TMCR [R/W] B,H -0000000 00000000 BT2STC[R/W]B 0000-000 ⎯ ⎯ BT2PDUT/BT2PRLH/BT2DTBF [R/W]H XXXXXXXX XXXXXXXX BT2PCSR/BT2PRLL[R/W]H XXXXXXXX XXXXXXXX Base timer ch.2 ⎯ 0000 016CH 0000 0170H +2 BT3TMR[R]H 00000000 00000000 BT3TMCR[R/W] B,H -0000000 00000000 BT3STC[R/W]B 0000-000 ⎯ ⎯ BT3PDUT/BT3PRLH/BT3DTBF [R/W]H XXXXXXXX XXXXXXXX BT3PCSR/BT3PRLL[R/W]H XXXXXXXX XXXXXXXX BTSEL0123 [R/W] B 00000000 Base timer ch.3 ⎯ 0000 0180H to 0000 01A8H ⎯ Reserved 0000 01ACH ADCHE [R/W] B,H,W -------- -------- -------- 11111111 A/D channel enable 0000 01B0H IRPR0H [R] B 000----- 0000 01B4H ⎯ 0000 01B8H IRPR4H [R] B,H,W 0000---- 0000 01BCH IRPR1H [R] B,H 000-000- ⎯ IRPR1L [R] B,H 000-000- IRPR2L [R] B,H,W IRPR3H [R] B,H,W 000----0000---- ⎯ ⎯ IRPR5H [R] B,H,W IRPR5L [R] B,H,W 0000---0000---- ⎯ IRPR7L [R] B,H,W 0000---- 0000 01C0H to 0000 01FCH ⎯ 0000 0200H CPCLR0 [R/W] W 11111111 11111111 11111111 11111111 0000 0204H TCDT0 [R/W] W 00000000 00000000 00000000 00000000 0000 0208H TCCSH0 [R/W] B,H 0-----00 TCCSL0 [R/W] B,H -1-00000 Interrupt request batch read function Reserved 32-bit Free-run timer ch.0 ⎯ (Continued) 38 DS07-16907-2E MB91610 Series Address Register +0 +1 +2 +3 0000 020CH IPCP0 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 0210H IPCP1 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 0214H IPCP2 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 0218H IPCP3 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 021CH ICS01 [R/W] B 00000000 ⎯ ⎯ 0000 0220H to 0000 0230H ⎯ 0000 0234H OCCP0 [R/W] W 00000000 00000000 00000000 00000000 0000 0238H OCCP1 [R/W] W 00000000 00000000 00000000 00000000 0000 023CH OCCP2 [R/W] W 00000000 00000000 00000000 00000000 0000 0240H OCCP3 [R/W] W 00000000 00000000 00000000 00000000 0000 0244H OCSH1 [R/W] B,H,W ---0--00 OCSL0 [R/W] B,H,W 0000--00 0000 0248H to 0000 031CH 0000 0320H 0000 0338H ICS23 [R/W] B 00000000 32-bit Output compare ch.0 to ch.3 OCSL2 [R/W] B,H,W 0000--00 ⎯ 0000 0324H to 0000 0334H Reserved ⎯ FSTR[R] B -------1 ⎯ 0000 033CH ⎯ 0000 0340H to 0000 037CH ⎯ Flash memory control Reserved WREN[R/W] B,H 00000000 00000000 ⎯ 32-bit Input capture ch.0 to ch.3 Reserved OCSH3 [R/W] B,H,W ---0--00 FCTLR[R/W] H -0--1011 -------- Block Wild register Reserved (Continued) DS07-16907-2E 39 MB91610 Series Address Register +0 +1 +2 0000 0380H WRAR00[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 0384H WRDR00[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 0388H WRAR01[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 038CH WRDR01[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 0390H WRAR02[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 0394H WRDR02[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 0398H WRAR03[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 039CH WRDR03[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 03A0H WRAR04[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 03A4H WRDR04[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 03A8H WRAR05[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 03ACH WRDR05[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 03B0H WRAR06[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 03B4H WRDR06[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 03B8H WRAR07[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 03BCH WRDR07[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 03C0H WRAR08[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 03C4H WRDR08[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 03C8H WRAR09[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 03CCH WRDR09[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX +3 Block Wild register (Continued) 40 DS07-16907-2E MB91610 Series Address Register +0 +1 +2 +3 0000 03D0H WRAR10[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 03D4H WRDR10[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 03D8H WRAR11[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 03DCH WRDR11[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 03E0H WRAR12[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 03E4H WRDR12[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 03E8H WRAR13[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 03ECH WRDR13[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 03F0H WRAR14[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 03F4H WRDR14[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 03F8H WRAR15[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-- 0000 03FCH WRDR15[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 0400H DDR0 [R/W] B,H 00000000 DDR1 [R/W] B,H 00000000 DDR2 [R/W] B,H 00000000 DDR3 [R/W] B,H 00000000 0000 0404H ⎯ DDR5 [R/W] B,H 00000000 ⎯ DDR7[R/W] B,H 00000000 0000 0408H to 0000 0410H 0000 0414H ⎯ DDRK [R/W] B ------00 Wild register Data direction register ⎯ 0000 0418H to 0000 041CH ⎯ 0000 0420H PCR0 [R/W] B,H 00000000 PCR1 [R/W] B,H 00000000 0000 0424H ⎯ PCR5 [R/W] B 00000000 0000 0428H to 0000 043CH Block ⎯ ⎯ PCR7[R/W] B,H 00000000 Pull-up control register ⎯ (Continued) DS07-16907-2E 41 MB91610 Series Address Register +0 +1 +2 +3 0000 0440H ICR00 [R,R/W] B,H,W ---11111 ICR01 [R,R/W] B,H,W ---11111 ICR02 [R,R/W] B,H,W ---11111 ICR03 [R,R/W] B,H,W ---11111 0000 0444H ICR04 [R,R/W] B,H,W ---11111 ICR05 [R,R/W] B,H,W ---11111 ICR06 [R,R/W] B,H,W ---11111 ICR07 [R,R/W] B,H,W ---11111 0000 0448H ICR08 [R,R/W] B,H,W ---11111 ICR09 [R,R/W] B,H,W ---11111 ICR10 [R,R/W] B,H,W ---11111 ICR11 [R,R/W] B,H,W ---11111 0000 044CH ICR12 [R,R/W] B,H,W ---11111 ICR13 [R,R/W] B,H,W ---11111 ICR14 [R,R/W] B,H,W ---11111 ICR15 [R,R/W] B,H,W ---11111 0000 0450H ICR16 [R,R/W] B,H,W ---11111 ICR17 [R,R/W] B,H,W ---11111 ICR18 [R,R/W] B,H,W ---11111 ICR19 [R,R/W] B,H,W ---11111 0000 0454H ICR20 [R,R/W] B,H,W ---11111 ICR21 [R,R/W] B,H,W ---11111 ICR22 [R,R/W] B,H,W ---11111 ICR23 [R,R/W] B,H,W ---11111 0000 0458H ICR24 [R,R/W] B,H,W ---11111 ICR25 [R,R/W] B,H,W ---11111 ICR26 [R,R/W] B,H,W ---11111 ICR27 [R,R/W] B,H,W ---11111 0000 045CH ICR28 [R,R/W] B,H,W ---11111 ICR29 [R,R/W] B,H,W ---11111 ICR30 [R,R/W] B,H,W ---11111 ICR31 [R,R/W] B,H,W ---11111 0000 0460H ICR32 [R,R/W] B,H,W ---11111 ICR33 [R,R/W] B,H,W ---11111 ICR34 [R,R/W] B,H,W ---11111 ICR35 [R,R/W] B,H,W ---11111 0000 0464H ICR36 [R,R/W] B,H,W ---11111 ICR37 [R,R/W] B,H,W ---11111 ICR38 [R,R/W] B,H,W ---11111 ICR39 [R,R/W] B,H,W ---11111 0000 0468H ICR40 [R,R/W] B,H,W ---11111 ICR41 [R,R/W] B,H,W ---11111 ICR42 [R,R/W] B,H,W ---11111 ICR43 [R,R/W] B,H,W ---11111 0000 046CH ICR44 [R,R/W] B,H,W ---11111 ICR45 [R,R/W] B,H,W ---11111 ICR46 [R,R/W] B,H,W ---11111 ICR47 [R,R/W] B,H,W ---11111 0000 0470H to 0000 047CH 0000 0480H 0000 0484H ⎯ RSTRR [R] B,H,W 11XX---X*3 RSTCR [R/W] B,H,W 000----0 Interrupt control Reserved STBCR [R/W] B,H,W 0000--11 ⎯ Block SLPRR [R/W] B,H,W 00000000 Reset control/ Power consumption control (Continued) 42 DS07-16907-2E MB91610 Series Address 0000 0488H Register +0 +1 +2 +3 DIVR0 [R/W] B,H 000--011 ⎯ DIVR2 [R/W] B 0011---- ⎯ ⎯ 0000 048CH 0000 0490H IORR0 [R/W] B,H,W -0000000 IORR1 [R/W] B,H,W -0000000 IORR2 [R/W] B,H,W -0000000 IORR3 [R/W] B,H,W -0000000 0000 0494H IORR4 [R/W] B,H,W -0000000 IORR5 [R/W] B,H,W -0000000 IORR6 [R/W] B,H,W -0000000 IORR7 [R/W] B,H,W -0000000 0000 0498H to 0000 049CH ⎯ PFR0 [R/W] B,H 00000000 PFR1 [R/W] B,H 00000000 PFR2 [R/W] B,H 00000000 PFR3 [R/W] B,H 00000000 0000 04A4H ⎯ PFR5 [R/W] B,H 00000000 ⎯ PFR7[R/W] B,H 00000000 ⎯ 0000 04B4H PFRK [R/W] B,H ----0000 0000 04B8H EPFR0 [R/W] B,H EPFR1 [R/W] B,H ---00-00 ---00-00 ⎯ 0000 04BCH ⎯ EPFR6 [R/W] B,H EPFR7 [R/W] B,H -00-00-0 ----0-0- 0000 04C0H EPFR8 [R/W] B,H EPFR9 [R/W] B,H ----0-0----00-0 EPFR10 [R/W] B,H ----0--- ⎯ 0000 04C4H ⎯ EPFR14 [R/W] B,H ----0-0- EPFR15 [R/W] B,H ----0-0- 0000 04C8H EPFR17 [R/W] B,H ----0-0- ⎯ EPFR19 [R/W] B,H -------1 0000 04CCH EPFR20 [R/W] B,H ---0--0- EPFR21 [R/W] B,H ---0--0- EPFR22 [R/W] B,H ---0--0- EPFR23 [R/W] B,H ---0--0- EPFR34 [R/W] B,H --0----- ⎯ 0000 04D0H, 0000 04D4H 0000 04DCH Peripheral DMA transmission request control Port function register ⎯ EPFR16 [R/W] B,H ----0-0- 0000 04D8H Clock division control Reserved 0000 04A0H 0000 04A8H to 0000 04B0H Block Extended port function register ⎯ ⎯ EPFR33 [R/W] B,H ---0--0⎯ (Continued) DS07-16907-2E 43 MB91610 Series Address Register +0 +1 0000 04E0H to 0000 04ECH +2 +3 ⎯ Reserved 0000 04F0H ICSEL0[R/W] B,H,W -----000 ICSEL1[R/W] B,H,W -----000 0000 04F4H ICSEL4[R/W] B,H,W ------00 ⎯ ICSEL6[R/W] B,H,W ------00 ICSEL7[R/W] B,H,W -------0 0000 04F8H ICSEL8[R/W] B,H,W ------00 ⎯ ICSEL10[R/W] B,H,W ----0000 ICSEL11[R/W] B,H,W ----0000 ⎯ 0000 04FCH ⎯ 0000 0500H to 0000 050CH ⎯ 0000 0510H 0000 0514H CSELR [R/W] B,H,W 001---00 CMONR [R] B,H,W 001---00 PLLCR [R/W] B,H --000000 11110000 0000 0518H WCRD [R] B,H --000000 0000 051CH UCCR [R/W] B -----001 WCRL [R/W] B,H --000000 MTMCR [R/W] B,H,W 00001111 STMCR [R/W] B,H,W 0000-111 CSTBR [R/W] B -0000000 ⎯ Clock generation/ Main timer/ Sub timer WCCR [R,R/W] B 00--0000 ⎯ Clock counter ⎯ ⎯ 0000 0C00H DCCR0 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR0 [R,R/W] H 0------- -----000 DTCR0 [R/W] H 00000000 00000000 DSAR0 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 0C0CH DDAR0 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 0C10H DCCR1 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR1 [R,R/W] H 0------- -----000 USB clock generation Reserved 0000 0C08H 0000 0C14H DMA start request clear select function Reserved 0000 0520H to 0000 0BFCH 0000 0C04H Block DMAC DTCR1 [R/W] H 00000000 00000000 0000 0C18H DSAR1 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 0C1CH DDAR1 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX (Continued) 44 DS07-16907-2E MB91610 Series Address 0000 0C20H 0000 0C24H 0000 0C28H 0000 0C2CH 0000 0C30H 0000 0C34H 0000 0C38H 0000 0C3CH 0000 0C40H 0000 0C44H 0000 0C48H 0000 0C4CH 0000 0C50H 0000 0C54H 0000 0C58H 0000 0C5CH 0000 0C60H 0000 0C64H 0000 0C68H 0000 0C6CH 0000 0C70H 0000 0C74H Register +1 +2 +3 DCCR2 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR2 [R,R/W] H DTCR2 [R/W] H 0------- -----000 00000000 00000000 DSAR2 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR2 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR3 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR3 [R,R/W] H DTCR3 [R/W] H 0------- -----000 00000000 00000000 DSAR3 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR3 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR4 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR4 [R,R/W] H DTCR4 [R/W] H 0------- -----000 00000000 00000000 DSAR4 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR4 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR5 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR5 [R,R/W] H DTCR5 [R/W] H 0------- -----000 00000000 00000000 DSAR5 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR5 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR6 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR6 [R,R/W] H DTCR6 [R/W] H 0------- -----000 00000000 00000000 DSAR6 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR6 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR7 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR7 [R,R/W] H DTCR7 [R/W] H 0------- -----000 00000000 00000000 +0 Block DMAC (Continued) DS07-16907-2E 45 MB91610 Series Address Register +0 +1 +2 +3 0000 0C78H DSAR7 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 0C7CH DDAR7 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000 0C80H to 0000 0DF0H ⎯ DMAC DILVR [R,R/W] B ---11111 ⎯ 0000 0DF4H 0000 0DF8H DMACR [R/W] W 0------- -------- 0------- -------- 0000 0DFCH to 0000 0F3CH ⎯ 0000 0F40H 0000 0F44H 0000 0F48H BT4TMR[R]H 00000000 00000000 ⎯ 0000 0F54H 0000 0F58H 0000 0F64H 0000 0F68H 0000 0F6CH ⎯ BT4PDUT/BT4PRLH/BT4DTBF [R/W]H XXXXXXXX XXXXXXXX BT4PCSR/BT4PRLL[R/W]H XXXXXXXX XXXXXXXX Base timer ch.4 ⎯ BT5TMR[R]H 00000000 00000000 ⎯ BT5TMCR[R/W] B,H -0000000 00000000 BT5STC[R/W]B 0000-000 ⎯ BT5PDUT/BT5PRLH/BT5DTBF [R/W]H XXXXXXXX XXXXXXXX BT5PCSR/BT5PRLL[R/W]H XXXXXXXX XXXXXXXX Base timer ch.5 ⎯ 0000 0F5CH 0000 0F60H Reserved BT4TMCR[R/W] B,H -0000000 00000000 BT4STC[R/W]B 0000-000 0000 0F4CH 0000 0F50H Block BT6TMR[R]H 00000000 00000000 ⎯ BT6TMCR[R/W] B,H -0000000 00000000 BT6STC[R/W]B 0000-000 ⎯ BT6PDUT/BT6PRLH/BT6DTBF [R/W]H XXXXXXXX XXXXXXXX BT6PCSR/BT6PRLL[R/W]H XXXXXXXX XXXXXXXX Base timer ch.6 ⎯ (Continued) 46 DS07-16907-2E MB91610 Series Register Address +0 +2 BT7TMR[R]H 00000000 00000000 0000 0F70H BT7PDUT/BT7PRLH/BT7DTBF [R/W]H XXXXXXXX XXXXXXXX BTSEL4567 [R/W] B 00000000 Base timer ch.7 ⎯ 0000 0F80H to 0000 0FF8H ⎯ Reserved BTSSSR[W] H XXXXXXXX XXXXXXXX ⎯ 0000 0FFCH Block ⎯ BT7PCSR/BT7PRLL[R/W]H XXXXXXXX XXXXXXXX 0000 0F78H +3 BT7TMCR[R/W] B,H -0000000 00000000 BT7STC[R/W]B 0000-000 ⎯ 0000 0F74H 0000 0F7CH +1 0000 1000H to 0000 20FCH ⎯ Base Timer I/O Select Function Reserved 0000 2100H HCNT1[R/W] B,H -----001 HCNT0[R/W] B,H 00000000 ⎯ 0000 2104H HERR[R/W] B,H 00000011 HIRQ[R/W] B,H 0-000000 ⎯ 0000 2108H HFCOMP[R/W] B,H 00000000 HSTATE[R,R/W] B,H ---10010 ⎯ 0000 210CH HRTIMER1[R/W] B,H 00000000 HRTIMER0[R/W] B,H 00000000 ⎯ 0000 2110H HADR[R/W] B,H -0000000 HRTIMER2[R/W] B,H ------00 ⎯ 0000 2114H HEOF1[R/W] B,H --000000 HEOF0[R/W] B,H 00000000 ⎯ 0000 2118H HFRAME1[R/W] B,H -----000 HFRAME0[R/W] B,H 00000000 ⎯ 0000 211CH ⎯ HTOKEN[R/W] B 00000000 ⎯ 0000 2120H ⎯ UDCC[R/W] B 1010--00 ⎯ USB function / HOST (Continued) DS07-16907-2E 47 MB91610 Series Address Register +0 +1 +2 +3 0000 2124H EP0C[R/W] H ------0- -1000000 ⎯ 0000 2128H EP1C[R/W] H 01100001 00000000 ⎯ 0000 212CH EP2C[R/W] H 0110000- -1000000 ⎯ 0000 2130H EP3C[R/W] H 0110000- -1000000 ⎯ 0000 2134H EP4C[R/W] H 0110000- -1000000 ⎯ 0000 2138H EP5C[R/W] H 0110000- -1000000 ⎯ 0000 213CH TMSP[R] H -----000 00000000 ⎯ 0000 2140H UDCIE[R,R/W] B,H --000000 UDCS[R/W] B,H --000000 Block ⎯ 0000 2144H EP0IS[R/W] H 10---1-- -------- ⎯ 0000 2148H EP00S[R,R/W] H 100--00- -XXXXXXX ⎯ 0000 214CH EP1S[R,R/W] H 100-000X XXXXXXXX ⎯ 0000 2150H EP2S[R,R/W] H 100-000- -XXXXXXX ⎯ 0000 2154H EP3S[R,R/W] H 100-000- -XXXXXXX ⎯ 0000 2158H EP4S[R,R/W] H 100-000- -XXXXXXX ⎯ 0000 215CH EP5S[R,R/W] H 100-000- -XXXXXXX ⎯ 0000 2160H EP0DTH [R/W] B,H XXXXXXXX EP0DTL [R/W] B,H XXXXXXXX ⎯ 0000 2164H EP1DTH [R/W] B,H XXXXXXXX EP1DTL [R/W] B,H XXXXXXXX ⎯ 0000 2168H EP2DTH [R/W] B,H XXXXXXXX EP2DTL [R/W] B,H XXXXXXXX ⎯ 0000 216CH EP3DTH [R/W] B,H XXXXXXXX EP3DTL [R/W] B,H XXXXXXXX ⎯ USB function / HOST (Continued) 48 DS07-16907-2E MB91610 Series Address Register +0 +1 +2 0000 2170H EP4DTH [R/W] B,H XXXXXXXX EP4DTL [R/W] B,H XXXXXXXX ⎯ 0000 2174H EP5DTH [R/W] B,H XXXXXXXX EP5DTL [R/W] B,H XXXXXXXX ⎯ 0000 2178H to 0000 217CH ⎯ 0000 2180H to 0000 21A0H ⎯ 0000 21A4H DREQSEL [R/W] B,H 00111011 USBSEL [R/W] B,H -------0 +3 Block USB function / HOST Reserved USBEN [R/W] B -------0 0000 21A8H to 0000 3FFCH ⎯ 0000 4000H MOSD_VADR [W] W -------- -------0 ---00000 --000000 0000 4004H MOSD_CDS1 [W] W 00000000 ---00000 00000000 00000000 0000 4008H MOSD_CDS2 [W] W -------- 0000-000 --000000 00000000 0000 400CH MOSD_LDS1 [W] W 0000-000 00000000 ----0000 00000000 0000 4010H MOSD_LDS2 [W] W -------- ---00000 --000000 00000000 0000 4014H MOSD_SCOC [W] W ------00 0000---- ---0---0 XXXX---- 0000 4018H MOSD_HVDP [W] W -----000 00000000 -----000 00000000 0000 401CH MOSD_TSBC [W] W -------- -------- -------0 00000000 0000 4020H MOSD_GRCC [W] W -------0 00000000 -------0 00000000 0000 4024H MOSD_SBCC [W] W -----000 ------00 --000000 00000000 0000 4028H MOSD_SCBC [W] W -------- --00--00 ---0-000 00000000 0000 402CH MOSD_WPC1 [W] W -----000 00000000 -----000 00000000 ⎯ DMA transfer request selector/ USB enable Reserved OSDC (MAIN) (Continued) DS07-16907-2E 49 MB91610 Series Address Register +0 +1 +2 0000 4030H MOSD_WPC2 [W] W ----0000 00000000 ----0000 00000000 0000 4034H MOSD_SPC1 [W] W ---0-000 ------00 --000000 00000000 0000 4038H MOSD_SPC2 [W] W ----0000 00000000 -----000 00000000 0000 403CH MOSD_SYNC [W] W -------- --000000 -------- -0-0---- 0000 4040H MOSD_CBC0 [W] W --000000 00000000 --000000 00000000 0000 4044H MOSD_CBC1 [W] W --000000 00000000 --000000 00000000 0000 4048H MOSD_CBC2 [W] W --000000 00000000 --000000 00000000 0000 404CH MOSD_CBC3 [W] W --000000 00000000 --000000 00000000 0000 4050H MOSD_CBC4 [W] W --000000 00000000 --000000 00000000 0000 4054H MOSD_CBC5 [W] W --000000 00000000 --000000 00000000 0000 4058H MOSD_CBC6 [W] W --000000 00000000 --000000 00000000 0000 405CH MOSD_CBC7 [W] W --000000 00000000 --000000 00000000 0000 4060H MOSD_IOTC [W] W -------0 0----00- -------- -----XXX 0000 4064H MOSD_CDP1 [W] W -----000 00000000 -----000 00000000 0000 4068H MOSD_CDP2 [W] W ----0000 00000000 ----0000 00000000 0000 406CH MOSD_INTC [R/W] W -------- -------- -----XXX -----XXX 0000 4070H MOSD_SBC0 [W] W 00000000 00000000 00000000 00000000 0000 4074H MOSD_SBC1 [W] W 00000000 00000000 00000000 00000000 0000 4078H MOSD_SBC2 [W] W 00000000 00000000 00000000 00000000 0000 407CH MOSD_SBC3 [W] W 00000000 00000000 00000000 00000000 +3 Block OSDC (MAIN) (Continued) 50 DS07-16907-2E MB91610 Series Address 0000 4080H to 0000 40FCH 0000 4100H 0000 4104H 0000 4108H 0000 410CH 0000 4110H 0000 4114H 0000 4118H 0000 411CH 0000 4120H 0000 4124H 0000 4128H 0000 412CH 0000 4130H 0000 4134H 0000 4138H 0000 413CH to 0000 4168H 0000 416CH 0000 4170H 0000 4174H 0000 4178H 0000 417CH Register +0 +1 +2 ⎯ SOSD_VADR [W] W -------- -------0 ---00000 --000000 SOSD_CDS1 [W] W 00000000 ---00000 00000000 00000000 SOSD_CDS2 [W] W -------- 0000-000 --000000 00000000 SOSD_LDS1 [W] W 0000-000 00000000 ----0000 00000000 SOSD_LDS2 [W] W -------- ---00000 --000000 00000000 SOSD_SCOC [W] W ------00 0000---- ---0---0 XX-X---X SOSD_HVDP [W] W -----000 00000000 -----000 00000000 SOSD_TSBC [W] W -------- -------- -------0 00000000 SOSD_GRCC [W] W -------0 00000000 -------0 00000000 ⎯ SOSD_SCBC [W] W -------- --00--00 ---0-000 00000000 SOSD_WPC1 [W] W -----000 00000000 -----000 00000000 SOSD_WPC2 [W] W ----0000 00000000 ----0000 00000000 SOSD_SPC1 [W] W ---0-000 ------00 --000000 00000000 SOSD_SPC2 [W] W ----0000 00000000 -----000 00000000 +3 Block Reserved OSDC (SUB) ⎯ SOSD_INTC [R/W] W -------- -------- -----XXX -----XXX SOSD_SBC0 [W] W 00000000 00000000 00000000 00000000 SOSD_SBC1 [W] W 00000000 00000000 00000000 00000000 SOSD_SBC2 [W] W 00000000 00000000 00000000 00000000 SOSD_SBC3 [W] W 00000000 00000000 00000000 00000000 (Continued) DS07-16907-2E 51 MB91610 Series (Continued) Address Register +0 +1 +2 0000 4180H to 0000 41FCH ⎯ 0000 4200H to 0000 43FCH MOSD_PLn [W] W *n: 0 to 127 00000000 00000000 00000000 00000000 0000 4400H MOSD_OSDC [W] W -------- --XX--XX ------XX ---X---X 0000 4404H MOSD_PLLC [W] W --000000 00000000 00000000 ---00000 0000 4408H to 0000 FFFCH ⎯ +3 Block Reserved OSDC (MAIN) Reserved *1 : Byte access is available only when accessing the lower 8 bits within 9 bits. *2 : The register of I2C can not be read immediate after reset. *3 : Value just after reset by INIT pin. Do not access the reserved areas. 52 DS07-16907-2E MB91610 Series ■ VECTOR TABLE Interrupt number Interrupt source (Peripheral resource) Interrupt level setting register Offset Address of TBR default Decimal Hexadecimal Reset 0 00 ⎯ 3FCH 000F FFFCH System reserved 1 01 ⎯ 3F8H 000F FFF8H System reserved 2 02 ⎯ 3F4H 000F FFF4H System reserved 3 03 ⎯ 3F0H 000F FFF0H System reserved 4 04 ⎯ 3ECH 000F FFECH System reserved 5 05 ⎯ 3E8H 000F FFE8H System reserved 6 06 ⎯ 3E4H 000F FFE4H System reserved 7 07 ⎯ 3E0H 000F FFE0H System reserved 8 08 ⎯ 3DCH 000F FFDCH INTE instruction 9 09 ⎯ 3D8H 000F FFD8H Instruction break exception 10 0A ⎯ 3D4H 000F FFD4H Operand break 11 0B ⎯ 3D0H 000F FFD0H Step trace trap 12 0C ⎯ 3CCH 000F FFCCH System reserved 13 0D ⎯ 3C8H 000F FFC8H Undefined instruction exception 14 0E ⎯ 3C4H 000F FFC4H ⎯ 15 0F 15 (FH) fixed 3C0H 000F FFC0H External interrupt request ch.0 to ch.7 16 10 ICR00 3BCH 000F FFBCH External interrupt request ch.8 to ch.15 17 11 ICR01 3B8H 000F FFB8H Reserved 18 12 ICR02 3B4H 000F FFB4H Reserved 19 13 ICR03 3B0H 000F FFB0H 16-bit reload timer ch.0 to ch.2 20 14 ICR04 3ACH 000F FFACH Reception interrupt request of UART/CSIO ch.0 21 15 ICR05 3A8H 000F FFA8H Transmission interrupt request of UART/CSIO ch.0 Transmission bus idle interrupt request of UART/CSIO ch.0 22 16 ICR06 3A4H 000F FFA4H Reception interrupt request of UART/CSIO/ I2C ch.1 23 17 ICR07 3A0H 000F FFA0H Transmission interrupt request of UART/ CSIO/ I2C ch.1 Transmission bus idle interrupt request of UART/CSIO ch.1 24 18 ICR08 39CH 000F FF9CH Status interrupt request of I2C ch.1 25 19 ICR09 398H 000F FF98H (Continued) DS07-16907-2E 53 MB91610 Series Interrupt number Interrupt source (Peripheral resource) Interrupt level setting register Offset Address of TBR default Decimal Hexadecimal Reception interrupt request of UART/CSIO/I2C ch.2 26 1A ICR10 394H 000F FF94H Transmission interrupt request of UART/CSIO/I2C ch.2 Transmission bus idle interrupt request of UART/ CSIO ch.2 27 1B ICR11 390H 000F FF90H Status interrupt request of I2C ch.2 28 1C ICR12 38CH 000F FF8CH Reception interrupt request of UART/CSIO/I2C ch.3 29 1D ICR13 388H 000F FF88H Transmission interrupt request of UART/CSIO/I2C ch.3 Transmission bus idle interrupt request of UART/ CSIO ch.3 Status interrupt request of I2C ch.3 30 1E ICR14 384H 000F FF84H Reserved 31 1F ICR15 380H 000F FF80H Reserved 32 20 ICR16 37CH 000F FF7CH Reserved 33 21 ICR17 378H 000F FF78H Reserved 34 22 ICR18 374H 000F FF74H Reserved 35 23 ICR19 370H 000F FF70H Reserved 36 24 ICR20 36CH 000F FF6CH Reserved 37 25 ICR21 368H 000F FF68H 38 26 ICR22 364H 000F FF64H Reception interrupt request of UART/CSIO/I C ch.8 to ch.11 Transmission interrupt request of UART/CSIO/I2C ch.8 to ch.11 Transmission bus idle interrupt request of UART/ CSIO ch.8 to ch.11 Transmission FIFO interrupt request UART/CSIO/ I2C ch.8 to ch.11 Status interrupt request of I2C ch.8 to ch.11 39 27 ICR23 360H 000F FF60H HDMI-CEC/Remote control reception 40 28 ICR24 35CH 000F FF5CH Main timer/Sub timer/Watch counter 41 29 ICR25 358H 000F FF58H 10-bit A/D converter • Scan conversion interrupt request • Priority conversion interrupt request • FIFO overrun interrupt request • Conversion result compare interrupt request 42 2A ICR26 354H 000F FF54H Reserved 2 (Continued) 54 DS07-16907-2E MB91610 Series (Continued) Interrupt number Interrupt source (Peripheral resource) Interrupt level setting register Offset Address of TBR default Decimal Hexadecimal 32-bit free run timer ch.0 43 2B ICR27 350H 000F FF50H 32-bit input capture ch.0 to ch.3 44 2C ICR28 34CH 000F FF4CH 32-bit output compare ch.0 to ch.3 45 2D ICR29 348H 000F FF48H Base timer ch.0 46 2E ICR30 344H 000F FF44H Base timer ch.1 47 2F ICR31 340H 000F FF40H Base timer ch.2 48 30 ICR32 33CH 000F FF3CH Base timer ch.3 49 31 ICR33 338H 000F FF38H Base timer ch.4, ch.5 50 32 ICR34 334H 000F FF34H Base timer ch.6, ch.7 51 33 ICR35 330H 000F FF30H Reserved 52 34 ICR36 32CH 000F FF2CH OSDC (MAIN) 53 35 ICR37 328H 000F FF28H USB function (DRQ of End Point 1 to 5) 54 36 ICR38 324H 000F FF24H USB function (DRQI of End Point 0, DRQO and each status/ USB HOST (each status) 55 37 ICR39 320H 000F FF20H OSDC (SUB) 56 38 ICR40 31CH 000F FF1CH DMA controller (DMAC) ch.0 57 39 ICR41 318H 000F FF18H DMA controller (DMAC) ch.1 58 3A ICR42 314H 000F FF14H DMA controller (DMAC) ch.2 59 3B ICR43 310H 000F FF10H DMA controller (DMAC) ch.3 60 3C ICR44 30CH 000F FF0CH DMA controller (DMAC) ch.4 to ch.7 61 3D ICR45 308H 000F FF08H System reserved 62 3E ICR46 304H 000F FF04H Delay interrupt 63 3F ICR47 300H 000F FF00H System reserved (Used by REALOS) 64 40 ⎯ 2FCH 000F FEFCH System reserved (Used by REALOS) 65 41 ⎯ 2F8H 000F FEF8H Used by INT instruction 66 to 255 42 to FF ⎯ 2F4H to 000H 000F FEF4H to 000F FC00H DS07-16907-2E 55 MB91610 Series * : USB interrupt source Number Decimal Hexadecimal 54 36 55 56 37 USB interrupt source Details USB function (DRQ of End Point 1 to 5) DRQ (End Point1 to 5) USB function (DRQI, DRQO of End Point 0 and each status) DRQI, DRQO, SPK, SUSP, SOF, BRST, CONF, WKUP USB HOST ( Each status) DIRQ, URIRQ, RWKIRQ, CNNIRQ, SOFIRQ, CMPIRQ DS07-16907-2E MB91610 Series ■ PIN STATUS IN EACH CPU STATE • When INIT = “L” This is the period when the INIT pin is the “L” level. • When INIT = “H” The status immediately after the INIT pin changes from the “L” level to the “H” level. • SLVL1 This bit is a standby level setting bit in the standby mode control register (STBCR) . • Input enabled Indicates that the input function can be used. • Input disabled Indicates that the input function cannot be used. • Output Hi-Z Indicates that the output drive transistor is disabled and the pin is put in the Hi-Z state. • Maintain previous state Maintains the state that was being output immediately prior to entering the current mode. If a built-in peripheral function is operating, the output follows the peripheral function. If the pin is being used as a port, that output is maintained. • Internal input fixed at “0” The input gate connected to the pin is disconnected from the external input and internally connected to “0”. • Input enabled when interrupt function selected and enabled Inputs are allowed only when the pin is configured as an external interrupt request input pin and the external interrupt request is enabled. DS07-16907-2E 57 MB91610 Series • List of pin status Pin name Function INIT During initialization INIT = “L” INIT = “H” INIT ⎯ X0 X0 X1 Sleep Mode Standby Mode SLVL1 = 0 SLVL1 = 1 ⎯ Input enabled Input enabled Input enabled Input enabled Hi-Z/ Input enabled Hi-Z/ Input enabled X1 Input enabled Input enabled "H" output/ Input enabled "H" output/ Input enabled X0A X0A (When INIT input, see PK1. When port selected, input disabled) Input disabled Input disabled Hi-Z/ Input enabled Hi-Z/ Input enabled X1A X1A (When INIT input, see PK0. When port selected, input disabled) Input disabled Input disabled "H" output/ Input enabled "H" output/ Input enabled MD0 MD0 Input enabled Input enabled MD1 MD1 Input enabled Input enabled Input enabled Input enabled P00 P00/TIOA0/SOUT0_1/IN0 P01 P01/TIOB0/SIN0_1/IN1 P02 P02/TIOA1/SCK0_1/IN2 P03 P03/TIOB1/IN3 P04 P04/TIOA2/SOUT1 Output Hi-Z Output Hi-Z Input enabled Maintain previous state P05 P05/TIOB2/SIN1 Output Hi-Z/ Internal input fixed at "0" P06 P06/TIOA3/SCK1 P07 P07/TIOB3 P10 P10/TIOA4/SOUT2/INT0 P11 P11/TIOB4/SIN2/INT1 P12 P12/TIOA5/SCK2/INT2 P13 P13/TIOB5/INT3 P14 P14/TIOA6/SOUT3/INT4 P15 P15/TIOB6/SIN3/INT5 P16 P16/TIOA7/SCK3/INT6 P17 P17/TIOB7/INT7 Input enabled Maintain previous state Output Hi-Z/ Internal input fixed at "0" Output Hi-Z Output Hi-Z Input enabled Maintain previous state Maintain previous state Input enabled when interrupt function selected and enabled (Continued) 58 DS07-16907-2E MB91610 Series Pin name Function P20 P20/SOUT8 P21 P21/SIN8 P22 P22/SCK8 P23 P23/RCIN_1 P24 P24/SOUT9/OUT0 P25 P25/SIN9/OUT1 P26 P26/SCK9/OUT2 P27 P27/OUT3 P30 P30/SOUT10/INT8 P31 P31/SIN10/INT9 P32 P32/SCK10/INT10 P33 P33/INT11 P34 P34/SOUT11/INT12 P35 P35/SIN11/INT13 P36 P36/SCK11/INT14 P37 P37/INT15 P50 P50 P51 P51 P52 P52 P53 P53 P54 P54/RCIN P55 P55/ADTRG P56 P56/FRCK P57 P57 P70 P70/AN0/OUT0_1 P71 P71/AN1/OUT1_1 P72 P72/AN2/TMO0/OUT2_1 P73 P73/AN3/TMO1/OUT3_1 P74 P74/AN4/TMO2 P75 P75/AN5/SOUT0/TMI0 P76 P76/AN6/SIN0/TMI1 P77 P77/AN7/SCK0/TMI2 PK0 PK0 PK1 PK1 During initialization INIT = “L” INIT = “H” Output Hi-Z Output Hi-Z Input enabled Sleep Mode Maintain previous state Standby Mode SLVL1 = 0 SLVL1 = 1 Output Hi-Z/ Maintain preInternal input vious state fixed at "0" Output Hi-Z/ Internal input fixed at "0" Output Hi-Z Output Hi-Z Input enabled Maintain previous state Maintain previous state Output Hi-Z Output Hi-Z Input enabled Maintain previous state Maintain previous state Output Hi-Z/ Internal input fixed at "0" Output Hi-Z Output Hi-Z Input enabled* Maintain previous state Maintain previous state Output Hi-Z/ Internal input fixed at "0" Output Hi-Z Output Hi-Z Input enabled Maintain previous state Maintain previous state Output Hi-Z/ Internal input fixed at "0" Input enabled when interrupt function selected and enabled * : Analog input has a priority (digital input is disconnected) (Continued) DS07-16907-2E 59 MB91610 Series (Continued) Pin name Function UDP UDP(USB) During initialization INIT = “L” INIT = “H” Output Hi-Z Output Hi-Z Input enabled Sleep Mode SLVL1 = 0 SLVL1 = 1 Maintain previous state/ Input enabled Maintain previous state Output Hi-Z/ Internal input fixed at "0" Input state Input state UDM UDM(USB) DCKI DCKI Input state Input enabled Input enabled DCKO DCKO L output L output/ DCK output L output/ DCK output VSYNC VSYNC HSYNC HSYNC Input state Input enabled Input enabled R4 to R0 R4 to R0 L output/ R output L output/ R output G5 to G0 G5 to G0 L output/ G output L output/ G output B4 to B0 B4 to B0 L output/ B output L output/ B output VOA2 to VOA0 VOA2 to VOA0 L output/ VOA output L output/ VOA output VOB VOB L output/ VOB output L output/ VOB output ROUT ROUT L output/ L output/ ROUT output ROUT output GOUT GOUT L output/ L output/ GOUT output GOUT output BOUT BOUT L output/ L output/ BOUT output BOUT output HWDE HWDE 60 L output Input state Input enabled Standby Mode Input enabled L output L output (OSDC stop) (OSDC stop) Input state Input state L output L output (OSDC stop) (OSDC stop) Input state Input state DS07-16907-2E MB91610 Series • List of pin status (serial write mode) Pin name Function During initialization During asynchronous write operation INIT = “L” During synchronous write operation INIT = “H” INIT INIT ⎯ ⎯ ⎯ X0 X0 Input enabled Input enabled Input enabled X1 X1 Input enabled Input enabled Input enabled X0A X0A (When INIT input, see PK1. When port selected, input disabled) Input disabled Input disabled Input disabled X1A X1A (When INIT input, see PK0. When port selected, input disabled) Input disabled Input disabled Input disabled MD0 MD0 Input enabled Input enabled Input enabled MD1 MD1 Input enabled Input enabled Input enabled P00 P00/TIOA0/SOUT0_1/IN0 P01 P01/TIOB0/SIN0_1/IN1 P02 P02/TIOA1/SCK0_1/IN2 P03 P03/TIOB1/IN3 P04 P04/TIOA2/SOUT1 Output Hi-Z Output Hi-Z Input enabled Output Hi-Z Input enabled P05 P05/TIOB2/SIN1 P06 P06/TIOA3/SCK1 P07 P07/TIOB3 P10 P10/TIOA4/SOUT2/INT0 P11 P11/TIOB4/SIN2/INT1 P12 P12/TIOA5/SCK2/INT2 P13 P13/TIOB5/INT3 P14 P14/TIOA6/SOUT3/INT4 Output Hi-Z Output Hi-Z Input enabled Output Hi-Z Input enabled P15 P15/TIOB6/SIN3/INT5 P16 P16/TIOA7/SCK3/INT6 P17 P17/TIOB7/INT7 P20 P20/SOUT8 P21 P21/SIN8 P22 P22/SCK8 P23 P23/RCIN_1 P24 P24/SOUT9/OUT0 Output Hi-Z Output Hi-Z Input enabled Output Hi-Z Input enabled P25 P25/SIN9/OUT1 P26 P26/SCK9/OUT2 P27 P27/OUT3 (Continued) DS07-16907-2E 61 MB91610 Series Pin name Function During initialization During asynchronous write operation INIT = “L” P30 P30/SOUT10/INT8 P31 P31/SIN10/INT9 P32 P32/SCK10/INT10 P33 P33/INT11 P34 P34/SOUT11/INT12 P35 P35/SIN11/INT13 P36 P36/SCK11/INT14 P37 P37/INT15 P50 P50 P51 P51 P52 P52 P53 P53 P54 P54/RCIN P55 P55/ADTRG P56 P56/FRCK P57 P57 P70 P70/AN0/OUT0_1 P71 P71/AN1/OUT1_1 P72 P72/AN2/TMO0/OUT2_1 P73 P73/AN3/TMO1/OUT3_1 P74 P74/AN4/TMO2 P75 During synchronous write operation INIT = “H” Output Hi-Z Output Hi-Z Input enabled Output Hi-Z Input enabled Output Hi-Z Output Hi-Z Input enabled Output Hi-Z Input enabled Output Hi-Z Input enabled Output Hi-Z Input enabled P75/AN5/SOUT0/TMI0 Output Output P76 P76/AN6/SIN0/TMI1 P77 P77/AN7/SCK0/TMI2 Output Hi-Z Input enabled Output Hi-Z Input enabled PK0 PK0 PK1 PK1 Output Hi-Z Output Hi-Z Input enabled Output Hi-Z Input enabled UDP UDP (USB) UDM UDM (USB) Output Hi-Z Output Hi-Z Input enabled Output Hi-Z Input enabled DCKI DCKI Input state Input enabled Input enabled DCKO DCKO L output L output L output VSYNC VSYNC HSYNC HSYNC Input state Input enabled Input enabled Output Hi-Z (Continued) 62 DS07-16907-2E MB91610 Series (Continued) Pin name Function During initialization During asynchronous write operation INIT = “L” R4 to R0 R4 to R0 G5 to G0 G5 to G0 B4 to B0 B4 to B0 VOA2 to VOA0 VOA2 to VOA0 VOB VOB ROUT ROUT GOUT GOUT BOUT BOUT HWDE HWDE DS07-16907-2E During synchronous write operation INIT = “H” L output L output L output L output L output L output Input state Input enabled Input enabled 63 MB91610 Series ■ ELECTRICAL CHARACTERISTICS 1. Absolute Maximum Ratings Parameter Symbol Power supply voltage*1, *2 1 Analog power supply voltage* , * 3 Analog reference voltage*1, *3 1 Analog pin input voltage* 1 Output voltage*1 Maximum clamp current Total maximum clamp current “L” level maximum output current*4 Unit Max VCC Vss − 0.3 Vss + 4.0 V AVCC Vss − 0.3 Vss + 4.0 V AVRH Vss − 0.3 Vss + 4.0 V Vss − 0.3 Vcc + 0.3 ( ≤ 4.0) V *7 Vss − 0.3 Vss + 6.0 V 5 V tolerant Vss − 0.5 Vss + 4.5 V USB I/O Vss − 0.3 Vss + 4.0 V Vss − 0.3 Vcc + 0.3 V Vss − 0.5 Vss + 4.5 V ICLAMP −4 +4 mA *8 Σ|ICLAMP| ⎯ 40 mA *8 ⎯ 10 mA ⎯ 43 mA ⎯ 4 mA ⎯ 15 mA VIA VO IOL “L” level average output current*5 IOLAV “L” level total maximum output current ΣIOL ⎯ 100 mA ΣIOLAV ⎯ 50 mA ⎯ − 10 mA ⎯ − 43 mA ⎯ −4 mA ⎯ − 15 mA “L” level total average output current*6 “H” level maximum output current*4 IOH “H” level average output current*5 IOHAV “H” level total maximum output current*6 ΣIOH ⎯ − 100 mA ΣIOHAV ⎯ − 50 mA ⎯ 850 mW ⎯ 600 mW Ta − 40 + 85 °C TSTG − 55 + 125 °C “H” level total average output current Power consumption (Flash product) Power consumption (MASK product) Operating temperature Storage temperature Remarks Min VI Input voltage* Rating PD USB I/O USB I/O USB I/O USB I/O USB I/O *1 : The parameter is based on VSS = AVSS = 0.0 V. *2 : VCC must not drop below VSS − 0.3 V. *3 : Be careful not to exceed VCC + 0.3 V, for example, when the power is turned on. *4 : The maximum output current is the peak value for a single pin. *5 : The average output is the average current for a single pin over a period of 100 ms. (Continued) 64 DS07-16907-2E MB91610 Series (Continued) *6 : The total average output current is the average current for all pins over a period of 100 ms. *7 : If the input current or the maximum input current are limited by some means with external components, the ICLAMP rating supersedes the VI rating. *8 : • Corresponding pins:P14 to P17,P20 to P27,P30 to P37,P50 to P57 • Use within recommended operating conditions. • Use at DC voltage (current). • The +B signal should always be applied by connecting a limiting resistor between the +B signal and the microcontroller. • The value of the limiting resistor should be set so that the current input to the microcontroller pin does not exceed rated values at any time regardless of instantaneously or constantly when the +B signal is input. • Note that when the microcontroller drive current is low, such as in the low power consumption modes, the +B input potential can increase the potential at the VCC pin via a protective diode, possibly affecting other devices. • Note that if the +B signal is input when the microcontroller is off (not fixed at 0V), since the power is supplied through the pin, the microcontroller may operate incompletely. • Do not leave +B input pins open. • Sample recommended circuit •Input/output equivalent circuit Protective diode Vcc Limiting ICLAMP resistor +B input (0 V to 16 V) P-ch N-ch R WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. DS07-16907-2E 65 MB91610 Series 2. Recommended Operating Conditions (VSS = AVSS = 0.0 V) Parameter Symbol Value Unit Min Typ Max VCC 3.0 ⎯ 3.6 V Analog power supply voltage AVCC 3.0 ⎯ 3.6 V Analog reference voltage AVRH AVSS ⎯ AVCC V Smoothing capacitor Cs ⎯ 4.7 ⎯ μF Operating temperature Ta − 40 ⎯ + 85 °C Power supply voltage Remarks AVCC ≤ VCC • C Pin Connection Diagram C This series CS WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. 66 DS07-16907-2E MB91610 Series 3. DC Characteristics (1) DC Characteristics (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Symbol Pin name Conditions Value Min ⎯ Typ 45 Max Normal operation Power supply current (Flash product) ⎯ 55 100 60 75 OSDC stopped Using USB mA CPU : 32 MHz, Peripheral : 32 MHz 130 Dot clock 50 MHz (PLL) Dot clock PLL is used Analog RGB DAC is mA used Digital RGB is not used CPU : 33 MHz, Peripheral : 33 MHz ICCO ⎯ 105 150 Dot clock 75 MHz (PLL) Dot clock PLL is used mA Analog RGB DAC is not used Digital RGB is used CPU : 33 MHz, Peripheral:33 MHz ⎯ 15 25 OSDC stopped mA Not using USB Peripheral : 33 MHz ⎯ 25 40 OSDC stopped UsmA ing USB Peripheral : 32 MHz VCC ICCS Remarks OSDC stopped Not using USB mA CPU : 33 MHz, Peripheral : 33 MHz ICC ⎯ Unit SLEEP mode ICCL Sub operation* ⎯ 150 550 μA ICCT Watch mode* ⎯ 120 450 μA ICCH STOP mode* ⎯ 65 320 μA CPU : 32 kHz Peripheral : 32 kHz * : Ta = + 25 °C and VCC = 3.3 V (Continued) DS07-16907-2E 67 MB91610 Series (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Symbol Pin name Conditions Value Min ⎯ Typ 35 Max Normal operation Power supply current (MASK product) ⎯ 50 80 45 60 OSDC stopped Using USB mA CPU : 32 MHz, Peripheral : 32 MHz 100 Dot clock 50 MHz (PLL) Dot clock PLL is used Analog RGB DAC is mA used Digital RGB is not used CPU : 33 MHz, Peripheral : 33 MHz ICCO ⎯ 80 110 Dot clock 75 MHz (PLL) Dot clock PLL is used mA Analog RGB DAC is not used Digital RGB is used CPU : 33 MHz, Peripheral:33 MHz ⎯ 15 25 OSDC stopped mA Not using USB Peripheral : 33 MHz ⎯ 25 40 OSDC stopped UsmA ing USB Peripheral : 32 MHz VCC ICCS Remarks OSDC stopped Not using USB mA CPU : 33 MHz, Peripheral : 33 MHz ICC ⎯ Unit SLEEP mode ICCL Sub operation* ⎯ 150 550 μA ICCT Watch mode* ⎯ 120 450 μA ICCH STOP mode* ⎯ 65 320 μA CPU : 32 kHz Peripheral : 32 kHz * : Ta = + 25 °C and VCC = 3.3 V (Continued) 68 DS07-16907-2E MB91610 Series (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter “H” level input voltage (hysteresis input) “L”level input voltage (hysteresis input) Symbol VIHS VILS “H” level output voltage VOH “L” level output voltage VOL Pin name Conditions P00 to P07, P10 to P17, P50 to P57, P70 to P77, PK0, PK1, DCKI, VSYNC, HSYNC, INIT, MD0, MD1 Value Unit Typ Max ⎯ VCC × 0.8 ⎯ VCC + 0.3 V P20 to P27, P30 to P37 ⎯ VCC × 0.8 ⎯ VSS + 5.5 V P00 to P07, P10 to P17, P20 to P27, P30 to P37, P50 to P57, P70 to P77, PK0, PK1, DCKI, VSYNC, HSYNC, INIT, MD0, MD1 ⎯ Vss − 0.3 ⎯ VCC × 0.2 V VCC = 3.0 V VCC − 0.5 IOH = − 4 mA ⎯ VCC V VSS ⎯ 0.4 V −5 ⎯ +5 μA Digital pin − 10 ⎯ + 10 μA Analog pin P00 to P07, P10 to P17, P20 to P27, P30 to P37, P50 to P57, P70 to P77, PK0, PK1, R0 to R4, G0 to G5, B0 to B4, VOA0 to VOA2, VOB, DCKO VCC = 3.0 V IOL = 4 mA Input leak current IIL ⎯ ⎯ Pull-up resistance value RPU Pull-up pin ⎯ 16.6 33 66 kΩ Pull-down resistance value RPD IBREAK ICD0 to ICD3 ⎯ 16.6 33 66 kΩ CIN Other than VCC, VSS, AVCC, AVSS, AVRH ⎯ ⎯ 10 15 pF Input capacitance Remarks Min 5 V tolerant MB91F610A only (Continued) DS07-16907-2E 69 MB91610 Series (Continued) (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Symbol Pin name Conditions Analog RGB reference voltage VREF VREF Analog RGB reference resistance RREF Analog RGB external load resistance RL Parameter 70 Value Unit Min Typ Max ⎯ 1.05 1.10 1.15 V VRO-VSSD ⎯ 2.4 2.7 ⎯ kΩ ROUT, GOUT, BOUT ⎯ ⎯ 150 160 Ω Remarks DS07-16907-2E MB91610 Series 4. AC Characteristics (1) Main Clock (MCLK) Input Standard (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Input frequency Input clock cycle Symbol Pin name Conditions Value Unit Remarks 48 MHz When crystal oscillator is connected 4 48 MHz When using external clock ⎯ 20.83 250 ns When using external clock Min Max ⎯ 4 ⎯ FCH tCYLH X0, X1 Input clock pulse width ⎯ PWH/tCYLH PWL/tCYLH 45 55 % When using external clock Input clock rise time and fall time tCF tCR ⎯ ⎯ 5 ns When using external clock Internal operating clock frequency Internal operating clock cycle time DS07-16907-2E FCS ⎯ ⎯ ⎯ 33 MHz Source clock FCC ⎯ ⎯ ⎯ 33 MHz CPU clock FCP ⎯ ⎯ ⎯ 33 MHz Peripheral bus clock tCYCS ⎯ ⎯ 30 ⎯ ns Source clock tCYCC ⎯ ⎯ 30 ⎯ ns CPU clock tCYCP ⎯ ⎯ 30 ⎯ ns Peripheral bus clock 71 MB91610 Series • Operating guaranteed range (Not using USB) Power supply voltage Vcc (V) • When the main clock is selected (DIVB=000) 3.6 3.3 3.0 2.7 2.4 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 Internal operation clock Fcc (MHz) Power supply voltage Vcc (V) • When the PLL clock is selected (DIVB=000) 3.6 3.3 3.0 2.7 2.4 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 Internal operation clock Fcc (MHz) Power supply voltage Vcc (V) • When the sub clock is selected 3.6 3.3 3.0 2.7 2.4 0 4 8 12 16 20 24 28 32 Internal operation clock Fcc (kHz) 72 DS07-16907-2E MB91610 Series • Operating guaranteed range (at using USB) • When the main clock is selected (DIVB=000*1) Power supply voltage Vcc (V) 3.6 3.3 3.0 2.7 2.4 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 Internal operation clock Fcc (MHz) • When the PLL clock is selected (DIVB=000*1, ODS=10*3, PMS=0111*4, PDS=0000*2, X0=4 MHz or DIVB=000*1, ODS=10*3, PMS=0001*4, PDS=0010*2, X0=48 MHz) Power supply voltage Vcc (V) 3.6 3.3 3.0 2.7 2.4 0 4 8 12 16 20 24 28 32 Internal operation clock Fcc (MHz) *1 : The values other than DIVB = 000 are omitted. *2 : The values other than PDS = 0000, 0001,0010 are omitted. *3 : The values other than ODS = 10 are omitted. *4 : The values other than PMS = 0001,0111 are omitted. Note: DIVB ODS PDS PMS : Base clock division configuration bit : PLL macro oscillation clock division rate select bit : PLL input clock division select bit : PLL clock multiple rate select bit DS07-16907-2E 73 MB91610 Series (2) Sub Clock (SBCLK) Input Standard (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Symbol Input frequency Pin name Conditions Value Unit Remarks ⎯ kHz When crystal oscillator is connected 32.768 ⎯ kHz When using external clock ⎯ 30.518 ⎯ μs When using external clock Min Typ Max ⎯ ⎯ 32.768 ⎯ ⎯ ⎯ FCL X0A, X1A Input clock cycle tCYLL Input clock pulse width ⎯ PWH / tCYLL PWL / tCYLL 45 ⎯ 55 % When using external clock Input clock rise time and fall time tCF tCR ⎯ ⎯ ⎯ 200 ns When using external clock <When external clock input> tCYLH, tCYLL X0 X0A 0.8 × VCC 0.8 × VCC 0.2 × VCC PWH 0.2 × VCC PWL tCF 74 0.8 × VCC tCR DS07-16907-2E MB91610 Series (3) Conditions of PLL (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Value Symbol Min Typ Max Unit Remarks Time from when the PLL starts operating until the oscillation stabilizes PLL oscillation stabilization wait time (LOCK UP time) tLOCK 600 ⎯ ⎯ μs PLL oscillation stabilization wait time for OSDC (LOCK UP time) tL 10 ⎯ ⎯ ms PLL input clock frequency fPLLI 4 ⎯ 24 MHz PLL multiple rate ⎯ 4 ⎯ 24 fPLLO 96 ⎯ 100 PLL macro oscillation clock frequency multiplied ODS × PMS by MHz (4) Regulator Voltage Stabilization Wait Time (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Value Symbol Regulator voltage stabilization wait time tREG Min Max 50 ⎯ Unit Remarks μs Time taken for the regulator voltage to stabilize Note : This is the time from when the external power supply stabilizes (after reaching 3.0 V). (5) Reset Input Standards (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Reset input time (At power-on, main oscillation stop mode) Symbol INIT Value Conditions tINITX Reset input time (At other times) Reset input rise time and fall time Pin name Unit Min Max Oscillation time of oscillator + 10 tCYLH ⎯ ns 10 tCYLH ⎯ ns ⎯ 10 ms ⎯ tINITXF tINITXR Remarks * * : After the supply voltage has stabilized, it takes a further 50 μs until the internal supply stabilizes. Hold the input to the INIT pin during that period. • At power-on • When in stop mode • When in sub mode and sub watch mode when the main oscillation is stopped. tINITX VIHS VIHS INIT VILS tINITXF DS07-16907-2E VILS tINITXR 75 MB91610 Series (6) Base Timer Input Timing • Timer input timing Parameter Input pulse width (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Pin name Conditions Min Max tTIWH tTIWL TIOAn/TIOBn (When used as ECK, TIN) ⎯ 2 tCYCP ⎯ tTIWH ECK VIHS Input pulse width Value Symbol Pin name Conditions Min Max tTRGH tTRGL TIOAn/TIOBn (When used as TGIN) ⎯ 2 tCYCP ⎯ VIHS 76 VILS (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) tTRGH TGIN ns VIHS VILS • Trigger Input Timing Unit tTIWL TIN Parameter Value Symbol Unit ns tTRGL VIHS VILS VILS DS07-16907-2E MB91610 Series (7) Synchronous serial (CSIO) timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) • Synchronous serial (SPI = 0, SCINV = 0) Value Parameter Symbol Pin name Conditions Unit Min Max Serial clock cycle time tSCYC SCKn 4tCYCP ⎯ ns SCK ↓ → SOUT delay time tSLOVI SCKn SOUTn − 30 + 30 ns SIN → SCK ↑ setup time tIVSHI SCKn SINn 57 ⎯ ns SCK ↑ → SIN hold time tSHIXI SCKn SINn 0 ⎯ ns Serial clock “L” pulse width tSLSH SCKn 2tCYCP − 10 ⎯ ns Serial clock “H” pulse width tSHSL SCKn tCYCP + 10 ⎯ ns SCK ↓ → SOUT delay time tSLOVE SCKn SOUTn ⎯ 48 ns SIN → SCK ↑ setup time tIVSHE SCKn SINn 25 ⎯ ns SCK ↑ → SIN hold time tSHIXE SCKn SINn 20 ⎯ ns SCK fall time tF SCKn ⎯ 5 ns SCK rise time tR SCKn ⎯ 5 ns Internal shift clock operation External shift clock operation Notes: • The above standards apply to CLK synchronous mode. • tCYCP indicates the peripheral clock cycle time. • When the external load capacitance C = 50 pF. tSCYC VOH SCK VOL VOL tSLOVI VOH SOUT VOL tIVSHI tSHIXI VIHS VIHS VILS VILS SIN MS bit = 0 DS07-16907-2E 77 MB91610 Series tSLSH tSHSL VIHS SCK tF VIHS VILS VILS VIHS tR tSLOVE VOH SOUT VOL tIVSHE tSHIXE VIHS VIHS VILS VILS SIN MS bit = 1 • Synchronous serial (SPI = 0, SCINV = 1) Parameter Symbol Pin name Serial clock cycle time tSCYC SCK ↑→ SOUT delay time Conditions Value Unit Min Max SCKn 4tCYCP ⎯ ns tSHOVI SCKn SOUTn − 30 + 30 ns SIN → SCK ↓ setup time tIVSLI SCKn SINn 57 ⎯ ns SCK ↓ → SIN hold time tSLIXI SCKn SINn 0 ⎯ ns Serial clock “L” pulse width tSLSH SCKn 2tCYCP − 10 ⎯ ns Serial clock “H” pulse width tSHSL SCKn tCYCP + 10 ⎯ ns SCK ↑ → SOUT delay time tSHOVE SCKn SOUTn ⎯ 48 ns SIN → SCK ↓ setup time tIVSLE SCKn SINn 25 ⎯ ns SCK ↓ → SIN hold time tSLIXE SCKn SINn 20 ⎯ ns SCK fall time tF SCKn ⎯ 5 ns SCK rise time tR SCKn ⎯ 5 ns Internal shift clock operation External shift clock operation Notes: • The above standards apply to CLK synchronous mode. • tCYCP indicates the peripheral clock cycle time. • When the external load capacitance C = 50 pF. 78 DS07-16907-2E MB91610 Series tSCYC VOH VOH VOL SCK tSHOVI VOH SOUT VOL tIVSLI SIN tSLIXI VIHS VIHS VILS VILS MS bit = 0 tSHSL VIHS SCK tSLSH VIHS VILS VILS VILS tF tR tSHOVE VOH SOUT VOL tIVSLE SIN tSLIXE VIHS VIHS VILS VILS MS bit = 1 DS07-16907-2E 79 MB91610 Series • Synchronous serial (SPI = 1,SCINV = 0) Parameter Symbol Pin name Serial clock cycle time tSCYC SCK ↑→ SOUT delay time Value Conditions Unit Min Max SCKn 4tCYCP ⎯ ns tSHOVI SCKn SOUTn − 30 + 30 ns SIN → SCK ↓ setup time tIVSLI SCKn SINn 57 ⎯ ns SCK ↓ → SIN hold time tSLIXI SCKn SINn 0 ⎯ ns SOUT → SCK ↓ delay time tSOVLI SCKn SOUTn 2tCYCP − 30 ⎯ ns Serial clock “L” pulse width tSLSH SCKn 2tCYCP − 10 ⎯ ns Serial clock “H” pulse width tSHSL SCKn tCYCP + 10 ⎯ ns SCK ↑ → SOUT delay time tSHOVE SCKn SOUTn ⎯ 48 ns SIN → SCK ↓ setup time tIVSLE SCKn SINn 25 ⎯ ns SCK ↓ → SIN hold time tSLIXE SCKn SINn 20 ⎯ ns SCK fall time tF SCKn ⎯ 5 ns SCK rise time tR SCKn ⎯ 5 ns Internal shift clock operation External shift clock operation Notes: • The above standards apply to CLK synchronous mode. • tCYCP indicates the peripheral clock cycle time. • When the external load capacitance C = 50 pF. tSCYC VOH SCK VOL tSHOVI VOL tSOVLI SOUT VOH VOL VOH VOL tIVSLI SIN tSLIXI VIHS VILS VIHS VILS MS bit = 0 80 DS07-16907-2E MB91610 Series tSHSL tSLSH VIHS SCK VILS tSHOVE tR VOH VOL VOH VOL tIVSLE SIN VIHS VILS tF * SOUT VIHS VILS tSLIXE VIHS VILS VIHS VILS MS bit = 1 * : Changes when writing to TDR register • Synchronous serial (SPI = 1, SCINV = 1) Parameter Symbol Pin name Serial clock cycle time tSCYC SCK ↓ → SOUT delay time Conditions Value Unit Min Max SCKn 4tCYCP ⎯ ns tSLOVI SCKn SOUTn − 30 + 30 ns SIN → SCK ↑ setup time tIVSHI SCKn SINn 57 ⎯ ns SCK ↑ → SIN hold time tSHIXI SCKn SINn 0 ⎯ ns SOUT → SCK ↑ delay time tSOVHI SCKn SOUTn 2tCYCP − 30 ⎯ ns Serial clock “L” pulse width tSLSH SCKn 2tCYCP − 10 ⎯ ns Serial clock “H” pulse width tSHSL SCKn tCYCP + 10 ⎯ ns SCK ↓ → SOUT delay time tSLOVE SCKn SOUTn ⎯ 48 ns SIN → SCK ↑ setup time tIVSHE SCKn SINn 25 ⎯ ns SCK ↑ → SIN hold time tSHIXE SCKn SINn 20 ⎯ ns SCK fall time tF SCKn ⎯ 5 ns SCK rise time tR SCKn ⎯ 5 ns Internal shift clock operation External shift clock operation Notes: • The above standards apply to CLK synchronous mode. • tCYCP indicates the peripheral clock cycle time. • When the external load capacitance C = 50 pF. DS07-16907-2E 81 MB91610 Series tSCYC VOH SCK VOH VOL tSLOVI tSOVHI VOH VOL VOH VOL SOUT tIVSHI tSHIXI VIHS VILS SIN VIHS VILS MS bit = 0 tSHSL tR tSLSH VIHS SCK VIHS VILS tSLOVE VILS VIHS VILS VOH VOL VOH VOL SOUT tIVSHE tSHIXE VIHS VILS SIN tF VIHS VILS MS bit = 1 • External clock (EXT = 1) : asynchronous only Parameter Symbol Serial clock “L” pulse width tSLSH Serial clock “H” pulse width tSHSL SCK fall time tF SCK rise time tR VIHS VILS 82 CL = 50 pF tSHSL tR SCK Conditions Value Max tCYCP + 10 ⎯ ns tCYCP + 10 ⎯ ns ⎯ 5 ns ⎯ 5 ns tSLSH VIHS VILS Unit Min tF VIHS VILS DS07-16907-2E MB91610 Series (8) Free-run Timer Clock, Reload Timer Event Input,Input Capture Input, Interrupt Input Timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Symbol tTIWH tTIWL Input pulse width Value Pin name Conditions Min Max FRCK TMIn INn ⎯ 2 tCYCP ⎯ ns *1 ⎯ 3 tCYCP ⎯ ns *1 ⎯ 1.0 ⎯ μs *2 INTn Unit Remarks *1 : tCYCP indicates peripheral clock cycle time, except when in stop mode, in main timer mode and in watch mode. *2 : When in stop mode, in main timer mode, or in watch mode. FRCK TMIn INn INTn tTIWH tTIWL VIHS VILS VIHS VILS (9) A/D Converter Trigger Input Timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Value Parameter Symbol Pin name Conditions Min Max A/D converter trigger input tTADTGL tTADTGH ADTRG ⎯ 2 tCYCP ⎯ Unit ns Remarks * * : tCYCP indicates peripheral clock cycle time. tTADTGL tTADTGH ADTRG VIHS VILS DS07-16907-2E VIHS VILS 83 MB91610 Series (10) I2C Timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Symbol Pin name Conditions Typical mode High-speed mode*3 Min Max Min Max Unit fSCL SCKn (SCLn) 0 100 0 400 kHz “(Repeated) START condition” hold time SDA ↓ → SCL ↓ tHDSTA SOUTn (SDAn) SCKn (SCLn) 4.0 ⎯ 0.6 ⎯ μs SCL clock “L” width tLOW SCKn (SCLn) 4.7 ⎯ 1.3 ⎯ μs SCL clock “H” width tHIGH SCKn (SCLn) 4.0 ⎯ 0.6 ⎯ μs “Repeated START condition” setup time SCL ↑→ SDA ↓ tSUSTA SCKn (SCLn) 4.7 ⎯ 0.6 ⎯ μs tHDDAT SOUTn (SDAn) SCKn (SCLn) 0 3.45*2 0 0.9*3 μs tSUDAT SOUTn (SDAn) SCKn (SCLn) 250 ⎯ 100 ⎯ ns “STOP condition” setup time SCL↑→ SDA↑ tSUSTO SOUTn (SDAn) SCKn (SCLn) 4.0 ⎯ 0.6 ⎯ μs Bus free time between “STOP condition” and “START condition” tBUF ⎯ 4.7 ⎯ 1.3 ⎯ μs Noise filter tSP ⎯ 2 tCYCP *4 ⎯ 2 tCYCP *4 ⎯ ns SCL clock frequency Data hold time SCL ↓ → SDA ↓ ↑ Data setup time SDA ↓ ↑→ SCL↑ CL = 50 pF, R= (Vp/IOL) *1 ⎯ *1 : R and C represent the pull-up resistance and load capacitance of the SCL and SDA lines, respectively. Vp indicates the power supply voltage of the pull-up resistance and IOL indicates VOL guaranteed current. *2 : The maximum tHDDAT must satisfy that it doesn't extend at least “L” period (tLOW) of device's SCL signal. *3 : A high-speed mode I2C bus device can be used on a standard mode I2C bus system as long as the device satisfies the requirement of “tSUDAT ≥ 250 ns”. *4 : tCYCP is the peripheral clock cycle time. To use I2C, set the peripheral bus clock at 8 MHz or more. 84 DS07-16907-2E MB91610 Series SDA tSUSTA tLOW tSUDAT tBUF SCL tHDSTA tHDDAT tHIGH tHDSTA tSP tSUSTO (11) Analog RGB (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Symbol Analog RGB output delay tVAD Analog RGB output settling time tVAS Pin name ROUT, GOUT, BOUT Conditions VREF = 1.1 V, VDDD = 3.3 V, VRO* = 2.7 kΩ Value Unit Remarks ⎯ ns 50 MHz (Max) 20 ns Min Typ Max ⎯ 12 ⎯ ⎯ * : VRO is an external resistance for DAC. • Display signal output timing DCKI tVAD 1 LSB ROUT 1 LSB GOUT BOUT tVAS DS07-16907-2E 85 MB91610 Series (12) Digital RGB Vertical synchronous/ horizontal synchronous/ display output control signal input timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Symbol Pin name Horizontal synchronous signal cycle time tHCYC HSYNC Horizontal synchronous signal pulse width tWH HSYNC Horizontal synchronous signal setup time tDHST Horizontal synchronous signal hold time Value Unit Remarks Min Max 100 + tWH ⎯ Dot clock 20 ⎯ Dot clock ⎯ 6 μs 4 ⎯ ns tDHHD 0 ⎯ ns Vertical synchronous signal setup time tHVST 5 ⎯ Dot clock Vertical synchronous signal hold time tHVHD 1H − 5 ⎯ Dot clock Input synchronous signal rising/ falling time tDR tDF ⎯ 2 ns HSYNC VSYNC HSYNC, VSYNC * * : H stands for the horizontal synchronous signal. 1 synchronous is 1 unit. • Horizontal synchronous signal and display output control signal input timing 0.8 VCC DCKI 0.2 VCC tDHST tDHHD 0.8 VCC 0.8 VCC 0.2 VCC 0.2 VCC HSYNC tDR, tDF 86 DS07-16907-2E MB91610 Series • Horizontal synchronous signal input tHCYC tWH tDF 0.8 VCC HSYNC tDR 0.8 VCC 0.8 VCC 0.2 VCC 0.2 VCC • Vertical synchronous signal input timing • Detect VSYNC at HSYNC leading edge tDF HSYNC tDF tWH tDR 0.8 VCC 0.8 VCC 0.2 VCC 0.2 VCC tHVST tHVHD 0.8 VCC tDR 0.8 VCC VSYNC 0.2 VCC 0.2 VCC • Detect VSYNC at HSYNC trailing edge tWH tDF HSYNC 0.8 VCC 0.8 VCC 0.2 VCC 0.2 VCC tDF tHVST 0.8 VCC VSYNC DS07-16907-2E tDR tHVHD tDR 0.8 VCC 0.2 VCC 0.2 VCC 87 MB91610 Series (13) Display signal timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Symbol Pin name tDIF DCKI Dot clock input cycle time tDIWH Dot clock input pulse width tDIWL Dot clock output delay time1 tPDCS Display signal output delay time I1 tPDI1 Display signal output delay time O1 tPDO1 DCKI DCKO R0 to R4, G0 to G5, B0 to B4, VOB, VOA0 to VOA2 Value Unit Remarks 75 MHz *1 5 ⎯ ns 5 ⎯ ns 2.2 8 ns *2 2 8.3 ns *2 −4 +5 ns *2 Min Max 8 *1 *1 : Input continuous signal to the dot clock. *2 : Output load 16 pF Note: Actual display output varies depending on what is controlled, such as display output control and display location control in each display layer. • Display signal output timing tDIF tDIWH DCKI 0.8 VCC tDIWL 0.8 VCC 0.2 VCC tPDCS 0.2 VCC tPDCS 0.8 VCC DCKO tPDO1 0.2 VCC tPDI1 R0 to R4 G0 to G5 B0 to B4 VOB VOA0 to VOA2 88 0.8 VCC 0.2 VCC DS07-16907-2E MB91610 Series 5. Electrical Characteristics for the A/D Converter (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Pin name Value Min Typ Max Unit Resolution ⎯ ⎯ ⎯ 10 bit Total error ⎯ −5 ⎯ +5 LSB Linearity error ⎯ − 3.5 ⎯ + 3.5 LSB Differential linearity error ⎯ −3 ⎯ +3 LSB Zero transition voltage AN0 to AN7 − 1.5 + 0.5 +4 LSB Full transition voltage AN0 to AN7 AVRH − 4 AVRH − 1.5 AVRH + 0.5 LSB ⎯ μs PCLK = 33 MHz 1.2* ⎯ ⎯ μs PCLK = 33 MHz ⎯ ⎯ 3.5 mA D/A stopped ⎯ ⎯ 11 μA ⎯ ⎯ 0.6 mA AVRH = 3.0 V ⎯ ⎯ 5 μA ⎯ 0.72* Conversion time ⎯ 1 AVCC 3 Reference power supply current (between AVRH and AVSS) AVRH Analog input capacity ⎯ ⎯ ⎯ 8.5 pF Interchannel disparity ⎯ ⎯ ⎯ 4 LSB Analog port input current AN0 to AN7 ⎯ ⎯ 10 μA Analog input voltage AN0 to AN7 AVSS ⎯ AVRH V AVRH AVSS ⎯ AVCC V Standard voltage AVCC = 3.3 V, AVRH = 3.3 V ⎯ Compare time Power supply current (analog + digital) Remarks At power-down*2 At power-down*2 *1 : Depending on the clock cycle supplied to peripheral resources. Ensure that it satisfies the value; PCLK cycle × more than 4 + the value calculated from (Equation 1). The condition of the minimum conversion time is when PCLK = 33 MHz, the value of sampling time: 0.424 μs, external impedance: 1.4 kΩ or less and compare time: 0.72 μs. (Continued) DS07-16907-2E 89 MB91610 Series (Continued) *2 : The current when the CPU is in stop mode and the A/D converter is not operating. *3 : Compare time = {(CT + 1) × 10 + 4} × peripheral clock (PCLK) period. (CT indicates compare time setting bits.) The condition of the minimum compare time is when CT = 1 and PCLK = 33 MHz. Rext AN0 to AN7 Analog input pin Rin Comparator Analog signal source Cin Rin Cin Approx. 5.3 kΩ Approx. 8.5 pF The output impedance of the external circuit connected to the analog input affects the sampling time of the A/D converter. Design the output impedance of the output circuit such that the required sampling time is less than the value of TS calculated from the following equation. (Equation 1) Ts = (Rin + Rext) × Cin × 8 Ts : Sampling time Rin : Input resistance of A/D = 5.3 kΩ Cin : Input capacitance of A/D = 8.5 pF Rext : Output impedance of external circuit If the sampling time is set as 600 ns, 600 ns ≥ (5.3 kΩ + Rext) × 8.5 pF × 8 ∴Rext ≤ 3.5 kΩ And the impedance of the external circuit therefore needs to be 3.5 kΩ or less. 90 DS07-16907-2E MB91610 Series • Definition of 10-bit A/D Converter Terms • Resolution • Linearity error : Analog variation that is recognized by an A/D converter. : Deviation of the line between the zero-transition point (0000000000←→0000000001) and the full-scale transition point (1111111110←→1111111111) from the actual conversion characteristics. • Differential linearity error : Deviation from the ideal value of the input voltage that is required to change the output code by 1 LSB. • Total error : Difference between the actual value and the theoretical value. The total error includes zero transition error, full-scale transition error, and linear error. Linearity error 3FFH Differential linearity error Actual conversion characteristics Actual conversion characteristics (N + 1)H 3FEH {1 LSB (N − 1) + V OT} VFST Ideal characteristics (Actuallymeasured value) VNT 004H (Actually-measured value) 003H Actual conversion characteristics Ideal characteristics 002H 001H VOT AVSS Digital output Digital output 3FDH NH (N − 1)H VNT (N − 2)H (Actually-measured value) Analog input V(N+1)T AVRH (Actually-measured value) (Actually-measured value) Actual conversion characteristics AVSS AVRH Analog input VNT − {1 LSB × (N − 1) + VOT} [LSB] 1 LSB' V (N+1) T − VNT − 1 [LSB] Differential linearity error of digital output N = 1 LSB VFST − VOT 1 LSB = 1022 Linearity error of digital output N = N VOT VFST VNT : A/D converter digital output value. : Voltage at which the digital output changes from 000H to 001H. : Voltage at which the digital output changes from 3FEH to 3FFH. : Voltage at which the digital output changes from (N − 1)H to NH. (Continued) DS07-16907-2E 91 MB91610 Series (Continued) Total error 3FFH 1.5 LSB' 3FEH Actual conversion characteristics 3FDH Digital output {1 LSB' (N − 1) + 0.5 LSB'} 004H VNT (Actually-measured value) Actual conversion characteristics 003H 002H 001H Ideal characteristics 0.5 LSB' AVSS Analog input 1 LSB' (Ideal value) Total error of digital output N AVRH AVRH − AVSS [V] 1024 VNT − {1 LSB' × (N − 1) + 0.5 LSB'} = 1 LSB' = N : A/D converter digital output value. VNT : Voltage at which the digital output changes from (N + 1)H to NH. VOT’ (Ideal value) = AVSS + 0.5 LSB [V] VFST’ (Ideal value) = AVRH − 1.5 LSB [V] 92 DS07-16907-2E MB91610 Series 6. Electrical Characteristics for the Analog RGB D/A Converter (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Value Unit Remarks Min Typ Max ⎯ ⎯ 5 bit ROUT, BOUT ⎯ ⎯ 6 bit GOUT Linearity error − 2.0 ⎯ + 2.0 LSB When the output is unloaded Differential linearity error − 1.0 ⎯ + 1.0 LSB When the output is unloaded Analog output impedance ⎯ 250 ⎯ kΩ Analog output < 1.0 V Analog current (R/B/GOUT) 4.5 5.2 5.8 mA Full-scale 0 2 20 μA Zero-scale Power supply current (VDDD) ⎯ 25 27 mA VREF = 1.1 V Resolution DS07-16907-2E 93 MB91610 Series 7. USB Characteristics (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Input High level voltage Pin name Conditions Value Min Max Unit Remarks VIH ⎯ 2.0 VCC + 0.3 V *1 VIL ⎯ VSS − 0.3 0.8 V *1 VDI ⎯ 0.2 ⎯ V *2 VCM ⎯ 0.8 2.5 V *2 VOH External pull-down resistance = 15 kΩ 2.8 3.6 V *3 VOL External pull-up resistance = 1.5 kΩ 0.0 0.3 V *3 VCRS ⎯ 1.3 2.0 V *4 Rise time tFR ⎯ 4 20 nS *5 Fall time tFF ⎯ 4 20 nS *5 Rise/fall time matching tRFM ⎯ 90 111.11 % *5 Output impedance ZDRV ⎯ 28 44 Ω Including Rs = 27 Ω Transceiver edge rate control capacitance CEDGE ⎯ ⎯ 75 pF *6 RS ⎯ 25 30 Ω Recommended value:27 Ω Input Low level voltage Input characteristics Differential input sensitivity Differential common mode input voltage Output High level voltage Output Low level voltage Output characteristics Crossover voltage Input capacitance Symbol Series resistance UDP, UDM *1 : The switching threshold voltage of Single-End-Receiver of USB I/O buffer is set as within VIL (Max) = 0.8 [V], VIH (Min) = 2.0 [V] (TTL input standard). There are some hystereses to lower noise sensitivity. (Continued) 94 DS07-16907-2E MB91610 Series *2 : Use differential-Receiver to receive USB differential data signal. Differential-Receiver has 200 [mV] of differential input sensitivity when the differential data input is within 0.8 [V] to 2.5 [V] to the local ground reference level. Above voltage range is the common mode input voltage range. Minimum differential input sensitivity [V] 1.0 [V] 0.2 [V] 0.8 [V] 2.5 [V] Common mode input voltage [V] *3 : The output drive capability of the driver is below 0.3 [V] at Low-State (VOL) (to 3.6 [V] and 1.5 kΩ load), and 2.8 [V] or above (to the VSS and 1.5 kΩ load) at High-State (VOH). *4 : The cross voltage of the external differential output signal (D + /D − ) of USB I/O buffer is within 1.3 [V] to 2.0 [V]. D+ Max 2.0 [V] VCRS standard range Min 1.3 [V] D- *5 : Regarding tFR ,tFF, tRFM They indicate rise time (Trise) and fall time (Tfall) of the differential data signal. They are defined by the time between 10% to 90% of the output signal voltage. For full-speed buffer, tFR/tFF ratio is regulated as within ±10% to minimize RFI emission. Rise time UDP UDM VCRS 90% Fall time 90% 10% 10% tFR tFF (Continued) DS07-16907-2E 95 MB91610 Series (Continued) *6 : The place to connect transceiver edge rate control capacitance CEDGE For this USB I/O, it is recommended to use CEDGE control capacitor. For USB Max standard as 75 pF, please control the edge characteristic of output waveform by connecting 30 [pF] to 50 [pF] (recommended value : 47 [pF] =: 50[pF]) to D + and D − lines when implementing on the board. RS = 27 Ω +D CEDGE 3-State RS = 27 Ω -D CEDGE Driver output impedance 3 Ω to 19 Ω Rs serial resistance value 25 Ω to 30 Ω Please apply 27 Ω of serial resistance value as a recommended value. 96 DS07-16907-2E MB91610 Series 8. Flash Memory Write/Erase Characteristics (VCC = 3.3 V, Ta = + 25 °C) Parameter Value Unit Remarks 3.6 s Excludes write time prior to internal erase 23 370 μs Not including system-level overhead time. ⎯ 10.8 43.2 s Excludes write time prior to internal erase 10000 ⎯ ⎯ cycle Average Ta ≤ + 85 °C 10*2 ⎯ ⎯ year Min Typ Max Sector erase time ⎯ 0.9 Half word (16bits) write time ⎯ Chip erase time* 1 Erase/write cycles Flash memory data hold time Average Ta ≤ + 85 °C *1 : The chip erase time is the sector erase time multiplied across all sectors. *2 : This value comes from the technology qualification (using Arrhenius equation to translate high temperature measurements into normalized value at + 85 °C) . DS07-16907-2E 97 MB91610 Series ■ ORDERING INFORMATION Part number MB91F610APMC MB91613PMC 98 Package 120-pin plastic LQFP (FPT-120P-M21) DS07-16907-2E MB91610 Series ■ PACKAGE DIMENSION 120-pin plastic LQFP Lead pitch 0.50 mm Package width × package length 16.0 × 16.0 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.70 mm MAX Weight 0.88 g (FPT-120P-M21) 120-pin plastic LQFP (FPT-120P-M21) 18.00±0.20(.709±.008)SQ 16.00±0.10(.630±.004)SQ 90 61 91 60 0.08(.003) Details of "A" part +0.20 1.50 –0.10 +.008 (Mounting height) .059 –.004 INDEX 0~8° 120 LEAD No. 1 30 0.50(.020) C "A" 31 0.22±0.05 (.009±.002) 0.08(.003) M 2001-2008 FUJITSU MICROELECTRONICS LIMITED F120033S-c-3-4 0.145 .006 +0.05 –0.03 +.002 –.001 0.60±0.15 (.024±.006) 0.10±0.05 (.004±.002) (Stand off) 0.25(.010) Dimensions in mm (inches). Note: The values in parentheses are reference values. Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/package/en-search/ DS07-16907-2E 99 MB91610 Series ■ MAIN CHANGES IN THIS EDITION Page Section ⎯ ⎯ Change Results Changed the part number. (MB91F610 → MB91F610A) Added “MB91613” to the part number. Changed the terms. (USB function with Mini-HOST → USB function/ HOST) (Mini-HOST → HOST) ■ FEATURES Changed the explanation of “• USB HOST”. (• Support of bulk and interrupt transfer (Only using endpoint1 and endpoint2) → • Support control transfer, bulk transfer, interrupt transfer, and isochronous transfer) 7 ■ PIN ASSIGNMENT Added the note *. 11 ■ PIN DESCRIPTION Changed “I/O circuit type” of the pins number 69, 70 and 71. (L → F, L) 4 Changed “Function” of the pin number 83 to 88, and 92 to 95. (Added “N.C. pin for MASK products.”.) 12 21 ■ I/O CIRCUIT TYPE Changed “Remarks” of the Type L. (Added “• Flash memory product only”.) 27 ■ HANDLING DEVICES Added “• OSDC output pin”. 31 ■ MEMORY SPACE 2.Memory map Corrected the table. (Flash/ROM → FLASH) (Added 000F 8000H) 39 ■ I/O MAP Corrected “Initial value after reset”. (FSTR:-------0 → -------1) 43 64 65 Corrected “Block” for the line, 0000 0498H to 0000 049CH. (Changed to “Reserved”.) ■ ELECTRICAL CHARACTERISTICS Changed the notation of “Rating Max” for “Input voltage”. 1. Absolute Maximum Ratings (VSS + 4.0 → VCC + 0.3 ( ≤ 4.0)) Corrected “Remarks” for “Input voltage”. (5 V tolerant*7 → 5 V tolerant) (USB I/O*7 → USB I/O) Changed from “Power consumption” to “Power consumption (Flash product)”. Added “Power consumption (MASK product)”. Corrected the description of *8. (Deleted “ • Note that if the + B signal is input at power-on, since the power is supplied through the pin, the power supply voltage may become the voltage at which a power-on reset does not work.”.) (Continued) 100 DS07-16907-2E MB91610 Series Page 67 Section Change Results ■ ELECTRICAL CHARACTERISTICS Changed from “Power supply current” to “Power supply current 3. DC Characteristics (Flash product)”. (1) DC Characteristics Changed “Value” for ICCO. (Typ : 150 → 100 and 130 → 105) (Max : 180 → 130) 68 Added “Power supply current (MASK product)”. 69 Added PK0, PK1, INIT, MD0, and MD1 to “Pin name" for ““H” level input voltage (hysteresis input)”, and ““L” level input voltage (hysteresis input)”. Added PK0 and PK1 to “Pin name” for ““H” level output voltage”, and ““L” level output voltage”. 71 4. AC Characteristics Added the sentence, “When crystal oscillator is connected” to (1) Main Clock (MCLK) Input Standard “Remarks” for “Input frequency”. Added the sentence, “When using external clock” to “Remarks” for “Input clock cycle”, and “Input clock pulse width”. 72 Corrected “ • Operating guaranteed range (Not using USB)”. (Changed from “ • Operating guaranteed range” to “ • Operating guaranteed range (Not using USB)”.) 73 Corrected “ • Operating guaranteed range (at using USB)”. (Added *1 to *4 to each value.) (Changed from “VMS” to “PMS” for “ • When the PLL clock is selected”.) (Added the note at the bottom of the page.) 74 (2) Sub Clock (SBCLK) Input Standard Added the column, “Remarks”. Divided the line, “Input frequency” into two lines, “When crystal oscillator is connected”, and “When using external clock”. Added “Input clock pulse width”, and “Input clock rise time and fall time”. Corrected the table. (Added “< When external clock input>”.) (Deleted “X1” and “X1A”.) (3) Conditions of PLL Changed from “(3) PLL Oscillation Stabilization Wait Time (LOCK UP Time)” to “(3) Conditions of PLL”. Added the column, “Typ” below “Value”. Added “PLL input clock frequency”, “PLL multiple rate”, and “PLL macro oscillation clock frequency”. (5) Reset Input Standards Added “Reset input rise time and fall time”. Added “VIHS, tINITXF, tINITXR” to the table. 5. Electrical Characteristics for the A/D Converter Added “Compare time”. Corrected the note, *1. (compare time: 0.73 μs → compare time: 0.72 μs) Added the note *3. 75 89, 90 91, 92 Corrected “ • Definition of 10-bit A/D Converter Terms”. (1LSB → 1LSB') (Continued) DS07-16907-2E 101 MB91610 Series (Continued) Page 93 95 98 Section Change Results ■ ELECTRICAL CHARACTERISTICS Corrected “Resolution”. 6. Electrical Characteristics for the Deleted the description with * at the lower part of the table. Analog RGB D/A Converter 7. USB Characteristics Corrected the note, *3. (Added “at High-State (VOH)”.) ■ ORDERING INFORMATION Changed the part number. (MB91F610PMC → MB91F610APMC) Added “MB91613PMC” to the part number. The vertical lines marked in the left side of the page show the changes. 102 DS07-16907-2E MB91610 Series MEMO DS07-16907-2E 103 MB91610 Series FUJITSU MICROELECTRONICS LIMITED Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3329 http://jp.fujitsu.com/fml/en/ For further information please contact: North and South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://www.fma.fujitsu.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LTD. 151 Lorong Chuan, #05-08 New Tech Park 556741 Singapore Tel : +65-6281-0770 Fax : +65-6281-0220 http://www.fmal.fujitsu.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Pittlerstrasse 47, 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/microelectronics/ FUJITSU MICROELECTRONICS SHANGHAI CO., LTD. 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