MB91605A Series

The following document contains information on Cypress products.
FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-16903-4E
32-bit Microcontroller
CMOS
FR80 MB91605A Series
MB91605A
■ DESCRIPTION
The FR family* is a line of microcontrollers based on a 32-bit RISC CPU that contains a variety of built-in I/O
resources for embedded control applications which require high-performance, high-speed CPU processing.
The MB91605A series of microcontrollers are based on the FR80 family and offer enhanced bus access that is
optimal for embedded applications for controlling DVD players, printers, TVs, and PDPs.
* : FR, the abbreviation of FUJITSU RISC controller, is a line of products of Fujitsu Semiconductor Limited.
■ FEATURES
1. FR CPU
•
•
•
•
32-bit RISC load/store architecture with a five-stage pipeline
Operating frequency 80 MHz (With PLL : 16 MHz base frequency × 5)
16-bit fixed length instructions (basic instructions), 1 instruction per cycle
Instructions including memory-to-memory transfer, bit manipulation, barrel shift instructions : Instruction suitable
for embedded applications
• Function entry/exit instructions and register data multi-read store instructions : Instructions supporting C
language
• Register interlock function : Facilitates assembly-language coding
(Continued)
For the information for microcontroller supports, see the following web site.
This web site includes the "Customer Design Review Supplement" which provides the latest cautions on
system development and the minimal requirements to be checked to prevent problems before the system
development.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2008-2010 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2010.4
MB91605A Series
• Built-in multiplier supported at the instruction level
- Signed 32-bit multiplication : 5 cycles
- Signed 16-bit multiplication : 3 cycles
• Interrupts (save PC and PS) : 6 cycles, 16 priority levels
• Harvard architecture enabling program access and data access to be executed simultaneously
• Instruction prefetch feature implemented using a 4-word queue in the CPU
• Instruction compatible with the FR family
2. Bus interface
• Operating frequency : Configurable from 1/1 to 1/4 of the on-chip frequency
• Basic bus cycle
Read : 1 cycle
Write : 3 cycles
• Supports multiplexed address/data bus
• Unused address pins can be used as general-purpose I/O ports
• Configurable as read-only (other than read-only areas, SDRAM areas)
• Automatic wait cycle generation function programmable for each area (Max 15 cycles)
• Areas configurable in the minimum unit of 1 Mbyte.
• Capable of chip select output for 8 completely independent areas
3. Built-in Memory
RAM : 128 Kbytes
Instruction cache : 8 Kbytes
Data cache : 8 Kbytes
4. DMAC (DMA Controller)
•
•
•
•
•
4 channels
Two transfer sources : Internal peripheral/software
Addressing mode : Specified as full 32-bit addresses (increment/decrement/fixed)
Transfer modes : Burst transfer/block transfer
Transfer data size : Selectable from 1, 2, 4, or 32 bytes
5. 16-bit Reload Timer (Including 1 Channel for REALOS)
• 3 channels
• Internal clock: Frequency division selectable from 2, 4, 8, 16, 32, and 64
(Continued)
2
DS07-16903-4E
MB91605A Series
6. Multi-function Serial Interface
• 8 channels with 16-byte FIFO, 4 channels without FIFO
• Selectable from the following 3 operation modes by channels
< UART >
- Full duplex double buffer
- Parity on/off selectable
- Built-in dedicated baud rate generator
- External clock can be used as a serial clock
- Error detection function for parity, frame and overrun errors
< CSIO >
- Transfer mode : Clock synchronous (Max 10 Mbps)
- Full-duplex double buffer
- Built-in dedicated baud rate generator
- Error detection function for overrun error
< I2C >
Supports both typical mode (Max 100 kbps) and high-speed mode (Max 400 kbps)
7. Interrupt Controller
•
•
•
•
External interrupt lines: Total of 25 lines (external interrupt pins : 24 pins + NMI pin : 1 pin)
Interrupts from internal peripherals
Can be set priority levels as programmable (16 levels) for all pins other than NMI pin
Can be used to wakeup from STOP mode
8. A/D Converter
•
•
•
•
•
12 channels
10-bit resolution
Successive approximation type : Conversion time : About 8.1 μs
Conversion mode : Single-shot conversion mode, scan conversion mode
Activation sources : Software/external trigger
9. Base Timer
• 12 channels
• Operation mode is selectable from the followings by a channel
- 16/32-bit reload timer (32-bit timer is used in 2 channels.)
- 16-bit PWM timer
- 16/32-bit PWC timer (32-bit timer is used in 2 channels.)
- 16-bit PPG timer
• 4-channel synchronized start mode
10. HDMI-CEC/Remote Control Reception
• 1 channel
• HDMI-CEC receiver function (with automatic ACK response function)
• Remote control reception function (built-in 4-byte receive buffer)
(Continued)
DS07-16903-4E
3
MB91605A Series
(Continued)
11. Other Interval Timers
Watchdog timer : built-in 1 channel
12. I/O Ports
Max 92 ports
13. Other Features
•
•
•
•
•
Internal oscillator circuit as a clock source
INIT provided as a reset pin
Watchdog timer reset and software reset are available
Stop and sleep modes supported as low-power consumption modes
Gear function
• Built-in time-base timer
• Package LQFP-176, 0.50 mm pitch, 24.0 mm × 24.0 mm
• Power supply voltage 3.3 V ± 0.3 V, 1.8 V ± 0.15 V dual power supply
4
DS07-16903-4E
MB91605A Series
■ PIN ASSIGNMENT
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
VDDE
P44/MCLKE
P43/MDWE
P42/MCAS
P41/MRAS
P40/RDY
P37/CS8
P36/CS6/TIN2
P35/CS5/TIN1
P34/AS/TIN0
VSS
VDDE
CS4
P33/CS3
P32/CS2
P31/CS1
P30/CS0
P23/MDQM2
P22/MDQM3
P21/WE
RD
P20/SYSCLK
VSS
VDDE
D31
D30
D29
D28
D27
D26
D25
D24
VSS
VDDE
D23
D22
D21
D20
D19
D18
D17
D16
VDDI
VSS
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
LQFP-176
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
VDDE
PE7/INT23/TIOB7
PE6/INT22/TIOA7
PE5/INT21/TIOB6
PE4/INT20/TIOA6
PE3/INT19/TIOB5
PE2/INT18/TIOA5
PE1/INT17/TIOB4
PE0/INT16/TIOA4
PD7/TIOB3
PD6/TIOA3
PD5/TIOB2
PD4/TIOA2
PD3/TIOB1
PD2/TIOA1
PD1/TIOB0
PD0/TIOA0
VDDI
VSS
VDDE
PC7/INT15/SCK9/SCL9
PC6/INT14/SOUT9/SDA9
PC5/INT13/SIN9
PC4/INT12/SCK8/SCL8
PC3/INT11/SOUT8/SDA8
PC2/INT10/SIN8
PC1/INT9/TIOB9
PC0/INT8/TIOA9
PB7/INT7/TIOB8
PB6/INT6/TIOA8
PB5/INT5/TOUT2
PB4/INT4/TOUT1
PB3/INT3/TOUT0
PB2/INT2/SCK7/SCL7
PB1/INT1/SOUT7/SDA7
PB0/INT0/SIN7
PA5/SCK6/SCL6
PA4/SOUT6/SDA6
PA3/SIN6/ATRG
PA2/SCK5/SCL5
PA1/SOUT5/SDA5
PA0/SIN5
VDDI
VSS
VSS
VDDI
ICD0
ICD1
ICD2
ICD3
IBREAK
ICLK
TRST
AVCC
AVRH
AVSS
P60/AN0
P61/AN1
P62/AN2/SIN10
P63/AN3/SOUT10/SDA10
P64/AN4/SCK10/SCL10
P65/AN5/SIN11
P66/AN6/SOUT11/SDA11
P67/AN7/SCK11/SCL11
P70/AN8/TIOA10
P71/AN9/TIOB10
P72/AN10/TIOA11
P73/AN11/TIOB11
VDDE
VSS
P74/RCIN
P75/SIN0
P76/SOUT0/SDA0
P77/SCK0/SCL0
P80/SIN1
P81/SOUT1/SDA1
P82/SCK1/SCL1
P83/SIN2
P84/SOUT2/SDA2
P85/SCK2/SCL2
P90/SIN3
P91/SOUT3/SDA3
P92/SCK3/SCL3
P93/SIN4
P94/SOUT4/SDA4
P95/SCK4/SCL4
NMI
VDDE
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
VSS
VDDI
P45/MCLK
A0
A1
A2
A3
A4
A5
A6
A7
VDDE
VSS
A8
A9
A10
A11
A12
A13
A14
A15
VDDE
VSS
VDDI
P50/A16
P51/A17
P52/A18
P53/A19
P54/A20
P55/A21
P56/A22
P57/A23
VDDE
VSS
MD0
MD1
X0
X1
VSS
INIT
ICS0
ICS1
ICS2
VDDE
(FPT-176P-M07)
DS07-16903-4E
5
MB91605A Series
■ PIN DESCRIPTION
Pin no.
3
Pin name
P45
MCLK
I/O
circuit
type*
A
Description
General-purpose I/O port
Clock output pin for external bus interface
4 to 11
A0 to A7
B
Address bus output pins for external bus interface (bit0 to bit7)
14 to 21
A8 to A15
B
Address bus output pins for external bus interface (bit8 to bit15)
25 to 32
P50 to P57
A16 to A23
A
General-purpose I/O ports
Address bus output pins for external bus interface (bit16 to bit23)
35, 36
MD0, MD1
C
Mode setting pins
37
X0
D
Clock (oscillator) input pin
38
X1
D
Clock (oscillator) I/O pin
40
INIT
E
External reset input pin
41 to 43
ICS0 to ICS2
B
Development tool status output pins
47 to 50
ICD0 to ICD3
F
Development tool data I/O pins
51
IBREAK
G
Development tool break input pin
52
ICLK
B
Development tool clock output pin
53
TRST
E
Development tool reset input pin
57
58
P60
AN0
P61
AN1
H
H
P62
59
AN2
H
SOUT10
H
SCK10
H
SIN11
Multi-function serial interface ch.10 serial data output pin
A/D converter ch.4 analog input pin
Multi-function serial interface ch.10 serial clock I/O pin
Multi-function serial interface ch.10 I2C clock I/O pin
P65
AN5
A/D converter ch.3 analog input pin
General-purpose I/O port
SCL10
62
A/D converter ch.2 analog input pin
Multi-function serial interface ch.10 I2C data I/O pin
P64
AN4
A/D converter ch.1 analog input pin
General-purpose I/O port
SDA10
61
General-purpose I/O port
Multi-function serial interface ch.10 serial data input pin
P63
AN3
A/D converter ch.0 analog input pin
General-purpose I/O port
SIN10
60
General-purpose I/O port
General-purpose I/O port
H
A/D converter ch.5 analog input pin
Multi-function serial interface ch.11 serial data input pin
(Continued)
6
DS07-16903-4E
MB91605A Series
Pin no.
Pin name
I/O
circuit
type*
P66
63
AN6
SOUT11
General-purpose I/O port
H
P67
AN7
SCK11
H
H
General-purpose I/O port
H
TIOB10
AN10
General-purpose I/O port
H
TIOA11
AN11
General-purpose I/O port
H
TIOB11
71
72
P74
RCIN
P75
SIN0
SOUT0
A
A
A
P80
SIN1
General-purpose I/O port
Multi-function serial interface ch.0 serial data input pin
Multi-function serial interface ch.0 serial data output pin
General-purpose I/O port
A
Multi-function serial interface ch.0 serial clock I/O pin
Multi-function serial interface ch.0 I2C clock I/O pin
SCL0
75
HDMI-CEC/Remote control I/O pin
Multi-function serial interface ch.0 I2C data I/O pin
P77
SCK0
General-purpose I/O port
General-purpose I/O port
SDA0
74
A/D converter ch.11 analog input pin
Base timer ch.11 timer input pin
P76
73
A/D converter ch.10 analog input pin
Base timer ch.11 timer I/O pin
P73
68
A/D converter ch.9 analog input pin
Base timer ch.10 timer input pin
P72
67
A/D converter ch.8 analog input pin
Base timer ch.10 timer I/O pin
P71
AN9
Multi-function serial interface ch.11 serial clock I/O pin
General-purpose I/O port
TIOA10
66
A/D converter ch.7 analog input pin
Multi-function serial interface ch.11 I2C clock I/O pin
P70
AN8
Multi-function serial interface ch.11 serial data output pin
General-purpose I/O port
SCL11
65
A/D converter ch.6 analog input pin
Multi-function serial interface ch.11 I2C data I/O pin
SDA11
64
Description
A
General-purpose I/O port
Multi-function serial interface ch.1 serial data input pin
(Continued)
DS07-16903-4E
7
MB91605A Series
Pin no.
Pin name
I/O
circuit
type*
P81
76
SOUT1
General-purpose I/O port
A
P82
SCK1
General-purpose I/O port
A
P83
SIN2
A
P84
79
SOUT2
A
P90
SIN3
A
SOUT3
A
A
P93
SIN4
A
SOUT4
A
A
NMI
Multi-function serial interface ch.4 serial data output pin
General-purpose I/O port
A
Multi-function serial interface ch.4 serial clock I/O pin
Multi-function serial interface ch.4 I2C clock I/O pin
SCL4
87
Multi-function serial interface ch.4 serial data input pin
Multi-function serial interface ch.4 I2C data I/O pin
P95
SCK4
General-purpose I/O port
General-purpose I/O port
SDA4
86
Multi-function serial interface ch.3 serial clock I/O pin
Multi-function serial interface ch.3 I2C clock I/O pin
P94
85
Multi-function serial interface ch.3 serial data output pin
General-purpose I/O port
SCL3
84
Multi-function serial interface ch.3 serial data input pin
Multi-function serial interface ch.3 I2C data I/O pin
P92
SCK3
General-purpose I/O port
General-purpose I/O port
SDA3
83
Multi-function serial interface ch.2 serial clock I/O pin
Multi-function serial interface ch.2 I2C clock I/O pin
P91
82
Multi-function serial interface ch.2 serial data output pin
General-purpose I/O port
SCL2
81
Multi-function serial interface ch.2 serial data input pin
Multi-function serial interface ch.2 I2C data I/O pin
P85
SCK2
General-purpose I/O port
General-purpose I/O port
SDA2
80
Multi-function serial interface ch.1 serial clock I/O pin
Multi-function serial interface ch.1 I2C clock I/O pin
SCL1
78
Multi-function serial interface ch.1 serial data output pin
Multi-function serial interface ch.1 I2C data I/O pin
SDA1
77
Description
E
NMI input pin
(Continued)
8
DS07-16903-4E
MB91605A Series
Pin no.
Pin name
PA0
91
SIN5
I/O
circuit
type*
A
PA1
92
SOUT5
A
A
General-purpose I/O port
A
ATRG
SOUT6
General-purpose I/O port
A
PA5
SCK6
General-purpose I/O port
A
PB0
INT0
General-purpose I/O port
I
Multi-function serial interface ch.7 serial data input pin
PB1
General-purpose I/O port
SOUT7
I
PB2
INT2
SCK7
I
TOUT0 to TOUT2
External interrupt input pin
Multi-function serial interface ch.7 serial clock I/O pin
Multi-function serial interface ch.7 I2C clock I/O pin
PB3 to PB5
INT3 to INT5
Multi-function serial interface ch.7 serial data output pin
General-purpose I/O port
SCL7
100 to 102
External interrupt input pin
Multi-function serial interface ch.7 I2C data I/O pin
SDA7
99
External interrupt input pin
SIN7
INT1
98
Multi-function serial interface ch.6 serial clock I/O pin
Multi-function serial interface ch.6 I2C clock I/O pin
SCL6
97
Multi-function serial interface ch.6 serial data output pin
Multi-function serial interface ch.6 I2C data I/O pin
SDA6
96
Multi-function serial interface ch.6 serial data input pin
A/D converter external trigger input pin
PA4
95
Multi-function serial interface ch.5 serial clock I/O pin
Multi-function serial interface ch.5 I2C clock I/O pin
PA3
SIN6
Multi-function serial interface ch.5 serial data output pin
General-purpose I/O port
SCL5
94
Multi-function serial interface ch.5 serial data input pin
Multi-function serial interface ch.5 I2C data I/O pin
PA2
SCK5
General-purpose I/O port
General-purpose I/O port
SDA5
93
Description
General-purpose I/O ports
I
External interrupt input pins
16-bit reload timer ch.0 to ch.2 output pins
(Continued)
DS07-16903-4E
9
MB91605A Series
Pin no.
Pin name
I/O
circuit
type*
PB6
103
INT6
General-purpose I/O port
I
TIOA8
INT7
General-purpose I/O port
I
TIOB8
INT8
General-purpose I/O port
I
TIOA9
INT9
General-purpose I/O port
I
TIOB9
108
INT10
General-purpose I/O port
I
Multi-function serial interface ch.8 serial data input pin
PC3
General-purpose I/O port
INT11
SOUT8
I
111
INT12
SCK8
External interrupt input pin
Multi-function serial interface ch.8 serial data output pin
Multi-function serial interface ch.8 I2C data I/O pin
PC4
110
External interrupt input pin
SIN8
SDA8
109
External interrupt input pin
Base timer ch.9 timer input pin
PC2
107
External interrupt input pin
Base timer ch.9 timer I/O pin
PC1
106
External interrupt input pin
Base timer ch.8 timer input pin
PC0
105
External interrupt input pin
Base timer ch.8 timer output pin
PB7
104
Description
General-purpose I/O port
I
External interrupt input pin
Multi-function serial interface ch.8 serial clock I/O pin
SCL8
Multi-function serial interface ch.8 I2C clock I/O pin
PC5
General-purpose I/O port
INT13
I
External interrupt input pin
SIN9
Multi-function serial interface ch.9 serial data input pin
PC6
General-purpose I/O port
INT14
SOUT9
SDA9
I
External interrupt input pin
Multi-function serial interface ch.9 serial data output pin
Multi-function serial interface ch.9 I2C data I/O pin
(Continued)
10
DS07-16903-4E
MB91605A Series
Pin no.
Pin name
I/O
circuit
type*
PC7
112
INT15
SCK9
General-purpose I/O port
I
117
118
119
120
121
122
123
PD0
TIOA0
PD1
TIOB0
PD2
TIOA1
PD3
TIOB1
PD4
TIOA2
PD5
TIOB2
PD6
TIOA3
PD7
TIOB3
A
A
A
A
A
A
A
A
PE0
124
INT16
I
I
I
TIOB5
General-purpose I/O port
Base timer ch.1 timer I/O pin
General-purpose I/O port
Base timer ch.1 timer input pin
General-purpose I/O port
Base timer ch.2 timer output pin
General-purpose I/O port
Base timer ch.2 timer input pin
General-purpose I/O port
Base timer ch.3 timer I/O pin
General-purpose I/O port
Base timer ch.3 timer input pin
External interrupt input pin
External interrupt input pin
External interrupt input pin
Base timer ch.5 timer I/O pin
PE3
INT19
Base timer ch.0 timer input pin
General-purpose I/O port
TIOA5
127
General-purpose I/O port
Base timer ch.4 timer input pin
PE2
INT18
Base timer ch.0 timer output pin
General-purpose I/O port
TIOB4
126
General-purpose I/O port
Base timer ch.4 timer output pin
PE1
INT17
Multi-function serial interface ch.9 serial clock I/O pin
General-purpose I/O port
TIOA4
125
External interrupt input pin
Multi-function serial interface ch.9 I2C clock I/O pin
SCL9
116
Description
General-purpose I/O port
I
External interrupt input pin
Base timer ch.5 timer input pin
(Continued)
DS07-16903-4E
11
MB91605A Series
Pin no.
Pin name
I/O
circuit
type*
PE4
128
INT20
General-purpose I/O port
I
TIOA6
INT21
General-purpose I/O port
I
TIOB6
INT22
General-purpose I/O port
I
TIOA7
INT23
External interrupt input pin
Base timer ch.7 timer I/O pin
PE7
131
External interrupt input pin
Base timer ch.6 timer input pin
PE6
130
External interrupt input pin
Base timer ch.6 timer output pin
PE5
129
Description
General-purpose I/O port
I
TIOB7
External interrupt input pin
Base timer ch.7 timer input pin
135 to 142
D16 to D23
J
Data bus I/O pins for external bus interface (bit16 to bit23)
145 to 152
D24 to D31
J
Data bus I/O pins for external bus interface (bit24 to bit31)
155
156
157
P20
SYSCLK
RD
P21
WE
A
B
A
P22, P23
158, 159
160 to 163
164
MDQM3, MDQM2
P30 to P33
CS0 to CS3
CS4
AS
A
A
B
A
P37
CS8
External bus interface write strobe output pin
External bus interface byte enable output pins
MDQM3:D[31:24], MDQM2:D[23:16]
General-purpose I/O ports
External bus interface chip select output pins
External bus interface chip select output pin
External bus interface address strobe output pin
General-purpose I/O ports
A
TIN1, TIN2
170
General-purpose I/O port
16-bit reload timer ch.0 input pin
P35, P36
CS5, CS6
External bus interface read strobe output pin
General-purpose I/O port
TIN0
168, 169
System clock output pin
General-purpose I/O ports
P34
167
General-purpose I/O port
External bus interface chip select output pins
16-bit reload timer ch.1, ch.2 input pins
A
General-purpose I/O port
SDRAM interface chip select output pin
(Continued)
12
DS07-16903-4E
MB91605A Series
(Continued)
Pin no.
Pin name
P40
171
RDY
P41
172
MRAS
P42
173
MCAS
P43
174
MDWE
P44
175
MCLKE
I/O
circuit
type*
A
A
A
A
A
Description
General-purpose I/O port
External bus interface ready input pin
General-purpose I/O port
RAS strobe output pin for SDRAM interface
General-purpose I/O port
CAS strobe output pin for SDRAM interface
General-purpose I/O port
Write strobe output pin for SDRAM interface
General-purpose I/O port
Clock enable output pin for SDRAM interface
* : Refer to “■ I/O CIRCUIT TYPE” for details on the I/O circuit types.
[Power supply/GND pins]
Pin no.
Pin name
I/O
circuit
type
12, 22, 33, 44, 69, 88, 113,
132, 143, 153, 165, 176
VDDE
⎯
3.3 V power supply pins
2, 24, 46, 90, 115, 134
VDDI
⎯
1.8 V power supply pins
1, 13, 23, 34, 39, 45, 70, 89,
114, 133, 144, 154, 166
VSS
⎯
GND pins
54
AVCC
⎯
A/D converter power supply pin
56
AVSS
⎯
A/D converter analog GND pin
55
AVRH
⎯
A/D converter reference voltage pin
DS07-16903-4E
Description
13
MB91605A Series
■ I/O CIRCUIT TYPE
Type
Circuit type
Remarks
A
P-ch
Digital output
N-ch
Digital output
• CMOS level output
• CMOS level hysteresis input
With standby control
Digital input
Standby control
B
CMOS level output
P-ch
Digital output
N-ch
Digital output
C
CMOS level hysteresis input
P-ch
N-ch
Digital input
D
Oscillation feedback resistor :
approx. 1 MΩ (built-in)
X1
Clock input
X0
Standby control
(Continued)
14
DS07-16903-4E
MB91605A Series
Type
Circuit type
E
Remarks
• With pull-up resistor
CMOS hysteresis input
Pull-up resistor value =
approx. 33 kΩ (Typ)
P-ch
P-ch
N-ch
Digital input
F
Pull-down control
• CMOS input/output
• With pull-down control
P-ch
Digital output
N-ch
Digital output
N-ch
Digital input
G
• CMOS hysteresis input
With pull-down resistor
P-ch
N-ch
N-ch
Digital input
(Continued)
DS07-16903-4E
15
MB91605A Series
(Continued)
Type
Circuit type
Remarks
H
P-ch
Digital output
• CMOS level output
• CMOS level hysteresis input
With standby control
• With analog input
Digital output
N-ch
Analog input
Digital input
Standby control
I
Pull-up control
P-ch
P-ch
Digital output
N-ch
• With pull-up control
• Pull-up resistor value =
approx. 33 kΩ (Typ)
• CMOS level output
• CMOS level hysteresis input
• With standby control
Digital output
Digital input
Standby control
J
• CMOS level input/output
• With standby control
P-ch
Digital output
N-ch
Digital output
Digital input
Standby control
16
DS07-16903-4E
MB91605A Series
■ HANDLING DEVICES
• Preventing latch-up
Latch-up may occur in a CMOS IC if a voltage higher than VDDE or VDDI, or less than VSS is applied to an input or
output pin or if a voltage exceeding the rated value is applied between VDDE and VSS, or VDDI and VSS. If
latch-up occurs, the power supply current increases rapidly, sometimes resulting in thermal breakdown of the
device. Therefore, be very careful not to apply voltages in excess of the absolute maximum ratings.
• Handling of unused pins
Leaving unused input pins unconnected can cause misoperation or permanent damage to the device due to
latchup. Always pull-up or pull-down unused pins using a 2 kΩ or larger resistor.
If some I/O pins are unused, either set as outputs and leave open circuit or set as inputs and treat in the same
way as input pins.
• Power supply pins
The MB91605A series has multiple VDDE, VDDI, and VSS pins. respective pins at the same potential are interconnected in order to prevent latch-up and other malfunctions. However, you must connect the pins externally to
the power supply and ground lines to reduce the electro-magnetic emission levels, to prevent abnormal operation
of strobe signals caused by the rise in the ground level, and to conform to the total output current rating. Furthermore,
the VDDE pins, VDDI pins and VSS pins of the MB91605A series must be connected to the current supply source
at a low impedance.
It is also recommended to connect a ceramic capacitor of approximately 0.1 μF as a bypass capacitor between
the VDDE, VDDI and VSS pins near the device.
• Crystal oscillator circuit
Noise in proximity to the X0 and X1 pins can cause the device to malfunction. Printed circuit boards should be
designed so that the X0 and X1 pins, crystal oscillator, and bypass capacitors connected to ground are located
near the device and ground.
It is recommended that the printed circuit board artwork be designed such that the X0 and X1 pins are surrounded
by ground plane for the stable operation.
Please request the oscillator manufacturer to evaluate the oscillational characteristics of the crystal and this
device.
• Mode pins (MD0, MD1)
Connect them directly to power supply pins or GND pins. To prevent the device from entering test mode accidentally due to noise, minimize the lengths of the patterns between each mode pin and power supply pin or
GND pin on the printed circuit board as much as possible and connect them at a low impedance.
• Operation at power-on
Ensure that a settings initialization reset (INIT) is performed using the INIT pin immediately after the power is
turned on.
Maintain the “L” level input to the INIT pin for the duration of the stabilization wait time immediately after the
power on to ensure the stabilization wait time as required by the oscillator circuit (the stabilization wait time is
reset to the minimum value when INIT is asserted using the INIT pin).
• Note on oscillator input at power-on
At power-on, ensure that the clock is input until the oscillator stabilization wait time has elapsed.
DS07-16903-4E
17
MB91605A Series
• Notes on the turning on and off the power to the VDDI pin (1.8 V internal power supply) and VDDE pin (3.3 V
external pin power supply).
Turn on/off the power in the following procedure.
Power on
VDDI pin (internal power supply) → VDDE pin (external power supply) → Analog→ Signal
Power off
Signal → Analog→ VDDE pin (external power supply) → VDDI pin (internal power supply)
Do not continuously (more than one minute) apply power to the VDDE pin (external power supply) while the
VDDI pin (internal power supply) is disconnected as this will adversely affect the reliability of the LSI.
When the VDDE pin (external power supply) returns from the off state to the on state, the internal state of the
circuit might not be able to be maintained due to power supply noise and other effects.
When the power is turned on, the states of the output pins may remain undefined until the internal power supply
becomes stable.
There is no problem for turning on and off the power (VDDI/VDDE/analog) simultaneously.
• Notes on using an external clock
When using an external clock, in principal, the clock signal should be supplied simultaneously to the X0 and X1
pins, with the phase-inverted clock signal of X0 supplied to the X1 pin. However, the external clock must not be
used while the microcontroller is in stop mode (oscillator stop mode). (This is because the X1 pin stops at “H”
output in STOP mode.)
Using an External Clock
X0
X1
MB91605A series
Cannot be used in STOP mode (oscillation stop mode).
18
DS07-16903-4E
MB91605A Series
• AVCC pin
The MB91605A series has a built-in A/D converter. A capacitor of approximately 0.1μF must be connected
between the AVCC pin and AVSS pin.
AVCC
0.1μF
MB91605A series
AVSS
• Notes when not using the emulator
To operate the evaluation MCU on the user system without connecting the emulator, each of the input pins on
the evaluation MCU connected to the emulator interface on the user system as shown below.
Note that switching circuits or other measures may be needed on the user system.
Emulator Interface Pin Treatment
Evaluation MCU Pin Name
Pin Connection
TRST
Connect to the reset output circuit on the user system.
INIT
Connect to the reset output circuit on the user system.
Other Pins
Open
• Precautions when the PLL clock is selected
If the crystal oscillator is disconnected or the clock input stops while the PLL clock is selected, the microcontroller
may continue to operate at the free-running frequency of the self-oscillator within the PLL. However, this operation
is not guaranteed.
DS07-16903-4E
19
MB91605A Series
■ RESTRICTIONS
1) Notes on the PS register
Some instructions write to the PS register in advance before executing. When a debugger is being used, execution
may break within an interrupt handler routine, or the values of the flags within the PS register may be updated
due to exception processing. However, the microcontroller is designed to reprocess correctly after returning from
the EIT, and to execute before and after the EIT proceeds according to the specifications.
• If any of the following situations occur in the instruction immediately before a DIV0U or DIV0S instruction,
the processing in (1) to (3) will be performed.
- A user interrupt or NMI is accepted
- Step execution is performed
- A break occurs due to a data event or by being selected from the emulator menu
(1) The D0 and D1 flags are updated in advance.
(2) The EIT handling routine (user interrupt/NMI or emulator) is executed.
(3) Upon returning from the EIT, the DIV0U or DIV0S instruction is executed and the D0/D1 flags are
updated back to the same value as in step (1).
• If any of the OR CCR, ST ILM, or MOV Ri, PS instructions are executed to enable a user interrupt or NMI
interrupt source when that interrupt has occurred, the following operation will be performed.
(1) The PS register is updated in advance.
(2) The EIT handling routine (user interrupt/NMI or emulator) is executed.
(3) Upon returning from the EIT, the above instructions are executed and the PS registers are updated
back to the same value as in step (1).
2) Watchdog timer
The watchdog timer is a function that monitors the program to check that it delays a reset within a certain
period of time, and resets the CPU if the program runs out of control and fails to delay the reset. Once the
watchdog timer has been enabled, it keeps running until reset. As an exception, the reset is automatically
delayed in conditions where the execution of the CPU program stops. It is possible that the watchdog timer
will not be triggered if these conditions arise as a result of the system running out of control. In that case,
please reset (INIT) using the external INIT pin.
20
DS07-16903-4E
MB91605A Series
3) Notes on debugger
• Step execution of RETI instruction
If stepped execution is used in an environment where interrupts occur frequently, the interrupt processing
routines corresponding to those interrupts are executed repeatedly, and the programs for the main routine
and low-level interrupt routines are not able to execute as a result. (For example, if a reload timer is enabled,
execution will always break at the beginning of the reload timer interrupt routine when the RETI instruction
is step-executed.) Disable the corresponding interrupts when the interrupt processing routines no longer
need to be debugged.
• Break function
If the target address of a hardware break (including event breaks) is set to the address of the current system
stack pointer or to an area that contains the stack pointer, execution will break after each instruction regardless
of whether the user program actually contains data access instructions.
To prevent this, do not set (word) access to the area containing the address of the system stack pointer as
the target of a hardware break (including an event break).
• Operand break
Malfunctions may occur if the stack pointer is within an area which is set as the DSU operand break. Do not
set the access to the areas containing the address of system stack pointer as a target of data event break.
DS07-16903-4E
21
MB91605A Series
■ BLOCK DIAGRAM
TRST
IBREAK
ICS0 to ICS2
ICLK
ICD0 to ICD3
DSU4
FR80 CPU
core
Data cache
8 Kbytes
Instruction cache
8 Kbytes
Bus converter
32 ↔ 16
bus adapter
DMAC
4 channels
D16 to D31
A0 to A23
CS0 to CS6,CS8
AS
RD
WE
MDQM2,MDQM3
MRAS
MCAS
MDWE
MCLKE
MCLK
SYSCLK
RDY
External
bus
interface/
SDRAM
interface
on-chip bus
RAM
128 Kbytes
Interrupt controller
INIT
X0
X1
TIN0 to TIN2
TOUT0 to TOUT2
Clock control/
Reset control
16-bit reload timer
3 channels
External interrupt/NMI
24 channels/1 channel
Multi-function serial
interface [with FIFO]
8 channels
SIN0 to SIN7
SOUT0 to SOUT7
SCK0 to SCK7
SDA0 to SDA7
SCL0 to SCL7
Multi-function serial
interface [without FIFO]
4 channels
SIN8 to SIN11
SOUT8 to SOUT11
SCK8 to SCK11
SDA8 to SDA11
SCL8 to SCL11
A/D converter
RCIN
22
HDMI-CEC/
Remote control reception
1 channel
INT0 to INT23
NMI
12 channels
AN0 to AN11
ATRG
Base timer
12 channels
TIOA0 to TIOA11
TIOB0 to TIOB11
DS07-16903-4E
MB91605A Series
■ MEMORY SPACE
1. Memory space
The FR family has 4 Gbytes of logical address space (232 addresses) linearly accessible to the CPU.
Direct Addressing Areas
The following areas in the address space are used as I/O areas.
These areas are called direct addressing areas. The addresses of operands in these areas can be specified
directly within some instructions.
The direct addressing area varies depending on the size of data to be accessed as follows :
→ Byte data access
: 000H to 0FFH
→ Half word data access : 000H to 1FFH
→ Word data access
DS07-16903-4E
: 000H to 3FFH
23
MB91605A Series
2. Memory Map
MB91605A
External ROM external bus mode
00000000H
I/O
(Direct addressing area)
Refer to “■ I/O MAP”.
00000400H
I/O
00008000H
00020000H
Internal RAM
128 Kbytes
00040000H
External area
256 Mbytes
10000000H
20000000H
SDRAM area
64 Mbytes
24000000H
40000000H
External mirror area*
256 Mbytes
50000000H
60000000H
SDRAM mirror area
64 Mbytes
64000000H
FFFFFFFFH
Access prohibited area
* : The mirror of external bus interface register can be found at 40002000H to 40002FFFH .
24
DS07-16903-4E
MB91605A Series
■ I/O MAP
The following table shows the correspondence between the memory space area and each of the peripheral
resource registers.
[How to read the table]
Address
000000H
Register
+0
+1
+2
+3
PDR0 [R/W]
XXXXXXXX
PDR1 [R/W]
XXXXXXXX
PDR2 [R/W]
XXXXXXXX
PDR3 [R/W]
XXXXXXXX
Block
T-unit
Port data
register
Read/Write attribute
Initial value after a reset
Register name (First-column register at address 4n; second-column register
at address 4n + 1)
Location of left-most register (When using word access, the register
in column 1 is in the MSB side of the data.)
Notes: • The bit values in the register represent the following initial values :
- “1” : Initial value “1”
- “0” : Initial value “0”
- “X” : Initial value “Undefined”
- “-” : No physical register at this location
- “*” : Uninitialized bit
• Read/write attribute is as follows.
- “R” : Indicates that there is a read only bit.
- “R/W” : Indicates that there is a read/write bit.
- “W” : Indicates that there is a write only bit.
• Access is prohibited for data access attributes that are not listed.
DS07-16903-4E
25
MB91605A Series
Address
000000H
Register
+0
+1
Reserved
+2
+3
PDR2 [R/W]
----XXXX
PDR3 [R/W]
XXXXXXXX
000004H
PDR4 [R/W]
--XXXXXX
PDR5 [R/W]
XXXXXXXX
PDR6 [R/W]
XXXXXXXX
PDR7[R/W]
XXXXXXXX
000008H
PDR8 [R/W]
--XXXXXX
PDR9 [R/W]
--XXXXXX
PDRA [R/W]
--XXXXXX
PDRB[R/W]
XXXXXXXX
00000CH
PDRC [R/W]
XXXXXXXX
PDRD [R/W]
XXXXXXXX
PDRE [R/W]
XXXXXXXX
Reserved
000010H
to
00001CH
000020H
Block
Port data register
Reserved
ADCTH [R/W]
00000000
ADCTL [R/W]
00000000
ADCH [R/W]
00000000 00000000
000024H
ADAT0 [R]
00000000 00000000
ADAT1 [R]
00000000 00000000
000028H
ADAT2 [R]
00000000 00000000
ADAT3 [R]
00000000 00000000
00002CH
ADAT4 [R]
00000000 00000000
ADAT5 [R]
00000000 00000000
000030H
ADAT6 [R]
00000000 00000000
ADAT7 [R]
00000000 00000000
000034H
ADAT8 [R]
00000000 00000000
ADAT9 [R]
00000000 00000000
000038H
ADAT10 [R]
00000000 00000000
ADAT11 [R]
00000000 00000000
10-bit
A/D converter
00003CH
WDTCR0 [R/W]
00000000
WDTCPR0 [R/W]
00000000
Reserved
Watchdog timer
000040H
EIRR0 [R/W]
00000000
ENIR0 [R/W]
00000000
ELVR0 [R/W]
00000000 00000000
External interrupt
0 to 7
000044H
DICR [R/W]
11111110
Reserved
TMRLRA0 [R/W]
XXXXXXXX XXXXXXXX
TMR0 [R]
XXXXXXXX XXXXXXXX
00004CH
Reserved
TMCSR0 [R/W]
00000000 XX000000
000050H
TMRLRA1 [R/W]
XXXXXXXX XXXXXXXX
TMR1 [R]
XXXXXXXX XXXXXXXX
000054H
Reserved
TMCSR1 [R/W]
00000000 XX000000
000048H
Delay interrupt
16-bit reload
timer ch.0
16-bit reload
timer ch.1
(Continued)
26
DS07-16903-4E
MB91605A Series
Register
Address
+0
+1
+2
+3
000058H
TMRLRA2 [R/W]
XXXXXXXX XXXXXXXX
TMR2 [R]
XXXXXXXX XXXXXXXX
00005CH
Reserved
TMCSR2 [R/W]
00000000 XX000000
000060H
SCR0/IBCR0
[R, R/W]
0--00000
SMR0 [R/W]
00000000
RDR0[R]/TDR0[W]
-------0 00000000
000064H
SSR0 [R, R/W]
0-000011
ESCR0 [R/W],
IBSR0 [R,R/W]
-0000000
BGR10 [R/W]
00000000
BGR00 [R/W]
00000000
000068H
ISMK0 [R/W]
01111111
ISBA0 [R/W]
00000000
00006CH
FCR10 [R/W]
00-00100
FCR00 [R, R/W]
00000000
FBYTE20 [R/W]
00000000
FBYTE10 [R/W]
00000000
000070H
SCR1/IBCR1
[R, R/W]
0--00000
SMR1 [R/W]
00000000
SSR1 [R, R/W]
0-000011
ESCR1 [R/W],
IBSR1 [R,R/W]
-0000000
BGR11 [R/W]
00000000
BGR01 [R/W]
00000000
RDR1[R]/TDR1[W]
-------0 00000000
000074H
Reserved
000078H
ISMK1 [R/W]
01111111
ISBA1 [R/W]
00000000
00007CH
FCR11 [R/W]
00-00100
FCR01 [R, R/W]
00000000
FBYTE21 [R/W]
00000000
FBYTE11 [R/W]
00000000
000080H
SCR2/IBCR2
[R, R/W]
0--00000
SMR2 [R/W]
00000000
SSR2 [R, R/W]
0-000011
ESCR2 [R/W],
IBSR2 [R,R/W]
-0000000
BGR12 [R/W]
00000000
BGR02 [R/W]
00000000
RDR2[R]/TDR2[W]
-------0 00000000
000084H
Reserved
000088H
ISMK2 [R/W]
01111111
ISBA2 [R/W]
00000000
00008CH
FCR12 [R/W]
00-00100
FCR02 [R, R/W]
00000000
FBYTE22 [R/W]
00000000
FBYTE12 [R/W]
00000000
000090H
SCR3/IBCR3
[R, R/W]
0--00000
SMR3 [R/W]
00000000
SSR3 [R, R/W]
0-000011
ESCR3 [R/W],
IBSR3 [R,R/W]
-0000000
BGR13 [R/W]
00000000
BGR03 [R/W]
00000000
RDR3[R]/TDR3[W]
-------0 00000000
000094H
000098H
ISMK3 [R/W]
01111111
ISBA3 [R/W]
00000000
00009CH
FCR13 [R/W]
00-00100
FCR03 [R, R/W]
00000000
Reserved
Reserved
FBYTE23 [R/W]
00000000
Block
16-bit reload
timer ch.2
Multi-function
serial interface
(with FIFO)
ch.0
Multi-function
serial interface
(with FIFO)
ch.1
Multi-function
serial interface
(with FIFO)
ch.2
Multi-function
serial interface
(with FIFO)
ch.3
FBYTE13 [R/W]
00000000
(Continued)
DS07-16903-4E
27
MB91605A Series
Address
0000A0H
0000A4H
Register
+0
+1
+2
+3
SCR4/IBCR4
[R, R/W]
0--00000
SMR4 [R/W]
00000000
SSR4 [R, R/W]
0-000011
ESCR4 [R/W],
IBSR4 [R,R/W]
-0000000
BGR14 [R/W]
00000000
BGR04 [R/W]
00000000
RDR4[R]/TDR4[W]
-------0 00000000
0000A8H
ISMK4 [R/W]
01111111
ISBA4 [R/W]
00000000
0000ACH
FCR14 [R/W]
00-00100
FCR04 [R, R/W]
00000000
FBYTE24 [R/W]
00000000
FBYTE14 [R/W]
00000000
0000B0H
SCR5/IBCR5
[R, R/W]
0--00000
SMR5 [R/W]
00000000
SSR5 [R, R/W]
0-000011
ESCR5 [R/W],
IBSR5 [R,R/W]
-0000000
BGR15 [R/W]
00000000
BGR05 [R/W]
00000000
0000B4H
RDR5[R]/TDR5[W]
-------0 00000000
Reserved
0000B8H
ISMK5 [R/W]
01111111
ISBA5 [R/W]
00000000
0000BCH
FCR15 [R/W]
00-00100
FCR05 [R, R/W]
00000000
FBYTE25 [R/W]
00000000
FBYTE15 [R/W]
00000000
0000C0H
SCR6/IBCR6
[R, R/W]
0--00000
SMR6 [R/W]
00000000
SSR6 [R, R/W]
0-000011
ESCR6 [R/W],
IBSR6 [R,R/W]
-0000000
BGR16 [R/W]
00000000
BGR06 [R/W]
00000000
0000C4H
RDR6[R]/TDR6[W]
-------0 00000000
Reserved
0000C8H
ISMK6 [R/W]
01111111
ISBA6 [R/W]
00000000
0000CCH
FCR16 [R/W]
00-00100
FCR06 [R, R/W]
00000000
FBYTE26 [R/W]
00000000
FBYTE16 [R/W]
00000000
0000D0H
SCR7/IBCR7
[R, R/W]
0--00000
SMR7 [R/W]
00000000
SSR7 [R, R/W]
0-000011
ESCR7 [R/W],
IBSR7 [R,R/W]
-0000000
BGR17 [R/W]
00000000
BGR07 [R/W]
00000000
0000D4H
RDR7[R]/TDR7[W]
-------0 00000000
Reserved
Block
Multi-function
serial interface
(with FIFO)
ch.4
Multi-function
serial interface
(with FIFO)
ch.5
Multi-function
serial interface
(with FIFO)
ch.6
Multi-function
serial interface
(with FIFO)
ch.7
0000D8H
ISMK7 [R/W]
01111111
ISBA7 [R/W]
00000000
0000DCH
FCR17 [R/W]
00-00100
FCR07 [R, R/W]
00000000
0000E0H
EIRR1 [R/W]
00000000
ENIR1 [R/W]
00000000
ELVR1 [R/W]
00000000 00000000
External interrupt
8 to 15
0000E4H
EIRR2 [R/W]
00000000
ENIR2 [R/W]
00000000
ELVR2 [R/W]
00000000 00000000
External interrupt
16 to 23
Reserved
FBYTE27 [R/W]
00000000
FBYTE17 [R/W]
00000000
(Continued)
28
DS07-16903-4E
MB91605A Series
Register
Address
0000E8H
+0
+1
+2
IRPR0H [R]
00000000
+3
Interrupt request
batch read
function
Reserved
0000ECH
Reserved
Reserved
0000F0H
RCCR [R/W]
0---0000
RCST [R/W]
00000000
RCSHW [R/W]
00000000
RCDAHW [R/W]
00000000
0000F4H
RCDBHW [R/W]
00000000
Reserved
RCADR1 [R/W]
---00000
RCADR2 [R/W]
---00000
0000F8H
RCDTHH [R]
00000000
RCDTHL [R]
00000000
RCDTLH [R]
00000000
RCDTLL[R]
00000000
RCCKD [R/W]
---00000 00000000
0000FCH
000100H
to
0001FCH
000200H
000208H
SMR8 [R/W]
00000000
RDR8[R]/TDR8[W]
-------0 00000000
000204H
ISMK8 [R/W]
01111111
000210H
SCR9/IBCR9
[R, R/W]
0--00000
SMR9 [R/W]
00000000
RDR9[R]/TDR9[W]
-------0 00000000
ISMK9 [R/W]
01111111
BGR08 [R/W]
00000000
Reserved
Multi-function
serial interface
(without FIFO)
ch.8
SSR9 [R, R/W]
0-000011
ESCR9 [R/W],
IBSR9 [R,R/W]
-0000000
BGR19 [R/W]
00000000
BGR09 [R/W]
00000000
Reserved
Multi-function
serial interface
(without FIFO)
ch.9
Reserved
SCRA/IBCRA
[R, R/W]
0--00000
SMRA [R/W]
00000000
RDRA[R]/TDRA[W]
-------0 00000000
000224H
000228H
BGR18 [R/W]
00000000
ISBA9 [R/W]
00000000
00021CH
000220H
ESCR8 [R/W],
IBSR8 [R,R/W]
-0000000
Reserved
000214H
000218H
Reserved
SSR8 [R, R/W]
0-000011
ISBA8 [R/W]
00000000
00020CH
Remote control
Reserved
Reserved
SCR8/IBCR8
[R, R/W]
0--00000
Block
ISMKA [R/W]
01111111
00022CH
SSRA [R, R/W]
0-000011
ESCRA [R/W],
IBSRA [R,R/W]
-0000000
BGR1A [R/W]
00000000
BGR0A [R/W]
00000000
ISBAA [R/W]
00000000
Reserved
Multi-function
serial interface
(without FIFO)
ch.10
Reserved
(Continued)
DS07-16903-4E
29
MB91605A Series
Address
000230H
000234H
000238H
Register
+0
+1
+2
+3
SCRB/IBCRB
[R, R/W]
0--00000
SMRB [R/W]
00000000
SSRB [R, R/W]
0-000011
ESCRB [R/W],
IBSRB [R,R/W]
-0000000
BGR1B [R/W]
00000000
BGR0B [R/W]
00000000
RDRB[R]/TDRB[W]
-------0 00000000
ISMKB [R/W]
01111111
ISBAB [R/W]
00000000
00023CH
RDRM8/TDRM8
[R/W]
00000000
000244H
SSEL89AB [R/W]
------00
RDRM9/TDRM9
[R/W]
00000000
000288H
000294H
000298H
BT0TMR [R]
00000000 00000000
Reserved
0002A4H
0002A8H
0002ACH
Multi-function serial
interface serial
clock selection
Reserved
BT0TMCR [R/W]
00000000 00000000
BT0STC [R/W]
00000000
Reserved
BT0PDUT/BT0PRLH [R/W],
BT0DTBF [R]
XXXXXXXX XXXXXXXX
BT0PCSR/BT0PRLL [R/W]
XXXXXXXX XXXXXXXX
Base timer ch.0
Reserved
BT1TMR [R]
00000000 00000000
Reserved
BT1TMCR [R/W]
00000000 00000000
BT1STC [R/W]
00000000
Reserved
BT1PDUT/BT1PRLH [R/W],
BT1DTBF [R]
XXXXXXXX XXXXXXXX
BT1PCSR/BT1PRLL [R/W]
XXXXXXXX XXXXXXXX
00029CH
0002A0H
RDRMB/TDRMB Multi-function serial
[R/W]
interface data
00000000
register (mirror)
Reserved
00028CH
000290H
RDRMA/TDRMA
[R/W]
00000000
Reserved
000248H
to
00027CH
000284H
Multi-function serial
interface
(without FIFO)
ch.11
Reserved
000240H
000280H
Reserved
Block
Base timer ch.1
Reserved
BT2TMR [R]
00000000 00000000
Reserved
BT2TMCR [R/W]
00000000 00000000
BT2STC [R/W]
00000000
Reserved
BT2PDUT/BT2PRLH [R/W],
BT2DTBF [R]
XXXXXXXX XXXXXXXX
BT2PCSR/BT2PRLL [R/W]
XXXXXXXX XXXXXXXX
Base timer ch.2
Reserved
(Continued)
30
DS07-16903-4E
MB91605A Series
Register
Address
+0
0002B4H
Reserved
BT3STC [R/W]
00000000
Reserved
BT4TMCR [R/W]
00000000 00000000
BT4STC [R/W]
00000000
0002CCH
Reserved
BT4PDUT/BT4PRLH [R/W],
BT4DTBF [R]
XXXXXXXX XXXXXXXX
BT4PCSR/BT4PRLL [R/W]
XXXXXXXX XXXXXXXX
0002C8H
Base timer ch.3
Reserved
BT4TMR [R]
00000000 00000000
0002C4H
Block
Reserved
BT3PDUT/BT3PRLH [R/W],
BT3DTBF [R]
XXXXXXXX XXXXXXXX
BTSEL0123 [R/W]
00000000
0002C0H
+3
BT3TMCR [R/W]
00000000 00000000
BT3PCSR/BT3PRLL [R/W]
XXXXXXXX XXXXXXXX
0002B8H
Base timer ch.4
Reserved
BT5TMR [R]
00000000 00000000
0002D0H
Reserved
0002D4H
BT5TMCR [R/W]
00000000 00000000
BT5STC [R/W]
00000000
00028DH
Reserved
BT5PDUT/BT5PRLH [R/W],
BT5DTBF [R]
XXXXXXXX XXXXXXXX
BT5PCSR/BT5PRLL [R/W]
XXXXXXXX XXXXXXXX
0002D8H
Base timer ch.5
Reserved
BT6TMR [R]
00000000 00000000
0002E0H
Reserved
0002E4H
BT6TMCR [R/W]
00000000 00000000
BT6STC [R/W]
00000000
0002ECH
Reserved
BT6PDUT/BT6PRLH [R/W],
BT6DTBF [R]
XXXXXXXX XXXXXXXX
BT6PCSR/BT6PRLL [R/W]
XXXXXXXX XXXXXXXX
0002E8H
Base timer ch.6
Reserved
BT7TMR [R]
00000000 00000000
0002F0H
0002F4H
Reserved
BTSEL4567 [R/W]
00000000
BT7TMCR [R/W]
00000000 00000000
BT7STC [R/W]
00000000
BT7PCSR/BT7PRLL [R/W]
XXXXXXXX XXXXXXXX
0002F8H
0002FCH
+2
BT3TMR [R]
00000000 00000000
0002B0H
0002BCH
+1
Reserved
BT7PDUT/BT7PRLH [R/W],
BT7DTBF [R]
XXXXXXXX XXXXXXXX
Base timer ch.7
Reserved
(Continued)
DS07-16903-4E
31
MB91605A Series
Address
Register
+0
+1
+2
000300H
to
0003CCH
Reserved
0003D0H
to
0003DCH
Reserved
0003E0H
CARR [R/W]
00000000
DCHCR [R/W]
XXXXXX00
ICHCR [R/W]
XXXX0000
Reserved
0003E8H
DSIZE [R]
00100000 00000000
DFUNC [R]
00000001 01010010
0003ECH
ISIZE [R]
00100000 00000000
IFUNC [R]
00000000 00010110
0003F0H
to
0003FCH
000400H
Reserved
Reserved
DDR3 [R/W]
00000000
000404H
DDR4 [R/W]
--000000
DDR5 [R/W]
00000000
DDR6 [R/W]
00000000
DDR7[R/W]
00000000
000408H
DDR8 [R/W]
--000000
DDR9 [R/W]
--000000
DDRA [R/W]
--000000
DDRB[R/W]
00000000
00040CH
DDRC [R/W]
00000000
DDRD [R/W]
00000000
DDRE [R/W]
00000000
Reserved
Reserved
000420H,
000424H
Reserved
000428H
00042CH
000430H
to
00043CH
PCRB [R/W]
00000000
Reserved
PCRC [R/W]
00000000
Reserved
PCRE [R/W]
00000000
Instruction/data
cache
Reserved
DDR2 [R/W]
----0000
000410H
to
00041CH
Block
Reserved
Reserved
0003E4H
+3
Reserved
Data direction
register
Port pull-up
control register
Reserved
(Continued)
32
DS07-16903-4E
MB91605A Series
Register
Address
+0
+1
+2
+3
000440H
ICR00 [R/W]
11111111
ICR01 [R/W]
11111111
ICR02 [R/W]
11111111
ICR03 [R/W]
11111111
000444H
ICR04 [R/W]
11111111
ICR05 [R/W]
11111111
ICR06 [R/W]
11111111
ICR07 [R/W]
11111111
000448H
ICR08 [R/W]
11111111
ICR09 [R/W]
11111111
ICR10 [R/W]
11111111
ICR11 [R/W]
11111111
00044CH
ICR12 [R/W]
11111111
ICR13 [R/W]
11111111
ICR14 [R/W]
11111111
ICR15 [R/W]
11111111
000450H
ICR16 [R/W]
11111111
ICR17 [R/W]
11111111
ICR18 [R/W]
11111111
ICR19 [R/W]
11111111
000454H
ICR20 [R/W]
11111111
ICR21 [R/W]
11111111
ICR22 [R/W]
11111111
ICR23 [R/W]
11111111
000458H
ICR24 [R/W]
11111111
ICR25 [R/W]
11111111
ICR26 [R/W]
11111111
ICR27 [R/W]
11111111
00045CH
ICR28 [R/W]
11111111
ICR29 [R/W]
11111111
ICR30 [R/W]
11111111
ICR31 [R/W]
11111111
000460H
ICR32 [R/W]
11111111
ICR33 [R/W]
11111111
ICR34 [R/W]
11111111
ICR35 [R/W]
11111111
000464H
ICR36 [R/W]
11111111
ICR37 [R/W]
11111111
ICR38 [R/W]
11111111
ICR39 [R/W]
11111111
000468H
ICR40 [R/W]
11111111
ICR41 [R/W]
11111111
ICR42 [R/W]
11111111
ICR43 [R/W]
11111111
00046CH
ICR44 [R/W]
11111111
ICR45 [R/W]
11111111
ICR46 [R/W]
11111111
ICR47 [R/W]
11111111
000470H
to
00047CH
000480H
RSTRR [R]
XXXXXXXX
RSTCR [R/W]
00000000
STBCR [R/W]
00000011
SLPRR [R/W]
00000000
Reserved
DIVR0 [R/W]
00000000
00048CH
000490H
Interrupt
controller
Reserved
000484H
000488H
Block
DIVR1 [R/W]
00010000
DIVR2 [R/W]
00110000
Clock control unit
Reserved
Reserved
IORR0 [R/W]
00000000
000494H
to
00049CH
IORR1 [R/W]
00000000
IORR2 [R/W]
00000000
Reserved
IORR3 [R/W]
00000000
Peripheral DMA
transfer request
Reserved
(Continued)
DS07-16903-4E
33
MB91605A Series
Address
0004A0H
Register
+0
+1
Reserved
+2
+3
PFR2 [R/W]
----1110
PFR3 [R/W]
10001111
0004A4H
PFR4 [R/W]
--110000
PFR5 [R/W]
11111111
PFR6 [R/W]
00000000
PFR7 [R/W]
00000000
0004A8H
PFR8 [R/W]
--000000
PFR9 [R/W]
--000000
PFRA [R/W]
--000000
PFRB [R/W]
00000000
0004ACH
PFRC [R/W]
00000000
PFRD [R/W]
00000000
PFRE [R/W]
00000000
Reserved
0004B0H
to
0004DCH
0004E0H
ADER [R/W]
00001111 11111111
000514H
Reserved
ICSEL0[R/W]
00000000
ICSEL1[R/W]
00000000
ICSEL2[R/W]
00000000
CSELR [R/W]
-01---00 (at INIT)
-**---** (at RST)
CMONR [R]
-01---00 (at INIT)
-**---** (at RST)
PLLCR [R/W]
--000000 11110000 (at INIT)
--****** ******** (at RST)
MTMCR [R/W]
00001111
CSTBR [R/W]
---- 0000 (INIT pin
= “L” level)
---- **** (at INIT)
0*** **** (at RST)
Reserved
0007E0H
to
0007E8H
Reserved
0007F0H
to
0007F8H
Reserved
ICSEL3[R/W]
00000000
Reserved
000518H
to
0007DCH
0007ECH
A/D input enable
Reserved
0004F4H
to
00050CH
000510H
Port function
register
Reserved
0004E4H
to
0004ECH
0004F0H
Block
DMA start
request clear
select function
Reserved
Reserved
Clock generation
Reserved
Reserved
DMAC
Reserved
DNMIR [R/W]
00000000
Reserved
DILVR [R/W]
00011111
Reserved
(Continued)
34
DS07-16903-4E
MB91605A Series
Register
Address
0007FCH
+0
+1
+2
BMODR [R]
XXXXXXXX
(Varied by
operation modes)
MODR [R]
000XXXXX
(Varied by
operation modes)
+3
Reserved
Block
Operation mode
control
000800H
to
000BFCH
Reserved
Reserved
000C00H
GCFR [R/W]
00000000 00000000 00000000 00000000
DMAC
000C04H
to
000CFCH
Reserved
Reserved
000D00H
CCFR0 [R/W]
00000000 00000000
CSTR0 [R/W]
00000000 00000000
000D04H
CCTR0 [R/W]
00000000 00000000
Reserved
000D08H
SBA0 [R/W]
00000000 00000000 00000000 00000000
000D0CH
DBA0 [R/W]
00000000 00000000 00000000 00000000
000D10H
PIX0 [R/W]
00000000 00000000 00000000 00000000
000D14H
SIX0 [R/W]
00000000 00000000 00000000 00000000
000D18H
BCL0 [R/W]
00000000 00000000 00000000 00000000
000D1CH
APR0 [R/W]
00000000 00000000 00000000 00000000
000D20H
CCFR1 [R/W]
00000000 00000000
CSTR1 [R/W]
00000000 00000000
000D24H
CCTR1 [R/W]
00000000 00000000
Reserved
000D28H
SBA1 [R/W]
00000000 00000000 00000000 00000000
000D2CH
DBA1 [R/W]
00000000 00000000 00000000 00000000
000D30H
PIX1 [R/W]
00000000 00000000 00000000 00000000
000D34H
SIX1 [R/W]
00000000 00000000 00000000 00000000
DMAC
(Continued)
DS07-16903-4E
35
MB91605A Series
Address
Register
+0
+1
+2
+3
000D38H
BCL1 [R/W]
00000000 00000000 00000000 00000000
000D3CH
APR1 [R/W]
00000000 00000000 00000000 00000000
000D40H
CCFR2 [R/W]
00000000 00000000
CSTR2 [R/W]
00000000 00000000
000D44H
CCTR2 [R/W]
00000000 00000000
Reserved
000D48H
SBA2 [R/W]
00000000 00000000 00000000 00000000
000D4CH
DBA2 [R/W]
00000000 00000000 00000000 00000000
000D50H
PIX2 [R/W]
00000000 00000000 00000000 00000000
000D54H
SIX2 [R/W]
00000000 00000000 00000000 00000000
000D58H
BCL2 [R/W]
00000000 00000000 00000000 00000000
000D5CH
APR2 [R/W]
00000000 00000000 00000000 00000000
000D60H
CCFR3 [R/W]
00000000 00000000
CSTR3 [R/W]
00000000 00000000
000D64H
CCTR3 [R/W]
00000000 00000000
Reserved
000D68H
SBA3 [R/W]
00000000 00000000 00000000 00000000
000D6CH
DBA3 [R/W]
00000000 00000000 00000000 00000000
000D70H
PIX3 [R/W]
00000000 00000000 00000000 00000000
000D74H
SIX3 [R/W]
00000000 00000000 00000000 00000000
000D78H
BCL3 [R/W]
00000000 00000000 00000000 00000000
000D7CH
APR3 [R/W]
00000000 00000000 00000000 00000000
000D80H
to
000EFCH
Reserved
Block
DMAC
Reserved
(Continued)
36
DS07-16903-4E
MB91605A Series
Register
Address
+0
+1
BT8TMR [R]
00000000 00000000
000F00H
Reserved
000F04H
BT8STC [R/W]
00000000
000F0CH
+3
Block
BT8TMCR [R/W]
00000000 00000000
Reserved
BT8PDUT/BT8PRLH [R/W],
BT8DTBF [R]
XXXXXXXX XXXXXXXX
BT8PCSR/BT8PRLL [R/W]
XXXXXXXX XXXXXXXX
000F08H
Base timer ch.8
Reserved
BT9TMR [R]
00000000 00000000
000F10H
Reserved
000F14H
BT9TMCR [R/W]
00000000 00000000
BT9STC [R/W]
00000000
000F1CH
Reserved
BT9PDUT/BT9PRLH [R/W],
BT9DTBF [R]
XXXXXXXX XXXXXXXX
BT9PCSR/BT9PRLL [R/W]
XXXXXXXX XXXXXXXX
000F18H
Base timer ch.9
Reserved
BTATMR [R]
00000000 00000000
000F20H
Reserved
000F24H
BTATMCR [R/W]
00000000 00000000
BTASTC [R/W]
00000000
000F2CH
Reserved
BTAPDUT/BTAPRLH [R/W],
BTADTBF [R]
XXXXXXXX XXXXXXXX
BTAPCSR/BTAPRLL [R/W]
XXXXXXXX XXXXXXXX
000F28H
Base timer ch.10
Reserved
BTBTMR [R]
00000000 00000000
000F30H
000F34H
Reserved
BTBTMCR [R/W]
00000000 00000000
BTBSTC [R/W]
00000000
BTSEL89AB [R/W]
00000000
000F40H
to
001FFCH
Reserved
BTBPDUT/BTBPRLH [R/W],
BTBDTBF [R]
XXXXXXXX XXXXXXXX
BTBPCSR/BTBPRLL [R/W]
XXXXXXXX XXXXXXXX
000F38H
000F3CH
+2
Base timer ch.11
BTSSSR [W]
-------- --------
Reserved
Reserved
Reserved
(Continued)
DS07-16903-4E
37
MB91605A Series
Address
Register
+0
+1
+2
002000H
MCMR0 [R/W]
-------- -------- -------- -0000000
002004H
MCMR1 [R/W]
-------- -------- -------- -0000000
002008H
MCMR2 [R/W]
-------- -------- -------- -0000000
00200CH
MCMR3 [R/W]
-------- -------- -------- -0000000
002010H
MCMR4 [R/W]
-------- -------- -------- -0000001
002014H
MCMR5 [R/W]
-------- -------- -------- -0000000
002018H
MCMR6 [R/W]
-------- -------- -------- -0000000
00201CH
MCMR7 [R/W]
-------- -------- -------- -0000000
002020H
MCTR0 [R/W]
00000101 01011111 11110000 00001111
002024H
MCTR1 [R/W]
00000101 01011111 11110000 00001111
002028H
MCTR2 [R/W]
00000101 01011111 11110000 00001111
00202CH
MCTR3 [R/W]
00000101 01011111 11110000 00001111
002030H
MCTR4 [R/W]
00000101 01011111 11110000 00001111
002034H
MCTR5 [R/W]
00000101 01011111 11110000 00001111
002038H
MCTR6 [R/W]
00000101 01011111 11110000 00001111
00203CH
MCTR7 [R/W]
00000101 01011111 11110000 00001111
002040H
MCAR0 [R/W]
-------- -0001111 -------- 01000000
002044H
MCAR1 [R/W]
-------- -0001111 -------- 00010000
002048H
MCAR2 [R/W]
-------- -0001111 -------- 00100000
00204CH
MCAR3 [R/W]
-------- -0001111 -------- 00110000
+3
Block
External bus
interface
(Continued)
38
DS07-16903-4E
MB91605A Series
(Continued)
Register
Address
+0
+1
+2
002050H
MCAR4 [R/W]
-------- -0001111 -------- 00000000
002054H
MCAR5 [R/W]
-------- -0001111 -------- 01010000
002058H
MCAR6 [R/W]
-------- -0001111 -------- 01100000
00205CH
MCAR7 [R/W]
-------- -0001111 -------- 01110000
002000H
to
0020FCH
Reserved
002100H
SDMR [R/W]
-------- -------- 00010011 --00-000
002104H
SDRTR [R/W]
-------0 00000000 00000000 00101000
002108H
SDPDR [R/W]
-------- -------- 00000000 00000000
00210CH
SDTR [R/W]
------00 01000010 00010001 0100--01
002110H
SDCMR [R/W]
0------- ---00000 00000000 00000000
002114H
to
0022FCH
Reserved
002300H
CLKCTL [R/W]
------00
002304H
to
007FFCH
DS07-16903-4E
Block
External bus
interface
Reserved
SDRAM interface
Reserved
Reserved
Reserved
+3
External bus
interface
Reserved
39
MB91605A Series
■ VECTOR TABLE
Interrupt number
Interrupt source
HexaDecimal
decimal
Interrupt
level
Offset
TBR default
address
DMA
transfer
request
Reset
0
00
⎯
3FCH
000FFFFCH
⎯
System reserved
1
01
⎯
3F8H
000FFFF8H
⎯
System reserved
2
02
⎯
3F4H
000FFFF4H
⎯
System reserved
3
03
⎯
3F0H
000FFFF0H
⎯
System reserved
4
04
⎯
3ECH
000FFFECH
⎯
System reserved
5
05
⎯
3E8H
000FFFE8H
⎯
System reserved
6
06
⎯
3E4H
000FFFE4H
⎯
System reserved
7
07
⎯
3E0H
000FFFE0H
⎯
System reserved
8
08
⎯
3DCH
000FFFDCH
⎯
INTE instruction
9
09
⎯
3D8H
000FFFD8H
⎯
Instruction break exception
10
0A
⎯
3D4H
000FFFD4H
⎯
Operand break
11
0B
⎯
3D0H
000FFFD0H
⎯
Step trace trap
12
0C
⎯
3CCH
000FFFCCH
⎯
NMI request (tool)
13
0D
⎯
3C8H
000FFFC8H
⎯
Undefined instruction exception
14
0E
⎯
3C4H
000FFFC4H
⎯
NMI request
15
0F
15 (FH) fixed
3C0H
000FFFC0H
⎯
External interrupt ch.0
16
10
ICR00
3BCH
000FFFBCH
External interrupt ch.1
17
11
ICR01
3B8H
000FFFB8H
External interrupt ch.2
18
12
ICR02
3B4H
000FFFB4H
External interrupt ch.3
19
13
ICR03
3B0H
000FFFB0H
External interrupt ch.4
20
14
ICR04
3ACH
000FFFACH
External interrupt ch.5
21
15
ICR05
3A8H
000FFFA8H
External interrupt ch.6
22
16
ICR06
3A4H
000FFFA4H
External interrupt ch.7
23
17
ICR07
3A0H
000FFFA0H
16-bit reload timer ch.0
24
18
ICR08
39CH
000FFF9CH
16-bit reload timer ch.1
25
19
ICR09
398H
000FFF98H
16-bit reload timer ch.2
26
1A
ICR10
394H
000FFF94H
Multi-function serial interface ch.0 RX
27
1B
ICR11
390H
000FFF90H
Multi-function serial interface ch.0 TX
28
1C
ICR12
38CH
000FFF8CH
Multi-function serial interface ch.0
I2C status
29
1D
ICR13
388H
000FFF88H
Multi-function serial interface ch.1 RX
30
1E
ICR14
384H
000FFF84H
Multi-function serial interface ch.1 TX
31
1F
ICR15
380H
000FFF80H
Multi-function serial interface ch.1
I2C status
32
20
ICR16
37CH
000FFF7CH
Multi-function serial interface ch.2 RX
33
21
ICR17
378H
000FFF78H
⎯
⎯
(Continued)
40
DS07-16903-4E
MB91605A Series
Interrupt number
Interrupt source
HexaDecimal
decimal
Interrupt
level
Offset
TBR default
address
DMA
transfer
request
Multi-function serial interface ch.2 TX
34
22
ICR18
374H
000FFF74H
Multi-function serial interface ch.2
I2C status
35
23
ICR19
370H
000FFF70H
Multi-function serial interface ch.3
RX/TX/I2C status
36
24
ICR20
36CH
000FFF6CH
*
Multi-function serial interface ch.4
RX/TX/I2C status
37
25
ICR21
368H
000FFF68H
*
Multi-function serial interface ch.5
RX/TX/I2C status
38
26
ICR22
364H
000FFF64H
*
A/D converter
39
27
ICR23
360H
000FFF60H
HDMI-CEC/Remote control
40
28
ICR24
35CH
000FFF5CH
External interrupt 8-15
41
29
ICR25
358H
000FFF58H
External interrupt 16-23
42
2A
ICR26
354H
000FFF54H
Multi-function serial interface ch.6
RX/TX/I2C status
43
2B
ICR27
350H
000FFF50H
*
Multi-function serial interface ch.7
RX/TX/I2C status
44
2C
ICR28
34CH
000FFF4CH
*
Multi-function serial interface ch.8
RX/TX/I2C status
45
2D
ICR29
348H
000FFF48H
*
Multi-function serial interface ch.9
RX/TX/I2C status
46
2E
ICR30
344H
000FFF44H
*
Multi-function serial interface ch.10
RX/TX/I2C status
47
2F
ICR31
340H
000FFF40H
*
Multi-function serial interface ch.11
RX/TX/I2C status
48
30
ICR32
33CH
000FFF3CH
*
Base timer ch.0
49
31
ICR33
338H
000FFF38H
Base timer ch.1
50
32
ICR34
334H
000FFF34H
Base timer ch.2
51
33
ICR35
330H
000FFF30H
Base timer ch.3
52
34
ICR36
32CH
000FFF2CH
Base timer ch.4
53
35
ICR37
328H
000FFF28H
Base timer ch.5
54
36
ICR38
324H
000FFF24H
Base timer ch.6
55
37
ICR39
320H
000FFF20H
Base timer ch.7
56
38
ICR40
31CH
000FFF1CH
Base timer ch.8/ch.9/ch.10/ch.11
57
39
ICR41
318H
000FFF18H
DMAC ch.0
58
3A
ICR42
314H
000FFF14H
⎯
DMAC ch.1
59
3B
ICR43
310H
000FFF10H
⎯
DMAC ch.2
60
3C
ICR44
30CH
000FFF0CH
⎯
DMAC ch.3
61
3D
ICR45
308H
000FFF08H
⎯
Timebase timer
62
3E
ICR46
304H
000FFF04H
⎯
⎯
⎯
(Continued)
DS07-16903-4E
41
MB91605A Series
(Continued)
Interrupt number
Interrupt source
HexaDecimal
decimal
Interrupt
level
Offset
TBR default
address
DMA
transfer
request
Delay interrupt
63
3F
ICR47
300H
000FFF00H
⎯
System reserved (Used by REALOS)
64
40
⎯
2FCH
000FFEFCH
⎯
System reserved (Used by REALOS)
65
41
⎯
2F8H
000FFEF8H
⎯
Used by INT instruction
66
to
255
42
to
FF
⎯
2F4H
to
000H
000FFEF4H
to
000FFC00H
⎯
* : The I2C status interrupt cannot be used for DMAC transfer requests.
42
DS07-16903-4E
MB91605A Series
■ ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Remarks
Min
Max
VDDE
Vss − 0.3
Vss + 4.0
V
VDDI
Vss − 0.3
Vss + 2.2
V
AVCC
Vss − 0.3
Vss + 4.0
V
*2
AVRH
Vss − 0.3
Vss + 4.0
V
*2
VI
Vss − 0.3
VDDE + 0.5
V
VIA
Vss − 0.3
AVcc + 0.5
V
VO
Vss − 0.3
VDDE + 0.5
V
IOL
⎯
10
mA
*3
“L” level average output current
IOLAV
⎯
4
mA
*4
“L” level total maximum output current
ΣIOL
⎯
100
mA
ΣIOLAV
⎯
50
mA
*5
IOH
⎯
−10
mA
*3
“H” level average output current
IOHAV
⎯
−4
mA
*4
“H” level total maximum output current
ΣIOH
⎯
−100
mA
ΣIOHAV
⎯
−50
mA
Power consumption
PD
⎯
⎯
mW
Operating temperature
Ta
−10
+70
°C
TSTG
−55
+125
°C
Power supply voltage*1
Analog power supply voltage*
1
Analog reference power voltage*
1
Input voltage*1
Analog pin input voltage*1
Output voltage*
1
“L” level maximum output current
“L” level total average output current
“H” level maximum output current
“H” level total average output current
Storage temperature
*5
*1 : The parameter is based on AVSS = VSS = 0.0 V.
*2 : Must not exceed VDDE + 0.3 V during transitions such as when the power is turned on.
*3 : The maximum output current is the peak value for a single pin.
*4 : The average output current is the average current for a single pin over a period of 100 ms.
*5 : The total average output current is the average current for all pins over a period of 100 ms.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
DS07-16903-4E
43
MB91605A Series
2. Recommended Operating Conditions
(Vss = AVss = 0.0 V)
Parameter
Symbol
Value
Unit
Min
Max
VDDE
3.0
3.6
V
VDDI
1.65
1.95
V
Analog power supply voltage
AVCC
3.0
3.6
V
Analog reference voltage
AVRH
AVSS
AVCC
V
Ta
− 10
+ 70
°C
Power supply voltage
Operating temperature
Remarks
Avcc ≤ VDDE
WARNING: The recommended operating conditions are required in order to ensure the normal operation of
the semiconductor device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data sheet. Users considering application outside the listed conditions are advised to contact
their representatives beforehand.
44
DS07-16903-4E
MB91605A Series
3. DC Characteristics
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Symbol
Pin name
During normal
operation
ICC
Power supply
current
ICCS
Condition
Upper : VDDE,
Lower : VDDI
ICCH
Sleep mode
Stop mode
Value
Min
Typ
Max
⎯
⎯
100
⎯
⎯
180
⎯
⎯
50
⎯
⎯
90
⎯
⎯
100
⎯
⎯
1000
Unit
Remarks
mA
CPU : 80 MHz,
Peripheral :
40 MHz,
External bus :
80 MHz
mA
CPU : 80 MHz,
Peripheral :
40 MHz,
External bus :
80 MHz
μA
Ta = + 25 °C,
VDDE = 3.3 V,
VDDI = 1.8 V
“H” level input
voltage
VIH
⎯
⎯
VDDE
× 0.7
⎯
VDDE
+ 0.3
V
“L” level input
voltage
VIL
⎯
⎯
Vss
− 0.3
⎯
VDDE
× 0.3
V
“H” level input
voltage
(hysteresis input)
VIHS
⎯
⎯
VDDE
× 0.8
⎯
VDDE
+ 0.3
V
“L” level input
voltage
(hysteresis input)
VILS
⎯
⎯
Vss
− 0.3
⎯
VDDE
× 0.2
V
“H” level output
voltage
VOH
⎯
VDDE = 3.0 V
IOH = −4 mA
VDDE
− 0.5
⎯
VDDE
V
“L” level output
voltage
VOL
⎯
VDDE = 3.0 V
IOL = 4 mA
Vss
⎯
0.4
V
⎯
−5
⎯
+5
μA
(Digital pins)
⎯
− 10
⎯
+ 10
μA
(Analogshared pins)
Input leak current
Pull-up resistor
value/pull-down
resistor value
Input capacitance
DS07-16903-4E
IIL
⎯
RPU
Pull-up pin
Pull-down pin
⎯
16.6
33
66
kΩ
CIN
Other than
VDDE, VDDI,
VSS, AVCC,
AVSS, AVRH
⎯
⎯
10
⎯
pF
45
MB91605A Series
4. AC Characteristics
(1) Main Clock Input Standard
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Symbol
Input frequency
FCH
Input clock cycle
tCYLH
Pin
name
Value
Condition
X0
X1
Unit
Remarks
20
MHz
When using PLL
4
20
MHz
When using external
clock
⎯
50
250
ns
When using external
clock
Min
Max
⎯
10
⎯
Input clock pulse width
⎯
PWH/tCYLH
PWL/tCYLH
45
55
%
When using external
clock
Input clock rise time
and fall time
TCF
tCR
⎯
⎯
5
ns
When using external
clock
Internal operating
clock frequency
Internal operating
clock cycle time
FCC
⎯
⎯
⎯
80
MHz
CPU clock
FCP
⎯
⎯
⎯
40
MHz
Peripheral clock
FCT
⎯
⎯
⎯
80
MHz
External bus clock
tCYCC
⎯
⎯
12.5
⎯
ns
CPU clock
tCYCP
⎯
⎯
25
⎯
ns
Peripheral clock
tCYCT
⎯
⎯
12.5
⎯
ns
External bus clock
tCYLH
0.8 × VDDE
0.8 × VDDE
X0
X1
PWH
0.2 × VDDE
PWL
tCF
46
0.8 × VDDE
0.2 × VDDE
tCR
DS07-16903-4E
MB91605A Series
(2) PLL Oscillation Stabilization Time (LOCK UP Time)
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Symbol
PLL oscillation stabilization time
(LOCK UP time)
Condition
⎯
tLOCK
Value
Min
Unit
Max
⎯
600
μs
Remarks
Time from when the
PLL starts operating
until the oscillation
stabilizes
(3) Reset Input Standards
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Reset input time
(At power-on, main oscillation stop
mode)
Symbol
Value
Condition
tINITX
INIT
Reset input time
(At other times)
Reset input rise time and fall time
Pin
name
⎯
Oscillation time of
oscillator + 10 tCYLH
⎯
ns
10 tCYLH
⎯
ns
⎯
10
ms
VIH
VIL
DS07-16903-4E
Max
tINITXF
tINITXR
VIH
Unit
Min
VIL
47
MB91605A Series
(4) Clock Output Timing
tCHCL : tCLCH = 1 : 1 (divided by 1, 2, 4)
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Symbol
Cycle time
tCYC*
MCLK ↑ → MCLK ↓
tCHCL
MCLK ↓ → MCLK ↑
tCLCH
Pin name
Condition
MCLK
FCT = FCC
FCT = FCC / 2
Value
Unit
Min
Max
tCYCT
⎯
ns
tCYC / 2 − 2.25
tCYC / 2 + 2.25
ns
tCYC / 2 − 2.25
tCYC / 2 + 2.25
ns
* : tCYC is the period of 1 clock cycle including the gear cycle.
tCHCL : tCLCH = 1 : 2 (divided by 3)
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Symbol
Cycle time
tCYC*
MCLK ↑ → MCLK ↓
tCHCL
MCLK ↓ → MCLK ↑
tCLCH
Pin name
Condition
MCLK
FCT = FCC
FCT = FCC / 2
Value
Unit
Min
Max
tCYCT
⎯
ns
1/3 tCYC − 2.25
1/3 tCYC + 2.25
ns
2/3 tCYC − 2.25
2/3 tCYC + 2.25
ns
* : tCYC is the period of 1 clock cycle including the gear cycle.
tCYC
tCHCL
tCLCH
VOH
VOH
MCLK
48
VOL
DS07-16903-4E
MB91605A Series
(5) External Bus Access Read/Write Operation
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Symbol
Pin name
tCHASL
Condition
Value
Unit
Min
Max
MCLK
AS
0.8
6
ns
MCLK
CS0 to CS6
0.8
6
ns
MCLK
A0 to A23
0.8
6
ns
tCHRH
MCLK
RD
0.8
6
ns
RD minimum pulse width
tRLRH
RD
tCYC − 6
⎯
ns
Data setup → RD ↑ time
tDSRH
10
⎯
ns
RD ↑ → data hold time
tRHDH
RD
D16 to D31
0
⎯
ns
MCLK
WE
MDQM2, MDQM3
0.8
6
ns
WE
MDQM2, MDQM3
tCYC − 6
⎯
ns
MCLK
D16 to D31
0.8
6
ns
0.8
6
ns
AS delay time
CS delay time
Address delay time
RD delay time
WE, MDQM2, MDQM3
delay time
tCHASH
tCHCSL
tCHCSH
tCHAV
tCHAX
tCHRL
tCHWL
tCHWH
WE, MDQM2, MDQM3
minimum pulse width
tWLWH
MCLK ↑ → data output
time
tCHDV
MCLK ↑ → data hold time
tCHDX
⎯
Remarks
*
*
* : When the bus timing is delayed by automatic wait insertion or RDY input, add the time (tCYC × the number of
cycles added for the delay) to this rating.
Note: When the external load capacitance C = 30 pF.
DS07-16903-4E
49
MB91605A Series
tCYC
MCLK
VOH
VOH
VOH
tCHCSL
VOH
tCHCSH
VOH
VOL
CS0 to CS6
tCHAV
tCHAX
VOH
VOL
A0 to A23
VOH
VOL
tCHRL
tCHRH
tRLRH
RD
MDQM2
MDQM3
VOH
VOL
tDSRH
VIH
D16 to D31
Read
VIL
tCHWL
VIH
VIL
tCHWH
tWLWH
WE
MDQM2
MDQM3
VOH
VOL
VOH
D16 to D31
VOL
tCHDV
50
tRHDH
VOH
Write
VOL
tCHDX
DS07-16903-4E
MB91605A Series
tCYC
MCLK
VOH
VOH
tCHASL
AS
VOH
VOH
tCHASH
VOH
VOL
tCHCSL
CS0 to CS6
tCHCSH
VOH
VOL
tCHAV
A0 to A23
tCHAX
VOH
VOL
VOH
VOL
tCHRL
RD
MDQM2
MDQM3
tCHRH
VOH
VOL
tDSRH
VIH
D16 to D31
Read
VIL
WE
MDQM2
MDQM3
tCHWL
VIH
VIL
tCHWH
tWLWH
VOL
VOH
D16 to D31
VOH
VOH
Write
VOL
tCHDV
DS07-16903-4E
tRHDH
VOL
tCHDX
51
MB91605A Series
(6) Multiplexed Bus Access Read/Write Operation
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Symbol
MCLK ↑ → D16 to D31 address
delay time
tCHMAV
tCHMAX
MCLK ↑ → D16 to D31 data
delay time
tCHMDV
Pin name
MCLK
D16 to D31
(address)
Condition
Value
Unit
Min
Max
0.8
10
ns
0.8
10
ns
⎯
Notes: • Ratings other than those listed here are the same as the standard bus interface ratings.
• When the external load capacitance C = 30 pF.
tCYC
MCLK
AS
tCHMAV
D16 to D31
tCHMDV
tCHMAX
Address
Write data
tCYC
MCLK
AS
tCHMAV
D16 to D31
52
tCHMDV
Address
tCHMAX
Write data
DS07-16903-4E
MB91605A Series
(7) SDRAM Timing
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Symbol
Output clock cycle time
tCYCSD
“H” level clock pulse width
tCHSD
“L” level clock pulse width
tCLSD
MCLK ↑ → output delay time
tODSDCKE
Output hold time
tOHSDCKE
MCLK ↑ → output delay time
tODSDRAS
Output hold time
tOHSDRAS
MCLK ↑ → output delay time
tODSDCAS
Output hold time
tOHSDCAS
MCLK ↑ → output delay time
tODSDWE
Output hold time
tOHSDWE
MCLK ↑ → output delay time
tODSDCS
Output hold time
tOHSDCS
MCLK ↑ → output delay time
tODSDA
Output hold time
tOHSDA
MCLK ↑ → output delay time
tODSDDQM
Output hold time
tOHSDDQM
MCLK ↑ → output delay time
tODSDD
Output hold time
tOHSDD
Data input setup time
tISSDD
Data input hold time
tIHSDD
Pin name
MCLK
Condition
⎯
MCLKE
MRAS
MCAS
MDWE
⎯
CS8
A0 to A15
MDQM2
MDQM3
D16 to D31
D16 to D31
⎯
Value
Unit
Min
Max
⎯
80
MHz
4
⎯
ns
4
⎯
ns
⎯
6
ns
0.8
⎯
ns
⎯
6
ns
0.8
⎯
ns
⎯
6
ns
0.8
⎯
ns
⎯
6
ns
0.8
⎯
ns
⎯
6
ns
0.8
⎯
ns
⎯
6
ns
0.8
⎯
ns
⎯
6
ns
0.8
⎯
ns
⎯
6
ns
0.8
⎯
ns
6
⎯
ns
0.8
⎯
ns
Note: When the external load capacitance C = 30 pF.
DS07-16903-4E
53
MB91605A Series
tCYCSD
MCLK
tCHSD
tCLSD
MCLK
tODSDCKE
tODSDRAS
tODSDCAS
tODSDWE
tODSDCS
tODSDA
tODSDDQM
MCLKE
MRAS
MCAS
MDWE
CS8
A0 to A15
MDQM2
MDQM3
tOHSDCKE
tOHSDRAS
tOHSDCAS
tOHSDWE
tOHSDCS
tOHSDA
tOHSDDQM
tODSDD
D16 to D31
Output
tOHSDD
D16 to D31
Input
tISSDD
54
tIHSDD
DS07-16903-4E
MB91605A Series
(8) Ready Input Timings
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Symbol
Pin name
Condition
RDY setup time → MCLK ↑
tRDYS
MCLK ↑ → RDY hold time
tRDYH
MCLK
RDY
⎯
Value
Unit
Min
Max
6
⎯
ns
0
⎯
ns
tCYC
VOH
MCLK
VOL
VOL
tRDYS
RDY
when wait
applied
RDY
when wait not
applied
DS07-16903-4E
VOH
tRDYH
tRDYS tRDYH
VIH
VIL
VIH
VIL
VIH
VIH
VIL
VIL
55
MB91605A Series
(9) Base Timer Input Timing
• Timer input timing
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Input pulse width
Symbol
Pin name
Condition
tTIWH
tTIWL
TIOA0 to TIOA11
TIOB0 to TIOB11
⎯
Value
Min
Max
2 tCYCP*
⎯
Unit
ns
* : tCYCP represents the peripheral clock cycle time.
tTIWH
TIOA0 to TIOA11
TIOB0 to TIOB11
56
VIHS
tTIWL
VIHS
VILS
VILS
DS07-16903-4E
MB91605A Series
(10) UART Timing
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Symbol
Pin name
Serial clock cycle time
tSCYC
SCK0 to SCK11
SCK ↓ → SOUT delay
time
tSLOV
SCK0 to SCK11
SOUT0 to
SOUT11
Valid SIN → SCK ↑
tIVSH
SCK0 to SCK11
SIN0 to SIN11
SCK ↑ → valid SIN hold
time
tSHIX
Serial clock “H” pulse
width
Value
Condition
Unit
Min
Max
4 tCYCP*
⎯
ns
− 20
+ 20
ns
30
⎯
ns
SCK0 to SCK11
SIN0 to SIN11
20
⎯
ns
tSHSL
SCK0 to SCK11
2 tCYCP*
⎯
ns
Serial clock “L” pulse
width
tSLSH
SCK0 to SCK11
2 tCYCP*
⎯
ns
SCK ↓ → SOUT delay
time
tSLOV
SCK0 to SCK11
SOUT0 to
SOUT11
⎯
30
ns
Valid SIN → SCK ↑
tIVSH
SCK0 to SCK11
SIN0 to SIN11
20
⎯
ns
SCK ↑ → valid SIN hold
time
tSHIX
SCK0 to SCK11
SIN0 to SIN11
20
⎯
ns
Internal shift
clock operation
External shift
clock operation
* : tCYCP represents the peripheral clock cycle time.
Notes: • The above standards are the AC ratings for CLK synchronous mode.
• When the external load capacitance C = 50 pF.
DS07-16903-4E
57
MB91605A Series
• Internal shift clock mode
tSCYC
SCK0 to SCK11
VOH
VOL
VOL
tSLOV
VOH
VOL
SOUT0 to SOUT11
tIVSH
tSHIX
VIHS
VILS
SIN0 to SIN11
VIHS
VILS
• External shift clock mode
tSLSH
SCK0 to SCK11
tSHSL
VILS
VILS
VIHS
VIHS
tSLOV
SOUT0 to SOUT11
VOH
VOL
tIVSH
SIN0 to SIN11
58
VIHS
VILS
tSHIX
VIHS
VILS
DS07-16903-4E
MB91605A Series
(11) Reload Timer Event Input, Interrupt Input Timing
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Symbol
Pin name
Value
Condition
TIN0 to TIN2
Input pulse width
tTIWH
tTIWL
⎯
INT0 to INT23
NMI
Unit
Remarks
⎯
ns
*1
3 tCYCP
⎯
ns
*1
1.0
⎯
μs
*2
Min
Max
2 tCYCP
*1 : tCYCP represents the peripheral clock cycle time, except when in stop mode.
*2 : When in stop mode.
tTIWL
TIN0 to TIN2
INT0 to INT23
NMI
tTIWH
VIHS
VILS
VIHS
VILS
(12) A/D Converter Trigger Input Timing
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Value
Parameter
Symbol
Pin name
Condition
Min
Max
A/D converter trigger input
tTADTGL
tTADTGH
ATRG
⎯
2 tCYCP
⎯
Unit
Remarks
ns
*
* : tCYCP represents the peripheral clock cycle time.
tTADTGL
tTADTGH
ATRG
VIHS
VILS
DS07-16903-4E
VIHS
VILS
59
MB91605A Series
(13) Remote Control and HDMI-CEC Input Timing
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Remote receiver
Pin name
Conditi
on
Min
Max
tRCINH
tRCINL
RCIN
⎯
62
⎯
tRCINL
VIHS
VILS
Unit
Remarks
μs
2 clocks or more of
the count clock
tRCINH
RCIN
60
Value
Symbol
VIHS
VILS
DS07-16903-4E
MB91605A Series
(14) I2C Timing
• When operating in master mode
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Symbol
Pin
name
Condition
Typical mode
High-speed
mode*3
Min
Max
Min
Max
Unit
SCL clock frequency
fSCL
0
100
0
400
kHz
“L” period of
SCL clock
tLOW
4.7
⎯
1.3
⎯
μs
“H” period of
SCL clock
tHIGH
4.0
⎯
0.6
⎯
μs
Bus free time between
“STOP condition” and
“START condition”
tBUS
4.7
⎯
1.3
⎯
μs
SCL ↓ → SDA
output delay time
tDLDAT
⎯
5 tCYCP*1
⎯
5 tCYCP*1
ns
“Repeated START
condition” setup time
SCL ↑ → SDA ↓
tSUSTA
SDA0
to
SDA11,
4.7
⎯
0.6
⎯
μs
“Repeated START
condition” hold time
SDA ↓ → SCL ↓
tHDSTA
SCL0
to
SCL11
“STOP condition” setup time SCL ↑ →
SDA ↑
R = 1 kΩ,
C = 50 pF*4
4.0
⎯
0.6
⎯
μs
tSUSTO
4.0
⎯
0.6
⎯
μs
SDA data input
hold time
(vs. SCL ↓)
tHDDAT
2 tCYCP*1
⎯
2 tCYCP*1
⎯
μs
SDA data input
setup time
(vs. SCL ↑)
tSUDAT
250
⎯
100*2
⎯
ns
Remarks
The first
clock pulse
is generated
after this.
*1 : tCYCP is peripheral clock cycle time.
*2 : A high-speed mode I2C bus device can be used on a standard mode I2C bus system. In this case, the device
must satisfy the requirement of “tSUDAT ≥ 250 ns”.
When a device does not extend the “L” period of the SCL signal, the next data must be output to the SDA line
within 1250 ns (maximum SDA/SCL rise time + tSUDAT) from when the SCL line is released.
*3 : For use at over 100 kHz, set the resource clock to 6 MHz or higher.
*4 : R and C represent the pull-up resistance and load capacitance of the SCL and SDA output lines, respectively.
DS07-16903-4E
61
MB91605A Series
• When operating in slave mode
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V, Ta = −10 °C to + 70 °C)
Parameter
Symbol
Pin
name
Condition
Typical mode
High-speed
mode*3
Min
Max
Min
Max
Unit
SCL clock frequency
fSCL
0
100
0
400
kHz
“L” period of
SCL clock
tLOW
4.7
⎯
1.3
⎯
μs
“H” period of
SCL clock
tHIGH
4.0
⎯
0.6
⎯
μs
SCL ↓ → SDA
output delay time
tDLDAT
⎯
5 tCYCP*1
⎯
5 tCYCP*1
ns
tBUS
4.7
⎯
1.3
⎯
μs
2 tCYCP*1
⎯
2 tCYCP*1
⎯
μs
250
⎯
100*2
⎯
ns
4.7
⎯
0.6
⎯
μs
Bus free time between
“STOP condition” and
“START condition”
SDA data input
hold time
(vs. SCL ↓)
tHDDAT
SDA data input
setup time
(vs. SCL ↑)
tSUDAT
“Repeated START
condition” setup time
SCL ↑ → SDA ↓
tSUSTA
SDA0
to
SDA11,
SCL0
to
SCL11
R = 1 kΩ,
C = 50 pF*4
“Repeated START
condition” hold time
SDA ↓ → SCL ↓
tHDSTA
4.0
⎯
0.6
⎯
μs
“STOP condition” setup time SCL ↑ → SDA
↑
tSUSTO
4.0
⎯
0.6
⎯
μs
Remarks
The first
clock pulse
is generated
after this.
*1 : tCYCP is peripheral clock cycle time.
*2 : A high-speed mode I2C bus device can be used on a standard mode I2C bus system. In this case, the device
must satisfy the requirement of “tSUDAT ≥ 250 ns”.
When a device does not extend the “L” period of the SCL signal, the next data must be output to the SDA line
within 1250 ns (maximum SDA/SCL rise time + tSUDAT) from when the SCL line is released.
*3 : For use at over 100 kHz, set the resource clock to 6 MHz or higher.
*4 : R and C represent the pull-up resistance and load capacitance of the SCL and SDA output lines, respectively.
62
DS07-16903-4E
MB91605A Series
I2C timing
0.8 VDDE
SDA0 to SDA11
0.2 VDDE
tBUS
tLOW
tHIGH
tHDSTA
0.8 VDDE
SCL0 to SCL11
0.2 VDDE
tHDSTA
tHDDAT
tSUDAT
tSUSTA
tSUSTO
fSCL
DS07-16903-4E
63
MB91605A Series
5. Electrical Characteristics for the A/D Converter
(VDDE = AVcc = 3.0 V to 3.6 V, VDDI = 1.65 V to 1.95 V, Vss = AVss = 0 V Ta = −10 °C to + 70 °C)
Value
Parameter
Unit
Remarks
Min
Typ
Max
⎯
⎯
10
bit
⎯
⎯
± 5.5
LSB
⎯
⎯
± 3.5
LSB
Differential linear error*1
⎯
⎯
± 2.0
LSB
Zero transition voltage*1
⎯
⎯
± 6.0
LSB
AVRH − 5.5
⎯
8.1*2
⎯
⎯
μs
Power supply current
(analog + digital)
⎯
3.6
⎯
mA
⎯
⎯
5
μA
At power-down*3
Reference power supply
current
(between AVRH and AVSS)
⎯
470
⎯
mA
When AVRH = 3.0 V, AVss =
0.0 V
⎯
⎯
10
μA
At power-down*3
Analog input capacitance
⎯
⎯
27
pF
Interchannel disparity
⎯
⎯
4
LSB
Resolution
Total error*
1
Linearity error*
1
Full transition voltage*
1
Conversion time
When AVcc = 3.3 V, AVRH =
3.3 V
AVRH + 3.0 LSB
When PCLK (peripheral clock) =
40 MHz
*1 : Measured in the CPU sleep state
*2 : Depending on the clock cycle supplied to peripheral resources.
*3 : The current when the CPU is in stop mode and the A/D converter is not operating.
64
DS07-16903-4E
MB91605A Series
Rin
Comparator
AN0 to AN11
Analog input pin
Cin
Rin = 5 kΩ
Cin = 27 pF
The output impedance of the external circuit connected to the analog input affects the sampling time of the A/
D converter. Design the output impedance of the output circuit such that the required sampling time is less than
the value of TS calculated from the following equation.
Ts = (Rin + Rext) × Cin × 8
Ts
: Sampling time
Rin : Input resistance of A/D = 5 kΩ
Cin : Input capacitance of A/D = 27 pF
Rext : Output impedance of external circuit
If the sampling time is taken to be 5.9 μs:
5.9 μs = (5 kΩ + Rext) × 27 pF × 8
∴ Rext = 22.3 kΩ
And the impedance of the external circuit therefore needs to be 22 kΩ or less.
• The relationship between peripheral clock and external impedance
120
110
100
90
80
70
60
50
40
30
20
Peripheral clock cycle and external impedance
External impedance [kΩ]
External impedance [kΩ]
Peripheral clock frequency and external impedance
10
15
20
25
30
35
Peripheral clock frequency [MHz]
DS07-16903-4E
40
120
110
100
90
80
70
60
50
40
30
20
10
30
50
70
90
110
Peripheral clock cycle [ns]
65
MB91605A Series
•Definition of 10-bit A/D Converter Terms
• Resolution
: Analog variation that is recognized by an A/D converter.
• Linearity error
: Deviation of the line between the zero-transition point
(0000000000←→0000000001) and the full-scale transition point
(1111111110←→1111111111) from the actual conversion characteristics.
• Differential linearity error : Deviation from the ideal value of the input voltage that is required to change the
output code by 1 LSB.
• Total error
: Difference between the actual value and the theoretical value. The total error includes
zero transition error, full-scale transition error, and linear error.
Linearity error
3FFH
Differential linearity error
Actual conversion
characteristics
Actual conversion
characteristics
(N + 1)H
3FEH
{1 LSB (N − 1) + V OT}
VFST
Ideal characteristics
(Actuallymeasured
value)
VNT
004H
(Actually-measured
value)
003H
Actual conversion
characteristics
Ideal characteristics
002H
001H
Digital output
Digital output
3FDH
NH
(N − 1)H
VNT
(N − 2)H
VOT (Actually-measured value)
AVSS
Analog input
V(N+1)T
AVRH
(Actually-measured
value)
(Actually-measured
value)
Actual conversion characteristics
AVSS
AVRH
Analog input
VNT − {1 LSB × (N − 1) + VOT}
[LSB]
1 LSB’
V (N+1) T − VNT
− 1 [LSB]
Differential linearity error of digital output N =
1 LSB
VFST − VOT
1 LSB =
1022
Linearity error of digital output N =
N
VOT
VFST
VNT
: A/D converter digital output value.
: Voltage at which the digital output changes from 000H to 001H.
: Voltage at which the digital output changes from 3FEH to 3FFH.
: Voltage at which the digital output changes from (N − 1)H to NH.
(Continued)
66
DS07-16903-4E
MB91605A Series
(Continued)
Total error
3FFH
1.5 LSB'
3FEH
Actual conversion
characteristics
3FDH
Digital output
{1 LSB' (N − 1) + 0.5 LSB'}
004H
VNT
(Actually-measured value)
Actual conversion
characteristics
003H
002H
001H
Ideal
characteristics
0.5 LSB'
AVSS
Analog input
1 LSB’ (Ideal value)
Total error of digital output N
AVRH
AVRH − AVSS
[V]
1024
VNT − {1 LSB’ × (N − 1) + 0.5 LSB’}
=
1 LSB’
=
N : A/D converter digital output value.
VNT : Voltage at which the digital output changes from (N + 1)H to NH.
VOT’ (Ideal value) = AVSS + 0.5 LSB [V]
VFST’ (Ideal value) = AVRH − 1.5 LSB [V]
DS07-16903-4E
67
MB91605A Series
■ ORDERING INFORMATION
Part number
MB91605APMC
68
Package
176-pin plastic LQFP
(FPT-176P-M07)
DS07-16903-4E
MB91605A Series
■ PACKAGE DIMENSION
176-pin plastic LQFP
Lead pitch
0.50 mm
Package width ×
package length
24.0 × 24.0 mm
Lead shape
Gullwing
Sealing method
Plastic mold
Mounting height
1.70 mm MAX
Code
(Reference)
P-LQFP-0176-2424-0.50
(FPT-176P-M07)
176-pin plastic LQFP
(FPT-176P-M07)
Note 1) * : Values do not include resin protrusion.
Resin protrusion is +0.25(.010)Max(each side).
Note 2) Pins width and pins thickness include plating thickness
Note 3) Pins width do not include tie bar cutting remainder.
26.00±0.20(1.024±.008)SQ
*24.00±0.10(.945±.004)SQ
0.145±0.055
(.006±.002)
132
89
133
88
0.08(.003)
Details of "A" part
+0.20
1.50 –0.10
+.008
(Mounting height)
.059 –.004
0˚~8˚
0.10±0.10
(.004±.004)
(Stand off)
INDEX
45
176
"A"
LEAD No.
1
44
0.50(.020)
0.22±0.05
(.009±.002)
0.08(.003)
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.25(.010)
M
©2004-2008
FUJITSU MICROELECTRONICS LIMITED F176013S-c-1-2
C
2004 FUJITSU LIMITED F176013S-c-1-1
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Please check the latest package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
DS07-16903-4E
69
MB91605A Series
■ MAIN CHANGES IN THIS EDITION
Page
Section
■ MEMORY SPACE
2. Memory Map
24
46
50, 51
Change Results
Changed the following address.
10040000H → 10000000H
Added below note to “External mirror area”.
*: The mirror of external bus interface register can be
found at 40002000H to 40002FFFH.
■ ELECTRICAL CHARACTERISTICS
4. AC Characteristics
(1) Main Clock Input Standard
Added “When using external clock” to the remarks for
“Input clock cycle” and “Input clock pulse width”.
(5) External Bus Access Read/Write Operation Replaced the Timing chart.
The vertical lines marked in the left side of the page show the changes.
70
DS07-16903-4E
MB91605A Series
MEMO
DS07-16903-4E
71
MB91605A Series
FUJITSU SEMICONDUCTOR LIMITED
Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome,
Kohoku-ku Yokohama Kanagawa 222-0033, Japan
Tel: +81-45-415-5858
http://jp.fujitsu.com/fsl/en/
For further information please contact:
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#05-08 New Tech Park 556741 Singapore
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Shanghai 200002, China
Tel : +86-21-6146-3688 Fax : +86-21-6335-1605
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Gangnam-Gu, Seoul 135-280, Republic of Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
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FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road,
Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
http://cn.fujitsu.com/fmc/en/
Specifications are subject to change without notice. For further information please contact each office.
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU SEMICONDUCTOR device; FUJITSU SEMICONDUCTOR does not
warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device
based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU SEMICONDUCTOR assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
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rights or other rights of third parties which would result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to
the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear
facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon
system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any claims or damages arising in
connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of
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The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
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