HMC660LC4B v02.1208 DATA CONVERTERS - SMT 6 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Typical Applications Features The HMC660LC4B is ideal for: 4.5 GHz Input bandwidth (1 Vpp Full Scale) 3 GS/s Maximum Sampling Rate • RF ATE Applications 61 dB SFDR (4 GHz / 0.5 Vpp Input, CLK = 1 GS/s) • Digital Sampling Oscilloscopes 55 dB SFDR (4 GHz / 1 Vpp Input, CLK = 1 GS/s) • RF Demodulation Systems Ultra-clean Ouput Waveforms, Minimal Glitching • Digital Receiver Systems >60 dB Hold Mode Feedthrough Rejection • High Speed Peak Detectors 1.05 mV RMS Hold Mode Output Noise • Software Defined Radio Single / Dual Rank Evaluation Boards Available • Radar, ECM & ELINT Systems RoHS Compliant 4x4 mm SMT Package • High Speed DAC De-Glitching Functional Diagram General Description The HMC660LC4B is a SiGe monolithic, fullydifferential, track-and-hold that provides unprecedented bandwidth and performance to wideband sampled signal systems. The novel design and low aperture jitter enable 9 to 10-bit signal capture from 20 MHz to 4.5 GHz while sampling to 3 GS/s. The narrow sampling aperture allows signal acquisition at frequencies well beyond the input bandwidth. The output can be held for 5 ns, enabling lower-speed ADCs to sub sample a high frequency wideband input signal. Electrical Specifi cations TA = +25C, See Test Conditions on following page herein. Parameter Conditions Test Level Min. Typ. Max. Units Analog Inputs (INP, INN) Differential Full Scale Range 1 Vpp AC Coupling Low Frequency Corner 16 MHz Input Resistance Return Loss Each lead to ground 50 Ω 0 to 5 GHz 12 dB DC Clock Inputs (CLKDCP, CLKDCN) Common Mode Voltage 2 2.5 3 V Differential Clock High Voltage (Track Mode) 20 40 2000 mV Differential Clock Low Voltage (T/H Mode) -20 -40 -2000 mV Differential Input Current Common Mode Input Current CLKDCP, CLKDCN @ 2.5V 10 μA 6 μA AC Clock Inputs (CLKP, CLKN) Amplitude (Sinusoidal Input) 6-2 Per input terminal -10 0 10 For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com dBm HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Electrical Specifi cations, (continued) Conditions Test Level Min. Recommended for best linearity Max. 4 Input Impedance Return Loss Typ. 0 - 3 GHz Input Resistance Units V/ns 50 Ω 16 dB 50 Ω 1 Vpp Analog Outputs (OUTP, OUTN) Differential Full Scale Range Common Mode Output Voltage 4.0 V Output Impedance 50 Ω 15 dB 0 dB Return Loss 0 - 4 GHz Track Mode Dynamics Gain Track Mode Bandwidth @ 1 Vpp Input Lower Frequency Corner 3.95 GHz 16 MHz Single Tone SFDR @ 500 MHz 1 Vpp Input 54.8 dB Single Tone SFDR @ 1000 MHz 1 Vpp Input 54.7 dB Single Tone SFDR @ 2000 MHz 1 Vpp Input 52.6 dB Single Tone SFDR @ 3000 MHz 1 Vpp Input 50.4 dB Single Tone SFDR @ 4000 MHz 1 Vpp Input 49 dB 0.5 Vpp Input 57.4 dB Two Tone SFDR @ 995/1005 MHz 0.5 Vpp Input per Tone 56.4 dB Two Tone SFDR @ 1995/2005 MHz 0.5 Vpp Input per Tone 54.5 dB Two Tone SFDR @ 2995/3005 MHz 0.5 Vpp Input per Tone 52.5 dB Two Tone SFDR @ 3995/4005 MHz 0.5 Vpp Input per Tone 50.2 dB Two Tone SFDR @ 500 MHz Noise Spectral Density @ 1 GHz Integrated Noise [2] 8.9 nV/√Hz 0.95 mV RMS 6 TRACK-AND-HOLD - SMT Parameter Clock Slew Rate Hold Mode Dynamics Sampling Bandwidth @ -3 dB Gain, 1 Vpp Input Level 4.5 GHz 0.5 %/ns 0 - 4000 MHz ≥ 60 dB 500 MHz Clock Frequency 1.04 mV RMS Differential Droop Rate Feedthrough Rejection Integrated Noise [2] Maximum Hold Time 5 ns Single Tone THD/SFDR 995 MHz [1] -54 / 54 dB Single Tone THD/SFDR 1995 MHz [1] -58 / 58 dB Single Tone THD/SFDR 2995 MHz [1] -59 / 61 dB Single Tone THD/SFDR 3995 MHz [1] -54 / 54 dB -6 ps [1] 84 fs Settling Time to 1 mV Simulated Value 206 ps Differential Pedestal 500 MHz Clock Frequency, 0 dBm Clock Power -0.3 % Track-to-Hold Switching Aperture Delay Aperture Jitter Clock Frequency Clock Buffer Pipeline Delay 100 3000 38 MHz ps [1] 1 Vpp Input Level, 1 GS/s Clock, Clock Power = 6 dBm / input terminal. [2] Noise bandwidth limited by output amplifier bandwidth of ~7 GHz. For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 6-3 HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Electrical Specifi cations, (continued) Parameter Conditions Acquisition Time to 1 mV DATA CONVERTERS - SMT Test Level Min. Typ. Max. Units Hold-to-Track Switching Simulated Value 205 ps Power Supply Requirements VccSH Voltage 4.75 5 VccSH Current 5.25 V 61 Vcc1 Voltage 4.75 mA 5 Vcc1 Current 5.25 V 50 Vcc2 Voltage 5.7 mA 6 Vcc2 Current 6.3 V 84 VccCLK Voltage 4.75 mA 5 VccCLK Current Power Dissipation 5.25 V 20 mA 1.16 W Time Domain Output Waveform Test Levels 1. 100% production tested at TA = +25C 2. Guaranteed by design/characterization testing 3. Sample Tested 4. Typical value only DIFFERENTIAL OUTPUT VOLTAGE (V) 6 0.6 Clock Frequency = 500 MHz Input Frequency = 3.125 GHz 0.4 0.2 0 -0.2 -0.4 Track Mode T/H Mode -0.6 0 2 10 3 4 10 3 6 10 3 8 10 3 10 10 3 TIME (ps) Dual Rank Second Order SFDR vs. Clock Slew Rate @ 4 GHz Input Frequency [1] Sampling Transfer Function 0 60 -2 55 -3 SFDR (dB) MAGNITUDE (dB) -1 -4 -5 -6 -7 -8 100 50 45 Sampling Transfer Function Ideal 4.5 GHz Lowpass 40 1000 10000 0 2 4 FREQUENCY (MHz) 6 8 10 12 14 16 CLOCK SLEW RATE (V/ns) [1] Data is derived from linearity measurements at clock frequencies from 0.5 to 3.0 GHz. 6-4 For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 18 20 HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Hold-Mode THD vs. Frequency & Input Power [1] 85 nd Order Full Scale (1 Vpp) Half Full Scale (0.5 Vpp) -75 THD (dB) SFDR (dB) 75 65 6 -85 2 rd 3 Order 55 -65 -55 Full Scale (1 Vpp) Half Full Scale (0.5 Vpp) 45 1000 2000 3000 -45 1000 4000 FREQUENCY (MHz) 3000 4000 FREQUENCY (MHz) Hold-Mode SFDR vs. Frequency & Input Power [2] Hold-Mode THD vs. Frequency & Input Power [2] -85 85 2 nd Order Full Scale (1 Vpp) Half Full Scale (0.5 Vpp) -75 THD (dB) 75 SFDR (dB) 2000 65 rd 3 Order TRACK-AND-HOLD - SMT Hold-Mode SFDR vs. Frequency & Input Power [1] -65 -55 55 Full Scale (1 Vpp) Half Full Scale (0.5 Vpp) 45 1000 2000 3000 -45 1000 4000 2000 3000 4000 FREQUENCY (MHz) FREQUENCY (MHz) Hold-Mode SFDR vs. Frequency & Input Power [3] Hold-Mode THD vs. Frequency & Input Power [3] -75 85 2 nd Order 75 -65 rd THD (dB) SFDR (dB) 3 Order 65 55 -55 -45 Full Scale (1 Vpp) Half Full Scale (0.5 Vpp) Full Scale (1 Vpp) Half Full Scale (0.5 Vpp) 45 2000 3000 4000 FREQUENCY (MHz) [1] Square Wave Clock: 0.5 GS/s @ 6.3 V/ns Slew Rate -35 2000 3000 4000 FREQUENCY (MHz) [3] Clock Power = 0 dBm, Clock Rate 2 GS/s [2] Clock Power = +6 dBm, Clock Rate 1 GS/s For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 6-5 HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Hold-Mode SFDR vs. Frequency & Clock Power @ Full Scale (1Vpp) [1] 6 75 70 2 Order SFDR (dB) rd 45 2 Clock Power 0 dBm +6 dBm +10 dBm 35 1000 nd 80 60 3 GHz 4 GHz 50 nd 3 Order 2 GHz Order rd 55 90 1 GHz 70 4 GHz 60 40 1 GHz 50 30 2000 3000 4000 0 2 FREQUENCY (MHz) 4 6 8 10 Clock Power (dBm) Hold-Mode SFDR vs. Frequency & Clock Power @ Full Scale (1Vpp) [2] Hold-Mode SFDR vs. Clock Power & Clock Frequency @ Full Scale (1Vpp) [2] 85 110 80 100 1 GHz 2 Order SFDR (dB) 2 Order 90 3 GHz 60 80 4 GHz 50 70 nd 65 2 GHz Clock Power 0 dBm +6 dBm +10 dBm 4 GHz 40 3 GHz 30 60 1 GHz 50 45 1000 2000 3000 4000 0 2 FREQUENCY (MHz) 4 6 8 Hold-Mode SFDR vs. Clock Power & Clock Frequency @ Full Scale (1Vpp) [3] 80 100 70 2 GHz rd 90 3 Order Order nd Clock Power 50 0 dBm +6 dBm +10 dBm rd nd 3 GHz 60 80 4 GHz 50 70 40 4 GHz 60 3 GHz 30 2 GHz 40 2000 3000 FREQUENCY (MHz) 4000 3 Order SFDR (dB) 2 2 Order SFDR (dB) 70 SFDR (dB) 10 Clock Power (dBm) Hold-Mode SFDR vs. Frequency & Clock Power @ Full Scale (1Vpp) [3] 60 rd rd 3 Order nd 70 3 Order SFDR (dB) SFDR (dB) 75 55 0 2 4 50 6 8 Clock Power (dBm) [1] Clock Rate 0.5 GS/s [2] Clock Rate 1 GS/s [3] Clock Rate 2 GS/s 6-6 3 Order SFDR (dB) SFDR (dB) 100 80 65 DATA CONVERTERS - SMT Hold-Mode SFDR vs. Clock Power & Clock Frequency @ Full Scale (1Vpp) [1] For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 10 HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Dual Rank Hold-Mode THD vs. Frequency & Input Power [1] 85 Order -80 -75 70 -70 THD (dB) SFDR (dB) nd 75 65 60 rd 3 Order 55 -65 -60 -50 Full Scale (1 Vpp) Half Full Scale (0.5 Vpp) 45 40 1000 2000 3000 -45 -40 1000 4000 FREQUENCY (MHz) 2000 3000 4000 FREQUENCY (MHz) Dual Rank Hold-Mode SFDR vs. Frequency & Input Power [2] Dual Rank Hold-Mode THD vs. Frequency & Input Power [2] 85 -85 2 80 nd Order -80 75 -75 70 -70 THD (dB) SFDR (dB) Full Scale (1 Vpp) Half Full Scale (0.5 Vpp) -55 50 65 60 rd 3 Order 55 Full Scale (1 Vpp) Half Full Scale (0.5 Vpp) -65 -60 -55 50 -50 Full Scale (1 Vpp) Half Full Scale (0.5 Vpp) 45 40 1000 2000 3000 -45 -40 1000 4000 FREQUENCY (MHz) 2000 3000 4000 FREQUENCY (MHz) Dual Rank Hold-Mode SFDR vs. Frequency & Input Power [3] Dual Rank Hold-Mode THD vs. Frequency & Input Power [3] 80 -75 2 75 nd Order 70 -65 65 60 THD (dB) SFDR (dB) 6 -85 2 80 TRACK-AND-HOLD - SMT Dual Rank Hold-Mode SFDR vs. Frequency & Input Power [1] rd 3 Order 55 -55 50 -45 45 40 35 1000 Full Scale (1 Vpp) Half Full Scale (0.5 Vpp) Full Scale (1 Vpp) Half Full Scale (0.5 Vpp) 2000 3000 4000 FREQUENCY (MHz) [1] Square Wave Clock: 0.5 GS/s @ 6.3 V/ns Slew Rate -35 1000 2000 3000 4000 FREQUENCY (MHz) [3] Clock Power = 0 dBm, Clock Rate 2 GS/s [2] Clock Power = +6 dBm, Clock Rate 1 GS/s For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 6-7 HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Track-Mode Single-Tone SFDR vs. Frequency [1] 6 Track-Mode Two-Tone SFDR vs. Frequency [2] 85 85 nd nd Order Order SFDR (dB) SFDR (dB) 2 75 2 65 55 65 55 rd 3 Order rd 3 Order 45 45 0 1000 2000 3000 4000 0 FREQUENCY (MHz) 80 75 75 70 70 SFDR (dB) 85 80 65 60 2 2000 Order 55 2 nd Order 65 60 50 rd 3 Order rd 3 Order 45 2000 45 3000 FREQUENCY (MHz) 4000 40 1000 2000 3000 FREQUENCY (MHz) [1] Input Voltage = 1 Vpp [2] 10 MHz Tone Separation, 0.5 Vpp per Tone 6-8 4000 55 50 40 1000 3000 Dual Rank Track-Mode Two-Tone SFDR vs. Frequency [2] 85 nd 1000 FREQUENCY (MHz) Dual Rank Track-Mode Single-Tone SFDR vs. Frequency [1] SFDR (dB) DATA CONVERTERS - SMT 75 For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 4000 HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Defi nition of Specifi cations Aperture Jitter: The standard deviation of the sample instant in time. Acquisition Time: The interval between the internal hold-to-track transition and the time at which the hold-node signal is tracking the input signal within a specified accuracy. It does not include the pipeline delay of the clock buffer. Differential Pedestal: An error term in the sample value caused by charge redistribution in the T/H switch during the sampling transition. In general, the pedestal can consist of three components: a fixed offset, a component that is linearly related to input signal amplitude, and a component that is nonlinearly related to input signal amplitude. The majority of the pedestal is usually linear. A small nonlinear component can cause sampling nonlinearity. Differential Droop Rate: The slow drift in the differential output voltage of a held sample while the T/H is in holdmode. It is typically caused by current leakage on the hold capacitors and corresponds to a decay in the held voltage with increasing time. The majority of the voltage droop over a given time is usually linearly related to the held sample voltage and is expressed as a percentage of initial amplitude per unit time. Since it is mostly linear, the droop causes little nonlinearity. Feedthrough Rejection: A measure of the off-state (hold-mode) isolation of the T/H’s internal switch. It is defined as the ratio of the amplitude of the output signal (for a sinusoidal input) feeding through during the hold mode to the amplitude of the output signal during track mode. Normalization by the track-mode signal gives the true switch isolation without the effects of the output amplifier bandwidth limiting. Full Scale Range: The voltage range between the minimum and maximum signal levels that can be handled by the T/H while still meeting the specifications. 6 TRACK-AND-HOLD - SMT Aperture Delay: The delay of the exact sample time relative to the time that the hold command is applied to the device. It is the difference between the delay of the clock switching transition to the hold node and the input signal group delay to the hold node. If the input signal group delay to the hold node exceeds the clock delay this quantity can be negative. Gain Flatness: The deviation in gain over a specified input band relative to a specified mid-frequency gain. Sampling Bandwidth: The -3 dB bandwidth of the sampled signal levels represented by the held sample amplitudes. It includes both the bandwidth of the transfer function from the signal input to the hold-node and any band-limiting effects associated with the finite time duration of the sampling aperture. Settling Time: The interval between the internal track-hold transition and the time at which the held output signal is settled to within a specified accuracy. It does not include the pipeline delay of the clock buffer. Spurious Free Dynamic Range (SFDR): The ratio (usually expressed in dB) between the sinusoidal output signal amplitude and the amplitude of the largest non-linearity product falling within one Nyquist bandwidth. It may be specified for both full scale input and some fraction(s) of full scale input. A SFDR based only on 2nd order nonlinear products is referred to as the 2nd order SFDR (SFDR2). A SFDR based only on 3rd order products is referred to as the 3rd order SFDR (SFDR3). Total Harmonic Distortion (THD): The ratio of the total power in the non-linearity-generated harmonics and harmonic aliases (measured in one Nyquist band) to the output signal power. For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 6-9 HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Application Notes DATA CONVERTERS - SMT 6 ESD: On-chip ESD protection networks are incorporated on the terminals, but the RF/microwave compatible interfaces provide minimal protection and ESD precautions should be used. Power Supply Sequencing: The recommended power supply startup sequence is Vcc2, Vcc1, VccSH, VccCLK, (CLKDCP, CLKDCN) if biased from independent supplies. Vcc1, VccSH, VccCLK can be connected to one +5V supply if desired. Input Signal Drive: For best results, the inputs should be driven differentially. The input circuit has an on-chip resistive bias-T for separating the DC and RF components of the input. The low frequency corner of the RF path is approximately 16 MHz (Ccoupling=10 pF, Rdc=1.28 K ohm). The input can be driven single-ended but the linearity of the device will be degraded somewhat. Clock Input: The clock inputs should be driven differentially if possible. The device is in track-mode when (CLKP – CLKN) is high and it is in hold-mode when (CLKP-CLKN) is low. The T/H-mode 2nd order linearity of the device varies somewhat with clock slew rate as shown in the performance data plots. Because of the slew rate dependence, the 2nd order linearity will vary somewhat with clock power for sinusoidal signals. For optimal linearity, a clock zero-crossing slew rate of roughly 4 V/ns (per clock input) or more is recommended. For sinusoidal clock inputs, this corresponds to a sinusoidal clock power per differential half-circuit input of -3.5 dBm at 3 GHz, 0 dBm at 2 GHz, and 6 dBm at 1 GHz. At clock frequencies lower than 1 GHz, a square wave clock will provide the best 2nd order linearity performance. The clock input circuit has an on-chip resistive bias-T for separating the DC and RF components of the input. The low frequency corner of the RF path is approximately 9 MHz (Ccoupling=10 pF, Rdc = 1.7 K ohm with clock DC shorted). Outputs: The outputs should be sensed differentially for the cleanest output waveforms. The output impedance is 50Ω resistive returned to the Vcc2 supply. If the load is also 50Ω returned to the Vcc2 supply, then the Vcc2 supply should be 5V. If the output is capacitively coupled to 50Ω then the Vcc2 supply should be 6V. The bandwidth of the output amplifier (beyond the hold-node) is approximately 7 GHz. This produces approximately a 1 dB roll-off at the 3 dB bandwidth of the hold node (4.5 GHz) resulting in an overall track-mode 3 dB bandwidth of approximately 3.9 GHz. Hence, the output amplitude of the sampled waveform may be somewhat larger than the track mode response at high input frequencies due to the effect of the output amplifier bandwidth. The output amplifier noise contribution to the total output noise is substantial. If desired, a significant reduction in output noise can be achieved by filtering the output to a lower bandwidth than the output amplifier bandwidth of 7 GHz. This is particularly effective if operating at lower clock rates. For example, the output noise can be reduced by approximately 4 dB if the output bandwidth is reduced by a factor of four from 7 GHz down to 1.75 GHz. The output will have very sharp transitions at the clock edges due to the broad output amplifier bandwidth. The user should be aware that any significant length of cable between the chip output and the load will cause frequency response roll-off and dispersion that can produce low amplitude tails with relatively long time-constants in the settling of the output waveform into the load. This effect is most noticeable when operating in a lab setting with output cables of a few feet length, even with high quality cable. Output cables between the T/H and the load should be of very high quality and 2 ft or less in length. Reflections between the load and the device will also degrade the hold mode response. The output cable length can be adjusted to minimize the reflection perturbations to some extent. In general, the round trip transit time of the cable should be an integer number of clock periods to obtain the minimal reflection perturbation in the hold mode portion of the waveform. The optimal performance is obtained when the T/H is within 50 ps or less of the load since this gives a reflection duration equal to the approximate settling time of the device. 6 - 10 For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Linearity Measurement and Calculation This issue is aggravated for high speed T/Hs because there are few wide-band time domain instruments (oscilloscopes or A/D converters) with sufficient linearity to characterize a high linearity T/H. Therefore a frequency domain instrument (spectrum analyzer) and measurement technique are used which allow selective characterization of the hold-mode portion of the waveform A common approach to this requirement has been to cascade two T/Hs in a dual rank configuration such that the second T/H (T/H 2) re-samples the output of the first T/H (T/H 1). The two T/Hs are usually clocked 180 degrees outof-phase in master-slave operation to eliminate the track-mode portion of the output waveform from the first T/H. This arrangement produces an output waveform that consists of two time segments. The first segment is the T/H 1 holdmode output as observed through the T/H 2 track-mode transfer function. The second time segment is the T/H 1 holdmode output re-sampled and held by the T/H 2 device. This measurement approach is not a perfect representation of the linearity of a single T/H due to the impact of the second T/H on the overall linearity. However, it does eliminate the track-mode portion of the T/H 1 output and permits a spectrum analyzer linearity measurement of the cascaded devices. Since T/H 2 only has to sample the held waveform from T/H 1, the linearity impact of T/H 2 is primarily associated with its DC linearity. An often used approximation is that the DC linearity of T/H 2 is much higher than the slew-rate dependent, high frequency linearity of T/H 1 so that the total non-linearity of the cascade is dominated by the high frequency linearity of T/H 1. In this case, the dual rank configuration has a net linearity that closely resembles the linearity of a single T/H, particularly at high frequencies. However, this approximation is not always valid. If not, the dual rank configuration fails to represent the linearity of a single T/H. The HMC660LC4B represents such a case; the 3rd order nonlinearity of this device varies relatively slowly with frequency and is high enough over the T/H bandwidth that the DC linearity of the 2nd T/H significantly impacts the overall dual rank configuration. 6 TRACK-AND-HOLD - SMT When characterizing the linearity of a T/H, the transfer function linearity of the held samples (referred to as T/H-mode linearity) is usually the quantity of most interest to the user. These samples contain the signal information that is ultimately digitized by the downstream A/D converter. Since the T/H-mode linearity is often different than the trackmode linearity, this presents a unique measurement issue in that the linearity of only the hold-portion of the analog output waveform must be selectively measured. Another linearity measurement issue unique to the T/H device is the need for output frequency response correction. In the case of a dual rank T/H, the output waveform resembles a square wave with duration equal to the clock period. Mathematically, the output can be viewed as the convolution of an ideal delta-function sample train with a single square pulse of duration equal to one clock period. This weights the output spectral content with a SIN(πf/fs )/(πf/fs) (Sinc) function frequency response envelope which has nulls at harmonics of the clock frequency fs and substantial response reduction beyond half the clock frequency. The spectral content of the held samples without the envelope weighting is required for proper measurement of the sample’s linearity. Either the impact of the response envelope must be corrected in the data or a measurement method must be used that heterodynes the relevant nonlinear harmonic products to low frequencies to avoid significant envelope response weighting. This latter method is referred to as the beat-frequency technique. The beat-frequency technique is commonly used for high-speed T/H linearity measurements, although the measurement does impose restrictions on the specific input signal and clock frequencies that can be used. For example, with a clock frequency of 512.5 MHz, a single tone input at 995 MHz beats with the 2nd harmonic of the sampling frequency (through the sampling process) to produce a 1st order beat product at 30 MHz. Likewise, the 2nd and 3rd harmonics of the input signal (generated via distortion in the T/H) beat with the 4th and 6th harmonics of the sampling frequency respectively to produce 2nd and 3rd order beat products at 60 MHz and 90 MHz. In this manner, the T/H nonlinearity in the vicinity of 1 GHz can be measured even though the 995 MHz fundamental and the 1.99 GHz and 2.985 GHz nonlinear harmonics are well beyond the 206 MHz bandwidth of the Sinc response envelope. The possible input frequency choices are overly limited when the low frequency beat-product technique is used at high clock rates. A related high frequency beat-product measurement utilizing correction for the Sinc envelope weighting must be employed to measure linearity over a wide range of input frequencies. Hittite uses both low frequency and high frequency beat product methods to measure linearity for a wide range of clock and signal frequencies. Our high frequency beat-product measurement avoids excessive envelope correction error by maintaining all beat products within the 4 dB bandwidth of the Sinc function, where the envelope response is well behaved and easily modeled. Hittite has also developed a method for accurately measuring the held-sample linearity of a single T/H using a beatfrequency technique that avoids errors due to nonlinear products associated with the track-mode portion of the For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 6 - 11 HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Linearity Measurement and Calculation (Continued) DATA CONVERTERS - SMT 6 waveform. This single T/H linearity measurement method provides accurate results for clock frequencies up to about 2 GHz. This method is used to characterize and specify the linearity of a single T/H in the data sheet, in addition to the usual dual rank configuration linearity measurements. Detailed information on the measurement technique and theory can be found in the Application Note T/H Linearity Measurement Issues and Methods available at www.hittite. com. Typical Operating Circuit Notes: 1. For track mode operation, CLKDCP and CLKDCN must be driven as shown above. VCM = 2.5V, VDIFF = 40mV typical. 2. For track-and-hold mode operation, pin 11 and 12 may be left floating, or VDIFF can be set to zero. 3. All differential inputs are terminated on-chip with 50 ohms to ground. 6 - 12 For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Absolute Maximum Ratings 5.5 Vdc Vcc1 5.5 Vdc Vcc2 6.5 Vdc CLKP, CLKN Input Power +10 dBm Input Signal Amplitude +10 dBm Junction Temperature 125 °C Continuous Pdiss (T= 85 °C) 1.22 W Thermal Resistance (junction to package bottom) 32.8 °C/W Storage Temperature -65 to +150 °C Operating Temperature -40 to +85 °C ELECTROSTATIC SENSITIVE DEVICE OBSERVE HANDLING PRECAUTIONS 6 TRACK-AND-HOLD - SMT VccSH Outline Drawing NOTES: 1. PACKAGE BODY MATERIAL: ALUMINA 2. LEAD AND GROUND PADDLE PLATING: 30-80 MICROINCHES GOLD OVER 50 MICROINCHES MINIMUM NICKEL. 3. DIMENSIONS ARE IN INCHES [MILLIMETERS]. 4. LEAD SPACING TOLERANCE IS NON-CUMULATIVE 5. PACKAGE WARP SHALL NOT EXCEED 0.05mm DATUM -C6. ALL GROUND LEADS AND GROUND PADDLE MUST BE SOLDERED TO PCB RF GROUND. 7. CLASSIFIED AS MOISTURE SENSITIVITY LEVEL (MSL) 1. For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 6 - 13 HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Pin Descriptions DATA CONVERTERS - SMT 6 Pin Number Function 1, 13, 19, 23, 24 N/C Not connected. 2, 5, 14, 17, 20, 22 GND These pins must be connected to a high quality RF/DC ground. 3 INP Positive T/H RF input (input bias -T). Has on-chip DC 50Ω termination, nominal max single-ended input level = ±0.25V (-2 dBm) for specified performance. Input AC coupling time constant ~ 10 ns, +10 dBm max. 4 INN Negative T/H RF input (input bias -T). Has on-chip DC 50Ω termination, nominal max single-ended input level = ±0.25V (-2 dBm) for specified performance. Input AC coupling time constant ~ 10 ns, +10 dBm max. 6 VccSH T/H core supply. Requires nominal current of 61.5 mA at 5V. A 10 nF X7R dielectric chip capacitor close to the device is recommended. 7 N/C 8 VccCLK 9, 10 CLKN, CLKP Negative CLK RF input, Positive CLK RF input (CLK input bias -T). Has on-chip 50Ω termination, +10 dBm max. AC coupling time constant ~17 ns. CLKDCP, CLKDCN Positive CLKDC input and Negative CLKDC input (CLK input bias-T). A 10 n F X7R dielectric chip capacitor or equivalent should be used here. Internal bias -T isolation resistor = 1kΩ. May be floated for T/H operation. If biased use common mode voltage of 2.5 V. Apply differential voltage of (CLKDCP – CLKDCN ) > 20 mV to force device in steady state track mode (in the absence of a clock). A 40 mV differential voltage can be continuously applied that allows the device to be biased in track mode whenever the clock is turned off. 11, 12 6 - 14 Description Interface Schematic This pin must be left floating. Clock buffer power. Requires 19.8 mA nominal current at 5V. For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Pin Descriptions (Continued) Function Description OUTP, OUTN Positive T/H RF output, Negative T/H RF output. 50 Ω output impedance, nominal DC output voltage = 3.9V. Can be returned to Vcc2 through 50 ohms or AC coupled. Device can be damaged if the output is shorted to ground. 18 Vcc2 Output buffer 2 output driver power. The supply should be 5V if the output is DC coupled to the Vcc2 supply. The supply should be 6V if the output is AC coupled; Vcc2 current is 84 mA nominal. A 10 nF X 7R dielectric chip capacitor connected close to the device is recommended 21 Vcc1 5V power for output buffers 1 and 2. Requires a nominal current of 49.8 mA at 5V. A 10 nF X7R dielectric chip capacitor connected close to the device is recommended. 15, 16 Interface Schematic For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 6 TRACK-AND-HOLD - SMT Pin Number 6 - 15 HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Single Evaluation PCB DATA CONVERTERS - SMT 6 List of Materials for Evaluation PCB 113055 [1] Item Description J1 - J6 Johnson SMA Connector J7 9 pin DC Connector C1, C2, C5 - C10 10K pF Chip Capacitor, 0402 Pkg. C3, C4 1 uF & 82 pF, 16 kHz to 40 GHz Chip Capacitor, 0502 Pkg. C15 - C22 4.7 uF, Case A, Tantulum Capacitor U1 HMC660LC4B Track-and-Hold Amplifier PCB [2] 113057 Single Eval Board The circuit board used in the final application should use RF circuit design techniques. Signal lines should have 50 ohm impedance while the package ground leads and exposed paddle should be connected directly to the ground plane similar to that shown. A sufficient number of via holes should be used to connect the top and bottom ground planes in order to provide good RF grounding to 10 GHz. The evaluation circuit board shown is available from Hittite upon request. [1] Reference this number when ordering complete evaluation PCB [2] Circuit Board Material: Rogers 4350 6 - 16 For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Application Circuit for Single Evaluation PCB TRACK-AND-HOLD - SMT 6 For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 6 - 17 HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Characterization Set-up for Single Evaluation PCB DATA CONVERTERS - SMT 6 6 - 18 For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Dual Rank Evaluation PCB TRACK-AND-HOLD - SMT 6 List of Materials for Evaluation PCB 114352 [1] Item Description J1 - J8 Johnson SMA Connector J9 10 Pin DC Connector C10, C11, C14, C15, C18 - C25 10K pF Chip Capacitor, 0402 Pkg. C12, C13 Cap, Chip, 0302 Pkg. 12k pF and 82 pF 130 kHz to 100 GHz C16, C17 1 uF & 82 pF, 16 KHz to 40 GHz Chip Capacitor, 0502 Pkg. C28 - C35 4.7 uF, Case A, Tantulum Capacitor, Note Polarity U1, U2 HMC660LC4B Track-and-Hold Amplifier PCB [2] 114350 Eval Board The circuit board used in the final application should use RF circuit design techniques. Signal lines should have 50 ohm impedance while the package ground leads and exposed paddle should be connected directly to the ground plane similar to that shown. A sufficient number of via holes should be used to connect the top and bottom ground planes in order to provide good RF grounding to 10 GHz. The evaluation circuit board shown is available from Hittite upon request. [1] Reference this number when ordering complete evaluation PCB [2] Circuit Board Material: Rogers 4350 For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 6 - 19 HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Application Circuit for Dual Rank Evaluation PCB DATA CONVERTERS - SMT 6 6 - 20 For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Characterization Set-up for Dual Rank Evaluation PCB TRACK-AND-HOLD - SMT 6 For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 6 - 21 HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Product Application Circuits DATA CONVERTERS - SMT 6 Direct Conversion Receiver Track-and-Hold Amplifi er Application 065 */ )*() 41&&% "%$ 5) 065 */ HMC460 LNA, DC - 20 GHz • 2.5 dB Noise Figure • 14 dB Gain • +16 dBm P1dB HMC311LP3 HBT Gain Block • 14.5 dB Gain • 4.5 dB Noise Figure • +15 dBm P1dB "4*$%41 $-, HMC660LC4B Track-and-Hold Amplifier $-,%$ • 0.02 - 4.5 GHz • -66/67 dB Single Tone THD/SFDR • 3.0 GS/s Max. Clock Rate $-,%$ • 0.95 mV RMS Output Noise • >60 dB Hold Mode Feedthrough Rejection $-, Generic Software Radio Track-and-Hold Amplifi er Application HMC523LC4 I/Q Mixer / IRM • 15 - 23.6 GHz RF/LO • 25 dB Image Rejection • -8 dB Conversion Gain • +25 dBm Input IP3 • DC - 3.5 GHz IF *' 065 */ 5) ()[ ()[ -0 HMC547LP3 Hi-Isolation SPDT • DC - 20 GHz • +18 dB Insertion Loss • 47 dB Isolation • 23 dBm Input P1dB • Fast Switching "%$ HMC398QS16G VCO w/ Divide-by-8 • 14 - 15 GHz • +6 dBm Output Power • Low Phase Noise -75 dBc/Hz @ 10 kHz $-, HMC660LC4B Track-and-Hold Amplifier $-,%$ • 0.02 - 4.5 GHz • -66/67 dB Single Tone THD/SFDR • 3.0 GS/s Max. Clock Rate $-,%$ • 0.95 mV RMS Output Noise • >60 dB Hold Mode Feedthrough Rejection $-, 5Y $IBOOFM 6 - 22 "4*$%41 065 */ *' For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com HMC660LC4B v02.1208 0.02 - 4.5 GHz WIDEBAND, 3 GS/s TRACK-AND-HOLD AMPLIFIER Notes: TRACK-AND-HOLD - SMT 6 For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 6 - 23