Prepared Product Specifications Checked AN17850A Approved Ref No. A Total Page 17 Page No. 1 Structure Silicon Monolithic Bipolar IC Appearance SIL-12 Pins Plastic Package (FP-12S Power Type With Fin) Application Audio Function 70W (6Ω) x 1ch BTL Power Amplifier Built-in Standby and Muting Features Incorporating Various Protection Circuits Absolute Maximum Ratings A No. Item Symbol Ratings Unit Note 1 Storage Temperature Tstg -55 ~ +150 °C 2 Operating Ambient Temperature Topr -25 ~ +75 °C 3 Operating Ambient Pressure Popr 1.013x105 ±0.61x105 Pa 4 Operating Constant Acceleration Gopr 9,810 m/s 2 5 Operating Shock Sopr 4,900 m/s 2 6 Power Supply Voltage Vcc 33 V 7 Power Supply Current Icc 8.0 A 8 Power Dissipation PD 37.5 W Operating Supply Voltage Range Vcc 1 2 10 V ~ 32V Note: 1) Without input signal, Vcc is up to 33V 2) Ta = 75°C with infinite heatsink Eff. Date Eff. Date Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Checked AN17850A Approved B Electrical Characteristics No. B-1 Total Page 17 Page No. 2 (Unless otherwise specified, the ambient temperature is 25°C±2°C, Vcc=30V, frequency=1kHz and RL=6Ω.) Test Symbol Circuit. Item Ref No. Condition Limit Unit Note Min Typ Max 1 Quiescent Circuit Current Icq 1 No input ; Vstby = 5V Vmute = 5V; - 100 300 mA 2 Output Noise Voltage Vno 1 No Input, Rg=20kΩ Vstby = 5V;Vmute = 5V - 0.54 1 mVrms 3 Voltage Gain Gvc 1 Vin=20mV; Vstdby=5V Vmute = 5V 38 40 42 dB 4 Total Harmonic Distortion THD 1 Vin=20mV; Vstdby=5V Vmute = 5V; - 0.07 0.4 % 5 Maximum Output Power Po 1 THD_OUT=10% Vstdby=5V;Vmute= 5V; 55 70 - W 6 Output Offset Voltage Voff 1 Rg=20kΩ; No input Vstdby=5V;Vmute=5V; -350 0 350 mV 7 Ripple Rejection RR 1 Vripple=1Vrms * freq=120Hz, Rg=20kΩ 45 55 - dB 8 Standby Current I STB 1 No input ; vstdby=0V; Vmute=5V; - 1 100 µA 9 Muting Effects MT 1 Vin=20mV; Vstby=5V; Vmute = 0 to 5V** 65 75 - dB 1 2 1 2 * The measurement is by taking the ratio of output voltage with reference to the Vripple. ** The measurement is by taking the ratio of output (at Vmute = 0 V) to the output(at Vmute = 5V) Note : 1) With a filter band 20Hz ~20kHz (12 dB/OCT) used. 2) With a filter band 400Hz ~30kHz used. Eff. Date Eff. Date Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Ref No. B-2 Checked (Reference Data for Design) Total Page 17 Approved AN17850A Page No. 3 B Electrical Characteristics (Unless otherwise specified, the ambient temperature is 25°C±2°C, Vcc=30V, frequency=1kHz and RL=6Ω.) Test Symbol Cir- Conditions cuit No Item Limits min typ max Unit Note 1 Standby on voltage Vstdon 1 Vmute = 5V; Vin = 20mV; Istb < 100uA - - 1 V 2 Standby off voltage Vstd0ff 1 Vmute = 5V; Vin = 20mV; Gvc > 38 dB 4.5 - - V 3 Mute on voltage Vmon 1 VStdby = 5V; Vin = 20mV; MT > 70 dB - - 1 V 4 Mute off voltage Vmoff 1 VStdby = 5V; Vin = 20mV; Gvc > 38 dB 4 - - V Note) Eff. Date The above characteristics are reference values determined for IC design, but not guaranteed values for shipping inspection. If problems were to occur, counter measures will be sincerely discussed. Eff. Date Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Checked AN17850A Approved Ref No. C Total Page 17 Page No. 4 (Description of Test Circuits and Test Methods) Test Circuit 1 A + SW1 + 2200µ D 8.2kΩ 33µF 6 4 NC MUTE OUT/+VE 10 A +5V INGND STDBY NC 3 2 8 20k + OPEN Vin AC, DC Voltmeter Distortion Meter Noise Meter OUT/-VE 7 5 IN SW2 RL= 6 Ω AN17850A 1 NC A Vripp=1Vrms freq=120 Hz 12 VCC 1 NC SW4 B Vcc=30V PWRGND 9 51k 10µF SW3 B A +5V No. Item SW1 1 ICQ OPEN 2 Vno Closed 3 Gvc Closed 4 THD Closed 5 PO Closed 6 Voff Closed 7 R.R 8 9 SW2 SW3 OPEN A OPEN A SW4 A A A A A A A A A A A A A D OPEN OPEN A A ISTB OPEN OPEN B A MT Closed A A B/A Note : * STB 'OFF' means 5V. MUTE 'OFF' means 5V. Eff. Date Eff. Date Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Checked AN17850A Approved Ref No. D Total Page 17 Page No. 5 Circuit Function Block Diagram REF Protection circuit Thermal Shutdown Load Short VCC Short Ground Short ASO Protection Over Voltage protection AN17850A + + - + - - MUTE NC STDBY IN GND NC IN MUTE -VE OUT 1 2 3 4 5 6 7 + 10µF 33µF+ 51kΩ NC PWR GND +VE OUT NC VCC 9 10 11 12 8 8.2kΩ 2200µ + 20kΩ OFF/5V OFF/5V 6Ω VCC ON/0V ON/0V Pin Descriptions Pin No. 1 2 3 4 5 6 Eff. Date Pin Descriptions NC STDBY IN GND NC IN MUTE Eff. Date Eff. Date Pin No. 7 8 9 10 11 12 Pin Descriptions -VE PHASE OUTPUT NC PWR GND +VE PHASE OUTPUT NC VCC Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Checked AN17850A Approved Package Name Ref No. E Total Page 17 Page No. 6 FP-12S Unit : mm 6.4 ± 0.3 7.7 ± 0.3 7.8 ± 0.3 29.6 ± 0.3 3.5 ± 0.3 1.2 ± 0.1 +0.1 0.25 -0.05 1 2.54 0.6 R1.8 0.6 ± 0.1 20.0±0.1 28.0 ± 0.3 29.96 ± 0.3 12 ∅ 3.6 Name of item Date Code Company insignia Eff. Date Eff. Date Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Checked AN17850A Approved Ref No. F Total Page 17 Page No. 7 (Structure Description) Chip surface passivation SiN, PSG, Others ( ) 1 Lead frame material Fe group, Cu group, Others ( ) 2 , 6 Inner lead surface process Ag plating, Au plating, Others ( ) 2 Outer lead surface process Solder plating, Solder dip, Others ( ) 6 Chip mounting method Ag paste, Au-Si alloy, Solder, Others ( ) 3 Wire bonding method Thermalsonic bonding, Others ( ) 4 Wire material Au Others ( ) 4 Mold material Epoxy, Others ( ) 5 Molding method Transfer mold, Others ( ) 5 Fin material Cu Group Others ( ) 7 Multiplunger mold, Package FP-12S 1 4 6 3 2 7 Eff. Date 5 Eff. Date Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Ref No. G-1 Checked (Technical Data) Total Page 17 Approved AN17850A Page No. 8 Application Circuit VCC= 30V NC VCC 2200µ 12 4 IN GND NC 1 3 AN17850A 9 Output GND 51kΩ STB 8 2 NC 10µF STB Vref MUTE 8.2kΩ MUTE 6 OUT +ve 33µF 34dB 11 NC 5 IN 10 20kΩ 34dB RL=6Ω 7 OUT -ve STB 'OFF' STB 'ON' Mute 'OFF' Mute 'ON' Eff. Date Eff. Date 5V 0V 5V 0V Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Ref No. G-2 Checked (Technical Data) Total Page 17 Approved AN17850A Page No. 9 PD - Ta Curves (1) Tc = Ta, 62.5W ( θj-c = 2 °C/W ) (2) 20.83W ( θf = 4.0 °C/W ) With a 100cm2 X 3mm Al heat sink (black colour coated) or a 200cm2 X 2mm Al heat sink (not lacquered) (3) 15.63W ( θf = 6.0 °C/W ) 2 With a 100cm X 2mm Al heat sink (not lacquered) (4) 3.0W at Ta = 25°C ( θj-a = 42°C/W ) Without heat sink 80 70 62.5W Power Dissipation PD ( W ) 60 (1) 50 40 30 20.8W 20 (2) 15.6W (3) 10 3.0W (4) 0 0 25 50 75 100 125 150 Ambient Temperature Ta ( °C ) Eff. Date Eff. Date Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Checked (Technical Data) Approved AN17850A Ref No. G-3 Total Page 17 Page No. 10 Area of Safe Operation 40 VCEmax = 32V ICmax = 8A Ta = 25°C 10 8 t= IC(A) s 1m t= 10 10 s m t= s 0m 1 0.3 1 10 70 VCE (V) Eff. Date Eff. Date Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Checked (Technical Data) Approved AN17850A Ref No. G-4 Total Page 17 Page No. 11 ta td VCC = 30V tc tb VCC = 0V STANDBY OFF 5V STANDBY ON 0V 5V MUTE OFF MUTE ON 0V Description Minimum Unit 0 ms ta Wating time required for Standby to turn off after VCC is on. tb Wating time required for Mute turn off after Standby is off. 500 ms tc Wating time required for Standby to turn on after Mute is on 300 ms td Waiting time required for VCC to turn off after Standby is on 0 ms Eff. Date Eff. Date Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Checked (Technical Data) AN17850A Approved Pin No. Function 1 NC 2 Standby Ref No. G-5 Total Page 17 Page No. 12 Description Internal circuitry DC BIAS (V) Standby control pin Determined by external 12 Standby “ON” = 0V Standby “OFF” = 5V 400 2 100kΩ 100kΩ 10kΩ 3 3 IN GND 4 NC 5 INPUT 200Ω 400Ω Input ground 0V AC input Terminal 0V 5 33kΩ 3 8.3kΩ 6 MUTE 12 MUTE Control 400Ω Determined by external 6 MUTE “OFF” = 5V MUTE ON = 0V 10.6kΩ 30kΩ 2.65kΩ 575Ω 3 Eff. Date Eff. Date Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Checked (Technical Data) Approved AN17850A Pin No. 7 Function Internal circuitry Output (-) 12 Pre Amp Ref No. G-5 Total Page 17 Page No. 13 Description DC BIAS (V) Negative output terminal VCC/2 Driver cct 7 VCC/2 250Ω 15kΩ 9 10kΩ 3 8 9 NC Output Power Ground PWR GND 10 Output (+) 12 Pre Amp 0V Positive output terminal VCC/2 Power Supply Pin Typ 30V Driver cct 10 VCC/2 250Ω 15kΩ 9 10kΩ 3 11 NC 12 VCC Eff. Date Eff. Date Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Checked (Technical Data) Approved AN17850A Power dissipation and Heat Sink TA HEAT SINK Definition of terms Ref No. G-6 Total Page 17 Page No. 14 TC TJ CASE DIE θCA θJC FIG1. Simplified Illustration of IC PD: Power Dissipation and Heat Sink attached Tj: Junction Temperature TC: Case Temperature TA: Ambient Temperature θJC: Thermal Resistance of junction to case θCA: Thermal Resistance of case to ambient, normally through heat sink The following two equations represent the relations of these terms. ( Tj - TC ) / θJC = PD (1) ( TC - TA ) / θCA = PD’ (2) For reliable and long-term, continuous operation, junction temperature should not exceed 125OC and θJC for FP-12S package is 2OC/W. Substitute these values in Equation 1. After specify the PD, TC can be determined. Assume no heat loss at the casing,i.e. all power is dissipated to the ambient through heat sink, which is quite true. So PD = PD’. Since TC is also known, one can determine the following using equation2: a) The rating of heat sink for specific maximum operating ambient temperature, or b) The maximum operating ambient temperature for specific heat sink rating. A more general equation can be used for rough calculation. ( TJ - TA ) / θJA = PD θJA = θCA + θJC (3) (4) In this case, θJA is total thermal resistance of the heat sink and IC package. Therefore, for specified power dissipation, either heat sink rating or maximum operating ambient temperature can be decided if the other is known. Take note that it’s essential to know PD value before hand in order to work out other quantities. PD calculation is as shown. PD = Vcc x Icc - Po_total (5) Vcc: DC supply voltage Icc: RMS value of IC current Po_total: Total output power Eff. Date Eff. Date Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Checked (Technical Data) Approved AN17850A Ref No. G-6 Total Page 17 Page No. 15 Input DC biasing Input DC bias is maintained at ground level. If the input signal contains DC bias voltage, AC coupling should be included on the application circuit. Vin 5 The value of 20kΩ resistor is set in order to achieve the minimum output DC offset. 20kΩ FIG2. Input DC Biasing Output Zobel Network It should be noted that this device is designed such that the Zobel network (RC pair) at the output pins is not necessary for stable operation. 10 7 In practical application, the Zobel network may be applied optionally for two reasons: a) Ensuring stability for different PCB layout and speaker types. b) Ability to withstand to high ESD levels. Eff. Date Eff. Date Eff. Date FIG3. Output Zobel Network Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications (Technical Data) Checked AN17850A Approved Ref No. G-6 Total Page 17 Page No. 16 Standby operation 51kΩ STB 5 10µF FIG4. Standby Application circuit Standby pin should be connected with carefully selected components in order to avoid “Pop Noise” during Standby ON/OFF transient. The 51k resistor and 10uF capacitor pair can delay the rising of voltage at pin 5 to reach the Standby threshold. When Standby is switching on together with supply, this delay would be very useful to ensure no “Pop Noise”. If the Standby voltage is provided by a microcontroller, the suppression of “Pop” could even be better. For further details of timing and delay for standby circuit, please refer to page 11. Mute operation Mute pin should be connected with carefully selected components in order to avoid “Pop Noise” during MUTE ON/OFF transient. The 8.2k resistor and 33uF capacitor pair can delay the rising of voltage at pin 6 to reach the Mute threshold. When Mute is switching on together with supply, this delay would be very useful to ensure no “Pop Noise”. 8.2kΩ Mute 6 33µF FIG5. Mute application circuit For further details of timing and delay for Mute application circuit, please refer to page 11. Eff. Date Eff. Date Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd. Prepared Product Specifications Checked AN17850A Approved Ref No. H Total Page 17 Page No. 17 (Precaution for use) 1) Ground the radiation fin so that there will be no difference in electric potential between the radiation fin and ground. 2) The thermal protection circuit operates at Tj at approximately 150 C. Thermal protection circuit is reset automatically when the temperature drops. 3) Be sure to attach heatsink to the IC before use. Make sure that the heatsink is secured to the chassis. 4) In order to prevent IC from being damaged during the fault test, prior to standby switching from on to off or vice versa, it is important to assert the mute on. Please refer to the timing diagram on page 11. Eff. Date Eff. Date Eff. Date Eff. Date 15-AUG-03 FMSC-PSDA-002-01 REV 1 Semiconductor Company, Matsushita Electric Industrial Co., Ltd.