INTEGRATED CIRCUITS DATA SHEET TDA1517ATW 8 W BTL or 2 × 4 W SE power amplifier Product specification Supersedes data of 2001 Feb 14 File under Integrated Circuits, IC01 2001 Apr 17 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW FEATURES • Electrostatic discharge protection • Requires very few external components • Thermal protection • Flexibility in use: mono Bridge-Tied Load (BTL) and stereo Single-Ended (SE); it should be noted that in stereo applications the outputs of both amplifiers are in opposite phase • Reverse polarity safe • Capable of handling high energy on outputs (VP = 0 V) • No switch-on/switch-off plop • Low thermal resistance. • High output power • Low offset voltage at output (important for BTL) GENERAL DESCRIPTION • Fixed gain The TDA1517ATW is an integrated class-AB output amplifier contained in a plastic heatsink thin shrink small outline package (HTSSOP20). The device is primarily developed for multimedia applications. • Good ripple rejection • Mode select switch (operating, mute and standby) • AC and DC short-circuit safe to ground and VP QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VP supply voltage 6 12 18 V IORM repetitive peak output current − − 2.5 A Iq(tot) total quiescent current − 40 80 mA Istb standby current − 0.1 100 µA − 4 − W SE application Po output power THD = 10%; RL = 4 Ω SVRR supply voltage ripple rejection RS = 0 Ω 46 − − dB αcs channel separation RS = 10 kΩ 40 55 − dB Vn(o) noise output voltage RS = 0 Ω − 50 − µV Zi input impedance 50 − − kΩ BTL application Po output power THD = 10%; RL = 8 Ω − 8 − W SVRR supply voltage ripple rejection RS = 0 Ω 50 − − dB ∆VOO output offset voltage − − 150 mV Vn(o)(offset) noise output offset voltage − 70 − µV Zi input impedance 25 − − kΩ RS = 0 Ω ORDERING INFORMATION PACKAGE TYPE NUMBER NAME DESCRIPTION VERSION TDA1517ATW HTSSOP20 plastic, heatsink thin shrink small outline package; 20 leads; body width 4.4 mm SOT527-1 2001 Apr 17 2 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW BLOCK DIAGRAM VP1 handbook, full pagewidth 15 non-inverting input 1 3 mute switch + 60 kΩ VP2 16 Cm 8 − OUT1a VA + 2 kΩ 9 power stage 18 kΩ VP TDA1517ATW 17 standby switch 1 2 6 7 14 19 20 VA mute switch 15 kΩ + + − x1 SVRR OUT1b − 5 15 kΩ MODE not connected standby reference voltage mute reference voltage 18 kΩ 2 kΩ inverting input 2 − 12 + VA 18 60 kΩ 13 − + mute switch input reference voltage OUT2b Cm power stage 4 10 SGND PGND1 Fig.1 Block diagram. 2001 Apr 17 OUT2a 3 11 PGND2 MGU303 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW PINNING SYMBOL PIN DESCRIPTION n.c. 1 not connected n.c. 2 not connected IN1+ 3 non-inverting input 1 SGND 4 signal ground SVRR 5 supply voltage ripple rejection n.c. 6 not connected n.c. 7 not connected SGND 4 OUT1a 8 output 1a SVRR 5 OUT1b 9 output 1b n.c. 6 15 VP1 PGND1 10 power ground 1 n.c. 7 14 n.c. PGND2 11 power ground 2 OUT1a 8 13 OUT2b OUT2a 12 output 2a OUT1b 9 12 OUT2a OUT2b 13 output 2b n.c. 14 not connected PGND1 10 11 PGND2 VP1 15 supply voltage 1 VP2 16 supply voltage 2 MODE 17 mode select switch IN2− 18 inverting input 2 n.c. 19 not connected n.c. 20 not connected handbook, halfpage n.c. 1 20 n.c. n.c. 2 19 n.c. IN1+ 3 18 IN2− 17 MODE TDA1517ATW 16 VP2 MGU302 Fig.2 Pin configuration. FUNCTIONAL DESCRIPTION The TDA1517ATW contains two identical amplifiers with differential input stages. This device can be used for Bridge-Tied Load (BTL) or Single-Ended (SE) applications. The gain of each amplifier is fixed at 20 dB. A special feature of this device is the mode select switch. Since this pin has a very low input current (<40 µA), a low cost supply switch can be used. With this switch the TDA1517ATW can be switched into three modes: • Standby: low supply current • Mute: input signal suppressed • Operating: normal on condition. 2001 Apr 17 4 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT. VP supply voltage − 18 V VPSC AC and DC short-circuit-safe voltage − 18 V Vrp reverse polarity voltage − 6 V ERGo energy handling capability at outputs − 200 mJ IOSM non-repetitive peak output current − 4 A IORM repetitive peak output current − 2.5 A Ptot total power dissipation − 5 W Tvj virtual junction temperature − 150 °C Tstg storage temperature −55 +150 °C Tamb ambient temperature −40 +85 °C VP = 0 V THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS VALUE UNIT − − tbf DC CHARACTERISTICS VP = 12 V; Tamb = 25 °C; measured in Fig.3; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VP supply voltage note 1 6.0 12 18 V Iq quiescent current RL = ∞ − 40 80 mA 8.5 − VP V Operating condition VMODE(oper) mode switch voltage level IMODE(oper) mode switch current − 15 40 µA VO DC output voltage − 5.7 − V ∆VOO DC output offset voltage − − 150 mV VMODE(mute) mode switch voltage level 3.3 − 6.4 V VO DC output voltage − 5.7 − V ∆VOO DC output offset voltage − − 150 mV VMODE = 12 V Mute condition Standby condition VMODE(stb) mode switch voltage level 0 − 2 V Istb standby current − 0.1 100 µA Note 1. The circuit is DC adjusted at VP = 6 to 18 V and AC operating at VP = 8.5 to 18 V. 2001 Apr 17 5 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW AC CHARACTERISTICS VP = 12 V; f = 1 kHz; Tamb = 25 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT SE application; note 1 Po output power note 2 THD = 1% 2.5 3.3 − W THD = 10% 3 4 − W THD total harmonic distortion Po = 1 W − 0.1 − % fro(L) low frequency roll-off −1 dB; note 3 − 25 − Hz fro(H) high frequency roll off −1 dB 20 − − kHz GV voltage gain 19 20 21 dB ∆GV channel balance − − 1 dB SVRR supply voltage ripple rejection on 46 − − dB mute 46 − − dB standby 80 − − dB 50 60 75 kΩ Zi input impedance Vn(o)(rms) noise output voltage (RMS value) note 4 note 5 on; RS = 0 Ω − 50 − µV on; RS = 10 kΩ − 70 100 µV mute; note 6 − 50 − µV αcs channel separation RS = 10 kΩ 40 55 − dB Vo(mote) output voltage in mute note 7 − − 2 mV THD = 1% 5 6.6 − W THD = 10% 6.5 8.0 − W BTL application; note 8 PO output power note 2 THD total harmonic distortion Po = 1 W − 0.03 − % fro(L) low frequency roll-off −1 dB; note 3 − 25 − Hz fro(H) high frequency roll off −1 dB 20 − − kHz GV voltage gain 25 26 27 dB SVRR supply voltage ripple rejection on 50 − − dB mute 50 − − dB standby 80 − − dB 25 30 38 kΩ Zi input impedance Vn(o)(rms) noise output voltage (RMS value) Vo(mute) 2001 Apr 17 output voltage in mute note 4 note 5 on; RS = 0 Ω − 70 − µV on; RS = 10 kΩ − 100 200 µV mute; note 6 − 60 − µV note 7 − − 2 mV 6 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW Notes to the characteristics 1. RL = 4 Ω, measured in Fig.4. 2. Output power is measured directly at the output pins of the IC. 3. Frequency response externally fixed. 4. Vripple = Vripple(max) = 2 V (p-p); RS = 0 Ω. 5. Noise voltage measured in a bandwidth of 20 Hz to 20 kHz. 6. Noise output voltage independent of RS. 7. Vi = Vi(max) = 1 V (RMS). 8. RL = 8 Ω, measured in Fig.3. APPLICATION INFORMATION VCC 1000 µF handbook, full pagewidth 100 nF 15 TDA1517ATW 16 3 8 Ri 60 kΩ A +OUT 9 470 nF RL 8Ω +IN1 12 Ri 60 kΩ VCC B −OUT 13 18 10 kΩ MODE 17 µc1 MICROCONTROLLER µc2 µc1 µc2 0 On 0 1 Mute 0 0 Standby 1 8.2 kΩ 5 STANDBY/ MUTE LOGIC VCC SHORT CIRCUIT AND TEMPERATURE PROTECTION 15 kΩ 15 kΩ input reference voltage 4 10 SGND Fig.3 BTL application block diagram. 2001 Apr 17 7 11 PGND MGU304 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW VCC handbook, full pagewidth 100 nF 15 TDA1517ATW 1000 µF 16 3 8 220 nF IN1+ 220 nF IN2− Ri 60 kΩ A Ri 60 kΩ B 9 1000 µF +OUT 18 12 VCC 13 1000 µF −OUT 10 kΩ MODE 17 µc1 MICROCONTROLLER µc2 8.2 kΩ 100 µF RL 4Ω 5 STANDBY/ MUTE LOGIC VCC SHORT CIRCUIT AND TEMPERATURE PROTECTION 15 kΩ 15 kΩ µc1 µc2 0 On 0 1 Mute 0 0 Standby 1 RL 4Ω input reference voltage 4 10 SGND 11 PGND MGU305 Fig.4 SE application block diagram. Test conditions Proper supply bypassing is critical for low noise performance and high power supply rejection. The respective capacitor locations should be as close as possible to the device and grounded to the power ground. Decoupling the power supply also prevents unwanted oscillations. For suppressing higher frequency transients (spikes) on the supply line a capacitor with low ESR (typical 0.1 µF) has to be placed as close as possible to the device. For suppressing lower frequency noise and ripple signals, a large electrolytic capacitor (e.g. 1000 µF or greater) must be placed close to the IC. Tamb = 25 °C; unless otherwise specified: VP = 12 V, BTL application, f = 1 kHz, RL = 8 Ω, fixed gain = 26 dB, audio band-pass: 22 Hz to 22 kHz. In the figures as a function of frequency a band-pass of 10 Hz to 80 kHz was applied. The BTL application block diagram is shown in Fig.3. The PCB layout [which accommodates both the mono (BTL) and stereo (single-ended) application] is shown in Fig.6. Printed-Circuit Board (PCB) layout and grounding For high system performance levels certain grounding techniques are imperative. The input reference grounds have to be tied to their respective source grounds and must have separate traces from the power ground traces; this will separate the large (output) signal currents from interfering with the small AC input signals. The small signal ground traces should be located physically as far as possible from the power ground traces. Supply and output traces should be as wide as possible for delivering maximum output power. 2001 Apr 17 In single-ended (stereo) application a bypass capacitor connected to pin SVR reduces the noise and ripple on the midrail voltage. For good THD and noise performance a low ESR capacitor is recommended. Input configuration It should be noted that the DC level of the input pins is approximately 2.1 V; a coupling capacitor is therefore necessary. 8 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW The formula for the cut-off frequency at the input is as 1 follows: f IC = -----------------------------2 × π × Ri Ci Average listening level without any distortion yields: P tot 5 P ALL = ---------------- = --------------- = 315 mW factor 15.85 1 thus f IC = ----------------------------------------------------------------------------- = 11 Hz –3 –9 2 × π × 30 × 10 × 470 × 10 The power dissipation can be derived from Fig.11 for 0 dB and 12 dB headroom. As can be seen it is not necessary to use high capacitor values for the input; so the delay during switch-on, which is necessary for charging the input capacitors, can be minimized. This results in a good low frequency response and good switch-on behaviour. Table 1 RATING Po = 5 W (THD = 0.1%) In stereo applications (single-ended) coupling capacitors on both input and output are necessary. It should be noted that the outputs of both amplifiers are in opposite phase. HEADROOM POWER DISSIPATION 0 dB 12 dB 3.5 W 2.0 W Thus for the average listening level (music power) a power dissipation of 2.0 W can be used for the thermal PCB calculation; see Section “Thermal behaviour (PCB design considerations)”. Built-in protection circuits The IC contains two types of protection circuits: • Short-circuits the outputs to ground, the supply to ground and across the load: short-circuit is detected and controlled by a SOAR protection circuit Mode pin For the 3 functional modes: standby, mute and operate, the MODE pin can be driven by a 3-state logic output stage, e.g. a microcontroller with some extra components for DC-level shifting; see Fig.10 for the respective DC levels. • Thermal shut-down protection: the junction temperature is measured by a temperature sensor. Thermal foldback is activated at a junction temperature of >150 °C. • Standby mode is activated by a low DC level between 0 and 2 V. The power consumption of the IC will be reduced to <0.12 mW. Output power The output power as a function of supply voltage has been measured on the output pins and at THD = 10%. The maximum output power is limited by the maximum allowable power dissipation and the maximum available output current, 2.5 A repetitive peak current. • Mute mode is activated by a DC level between 3.3 and 6.4 V. The outputs of the amplifier will be muted (no audio output); however the amplifier is DC biased and the DC level of the output pins stays at half the supply voltage. The input coupling capacitors are charged when in mute mode to avoid pop-noise. Supply voltage ripple rejection • The IC will be in the operating condition when the voltage at pin MODE is between 8.5 V and VCC. The SVRR has been measured without an electrolytic capacitor on pin 5 and at a bandwidth of 10 Hz to 80 kHz. The curves for operating and mute condition (respectively) were measured with Rsource = 0 Ω. Only in single-ended applications is an electrolytic capacitor (e.g. 100 µF) on pin 5 necessary to improve the SVRR behaviour. Switch-on/switch-off To avoid audible plops during switch-on and switch-off of the supply voltage, the MODE pin has to be set in standby condition (VCC level) before the voltage is applied (switch-on) or removed (switch-off). The input and SVRR capacitors are smoothly charged during mute mode. Headroom A typical music CD requires at least 12 dB (is factor 15.85) dynamic headroom (compared with the average power output) for passing the loudest portions without distortion. The following calculation can be made for this application at VP = 12 V and RL = 8 Ω: Po at THD = 0.1% is approximately 5 W (see Fig.7). 2001 Apr 17 Power rating The turn-on and turn-off time can be influenced by an RC-circuit connected to the MODE pin. Switching the device or the MODE pin rapidly on and off may cause ‘click and pop’ noise. This can be prevented by proper timing on the MODE pin. Further improvement in the BTL application can be obtained by connecting an electrolytic capacitor (e.g. 100 µF) between the SVRR pin and signal ground. 9 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier The thermal vias (0.3 mm ∅) in the ‘thermal land’ should not use web construction techniques, because those will have high thermal resistance; continuous connection completely around the via-hole is recommended. Thermal behaviour (PCB design considerations) The typical thermal resistance [Rth(j-a)] of the IC in the HTSSOP20 package is 37 K/W if the IC is soldered on a printed-circuit board with double sided 35 µm copper with a minimum area of approximately 30 cm2. The actual usable thermal resistance depends strongly on the mounting method of the device on the printed-circuit board, the soldering method and the area and thickness of the copper on the printed-circuit board. For a maximum ambient temperature of 60 °C the following calculation can be made: for the application at VP = 12 V and RL = 8 Ω the (ALL-) music power dissipation approximately 2.0 W; Tj(max) = Tamb + P × Rth(j-a) = 60 °C + 2.0 × 37 = 134 °C. The bottom ‘heat-spreader’ of the IC has to be soldered efficiently on the ‘thermal land’ of the copper area of the printed-circuit board using the re-flow solder technique. Note: the above calculation holds for application at ‘average listening level’ music output signals. Applying (or testing) with sine wave signals will produce approximately twice the music power dissipation; at worst case condition this can activate the maximum temperature protection. A number of thermal vias in the ‘thermal land’ provide a thermal path to the opposite copper site of the printed-circuit board. The size of the surface layers should be as large as needed to dissipate the heat. handbook, full pagewidth TDA1517ATW 60 K/W 50 ON-BOARD-COOLING COPPER DESIGN 40 CU-LAYER 1 Rth(j-a) 30 L L 20 Rth(j-p) CU-LAYER 2-4 10 0 0 1 2 3 4 number of 35 µm copper layers MGU306 Rth(j-p) curve is given for practical calculation purpose. L = 30 mm plus vias Fig.5 Thermal resistance of the HTSSOP20 mounted on printed-circuit board. 2001 Apr 17 10 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW handbook, full pagewidth top view top copper layout top view bottom copper layout +VP TDA 1517ATW 1000 µF 25 V 100 nF 220 nF IN1 IN2 Std By 100 µF/16 V On 1000 µF 16 V sept −2000 − OUT2 + OUT1 MGU312 top view component layout For BTL applications the two 1000 µF/16 V capacitors must be replaced by 0 Ω jumpers. Fig.6 Printed-circuit board layout for BTL and SE application. 2001 Apr 17 11 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW Typical performance characteristics for BTL application at VP = 12 V and RL = 8 Ω MGU307 10 MGU308 10 handbook, halfpage handbook, halfpage THD (%) THD (%) 1 1 10−1 10−1 10−2 10−2 10−1 1 10−2 10−2 10 Po (W) 10−1 102 10 1 f (kHz) Fig.7 THD as a function of Po. Fig.8 THD as a function of frequency. MGU309 0 Po = 1 W MGU310 10 Vo (V) handbook, halfpage handbook, halfpage SVRR (dB) 1 −20 10−1 −40 10−2 −60 10−3 mute −80 10−2 10−1 10−4 1 102 10 f (kHz) Fig.9 SVRR as a function of frequency. 2001 Apr 17 0 2 4 6 8 10 12 VMODE (V) Fig.10 Vo as a function of VMODE. 12 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW MGU311 6 MGU323 12 handbook, halfpage handbook, halfpage Po (W) P (W) 5 10 VP = 12 V RL = 8 Ω 4 8 3 RL = 4 Ω 6 VP = 15 V RL = 16 Ω 2 8Ω 16 Ω 4 1 2 0 0 2 4 6 8 0 10 6 Po (W) Fig.11 Power dissipation as a function of Po. 2001 Apr 17 8 10 12 14 16 18 VP (V) Fig.12 Po as a function of VP. 13 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW PACKAGE OUTLINE HTSSOP20: plastic, heatsink thin shrink small outline package; 20 leads; body width 4.4 mm E D A SOT527-1 X c y HE heathsink side v M A Dh Z 11 20 (A 3) A2 Eh pin 1 index A A1 θ Lp L 1 10 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) Dh E(2) Eh e HE L Lp v w y Z(1) θ mm 1.10 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.20 0.09 6.6 6.4 4.3 4.1 4.5 4.3 3.1 2.9 0.65 6.6 6.2 1.0 0.75 0.50 0.2 0.13 0.1 0.5 0.2 8 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 99-11-12 00-07-12 SOT527-1 2001 Apr 17 EUROPEAN PROJECTION 14 o Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 220 °C for thick/large packages, and below 235 °C for small/thin packages. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 2001 Apr 17 TDA1517ATW 15 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, HBGA, LFBGA, SQFP, TFBGA not suitable suitable(2) HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, SMS not PLCC(3), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO REFLOW(1) suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2001 Apr 17 16 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW DATA SHEET STATUS DATA SHEET STATUS(1) PRODUCT STATUS(2) DEFINITIONS Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2001 Apr 17 17 Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier NOTES 2001 Apr 17 18 TDA1517ATW Philips Semiconductors Product specification 8 W BTL or 2 × 4 W SE power amplifier NOTES 2001 Apr 17 19 TDA1517ATW Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SÃO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 5F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2451, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 60/14 MOO 11, Bangna Trad Road KM. 3, Bagna, BANGKOK 10260, Tel. +66 2 361 7910, Fax. +66 2 398 3447 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 3341 299, Fax.+381 11 3342 553 For all other countries apply to: Philips Semiconductors, Marketing Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com SCA 72 © Philips Electronics N.V. 2001 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 753503/02/pp20 Date of release: 2001 Apr 17 Document order number: 9397 750 08264