TI TPIC2810

TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
D Low rDS(on) . . . 5 Ω Typical
D Eight Power DMOS Transistor Outputs of
D
D
D
100-mA Continuous Current
210-mA Current Limit Capability
Drain Output ESD Protection . . . 3000 V
Output Clamp Voltage . . . 40 V
description
The TPIC2810 device is a monolithic, mediumvoltage, low-current, 8-bit shift register design to
drive low-side switched resistive loads such as
LEDs. The device is not recommended for
switching inductive loads.
D PACKAGE
(TOP VIEW)
VCC
SDA
DRAIN0
DRAIN1
DRAIN2
DRAIN3
A2
G
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
SCL
DRAIN7
DRAIN6
DRAIN5
DRAIN4
A1
A0
This device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data
transfers through the shift register via an I2C bus interface. Data is transferred into the data shift register only
after the group ID and device address have been verified. The subaddress directs the I2C bus interface to read
or write data to the device or transfer data to the output. When output enable (G) is held high, all drain outputs
are off. When G is held low, data from the output storage register is transparent to the output buffers. When data
in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs
have sink-current capability.
The TPIC2810 device has an internal power-up clear to initialize all registers to an off state when power is
applied to the device. It also has a thermal sensor to monitor the die temperature and shut the drain outputs
off, if an over current condition occurs.
Outputs are low-side, open-drain DMOS transistors with output ratings of 40 V and 100 mA continuous
sink-current capability. Each output provides a 210-mA maximum current limit at TC = 25°C. The current limit
decreases as the junction temperature increases for additional device protection. The device also provides up
to 3000 V of ESD protection on output terminals and 2000 V of ESD protection on input terminals when tested
using the human-body model.
The TPIC2810 device is characterized for operation over the operating case temperature range of –40°C to
125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
functional block diagram
VCC
G
GND
DISABLE
DRAIN0
A0
A1
A2
Serial Data In
Data In
Serial Data Out
Data Out
Serial Clock
I2C Bus Interface
SCL
SDA
D0
D1
D2
D3
D4
D5
D6
D7
Clock
11H
CLR
CLEAR
44H
22H
CLR
Power-Up
Clear
DRAIN1
DRAIN2
Output Storage Register
Data Shift
Register
DRAIN3
DRAIN4
DRAIN5
CLEAR
DRAIN6
CLEAR
Thermal
Shutdown
DRAIN7
DISABLE
CLR
CLEAR
See the TPIC2810 subaddress and I 2C protocol definition section of this data sheet for definition of the 11H,
22H, and 44H control signals.
2
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TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
A0
9
I
Address input 0
A1
10
I
Address input 1
A2
7
I
Address input 2
DRAIN0
3
DRAIN1
4
DRAIN2
5
O
FET drain outputs.
outputs The DRAIN terminals are low-side
low side switches for resistive loads.
loads
DRAIN3
6
DRAIN4
11
DRAIN5
12
DRAIN6
13
DRAIN7
14
G
8
I
Output enable. Active low input enables output FETs when low and disables output FETs when high.
GND
16
O
Ground
SCL
15
I
Serial clock
SDA
2
I/O
VCC
1
I
Open drain, bidirectional serial data terminal
Supply voltage input
schematic of inputs and outputs
Equivalent of Each Input
Typical of All Drain Outputs
VCC
Drain
42 V
Input
7V
6.5 V
GND
GND
RC Filter is Not Present On A0, A1, and A2 Inputs
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TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
absolute maximum ratings over the recommended operating case temperature range (unless
otherwise noted)†
Logic supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Logic input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
Power DMOS drain-to-source voltage, VDS (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 V
Continuous source-to-drain diode anode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210 mA
Pulsed source-to-drain diode anode current (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 420 mA
Pulsed drain current, each output, all outputs on, ID, TC = 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . 210 mA
Peak drain current, single output, IDM, TC = 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210 mA
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 150°C
Operating case temperature range, TC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to GND.
2. Each power DMOS source is internally connected to GND.
3. Pulse duration ≤ 100 µs and duty cycle ≤ 2%.
DISSIPATION RATING TABLE
PACKAGE
TC = 25°C
POWER RATING
DERATING FACTOR
ABOVE TC = 25°C
TC = 125°C
POWER RATING
D
1087 mW
8.7 mW/°C
217 mW
recommended operating conditions
Logic supply voltage, VCC
High-level input voltage, VIH
MIN
MAX
UNIT
3.0
5.5
V
0.7 VCC
Low-level input voltage, VIL
Pulse drain output current, TC = 25°C, VCC = 5 V, all outputs on (see Notes 3 and 4 and Figure 8)
Operating case temperature, TC
–40
NOTES: 3. Pulse duration ≤ 100 µs and duty cycle ≤ 2%.
4. Technique must limit TJ – TC to 10°C maximum.
4
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V
0.3 VCC
V
210
mA
125
°C
TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
electrical characteristics, VCC = 5 V, TC = 25°C (unless otherwise noted)
PARAMETER
VCC
V(BR)DSX
VSD
TEST CONDITIONS
Logic supply voltage
MIN
TYP
3
Drain-to-source breakdown voltage
ID = 1 mA
Source-to-drain diode forward
voltage
IF = 100 mA
MAX
5.5
40
Power-up clear voltage
High-level input current
VCC rising no load,
VCC = 5.5 V,
IIL
VHYS
Low-level input current
VCC = 5.5 V,
See Note 5
VI = VCC
VI = 0
Digital input hysteresis
1.2
V
2.84
V
1
µA
–1
µA
1.1
V
All outputs off
0.62
1
ICC
Logic supply current
VCC = 5.5
55V
All outputs on
0.7
1
ICC(FRQ)
Logic supply current at frequency
fSCL = 100 kHz,
All outputs off,
CL = 30 pF,
See Figure 3
0.74
1
IOL
IL
Low level output current; SDA
Leakage current; SDA
VOL = 0.4 V
VI = VCC
13
–1
IN
Nominal current
VDS(on) = 0.5 V,
TC = 85°C,
IN = ID,
See Notes 4, 6, 7
IDSX
Off state drain current
Off-state
VDS = 30 V
VDS = 30 V, TC = 125°C
VCC = 5.5
55V
TTSD
THYS
Thermal shutdown set points
rDS(on)
Static drain-source on-state
resistance
ID = 100 mA, VCC = 3.0 V,
TC = 125°C
See Notes 4 and 6
and Figures 4 and 5
ID = 100 mA, VCC = 4.5 V,
TC = 125°C
NOTES: 4.
5.
6.
7.
75
10
ID = 100 mA, VCC = 3 V
ID = 100 mA, VCC = 4.5 V
mA
mA
mA
1
µA
mA
0.3
0.6
0.3
0.6
µA
A
°C
160
Thermal shutdown hysteresis
V
V
0.85
VPUC
IIH
UNIT
20
30
8.0
10.8
5.1
6.9
13.0
18.2
8.0
11.2
°C
Ω
Technique must limit TJ – TC to 10°C maximum
The power-up clear resets the I2C interface and clears all outputs.
These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.
Nominal current is defined for a consistent comparison between devices from different sources. It is the current that produces a
voltage of 0.5 V at TC = 85°C.
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TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
switching characteristics, VCC = 5 V, TC = 25°C, CL = 100 pF (unless otherwise noted)
PARAMETER
TEST CONDITIONS
tPLH
tPHL
Propagation delay time, low-to-high-level output from G
tr(OUT)
tf(OUT)
Rise time, drain output
Propagation delay time, high-to-low-level output from G
MIN
TYP
MAX
UNIT
1.15
CL = 30 pF,
F,
ID = 75 mA,
See Figures 1, 2, and 6
µs
0.64
1.05
Fall time, drain output
µs
0.89
100
f(SCL)
400
Serial clock frequency
2
t(BUF)
Bus free time between stop and start condition
t(SP)
tpd(ACK)
Tolerable spike width on bus
tLOW
SCL low time
tHIGH
tsu(DAT)
SCL = 100 kHz
4.7
SCL = 400 kHz
1.3
SCL high time
SDA → SCL setu
setup time
120
tsu(STO)
th(DAT)
th(STA)
tr(SCL)
Start condition setu
setup time
Stop condition setu
setup time
Sto
Rise time of SCL signal
4.7
1.3
SCL = 2 MHz
250
ns
µs
SCL = 100 kHz
4.0
SCL = 400 kHz
600
SCL = 2 MHz
200
SCL = 100 kHz
250
SCL = 400 kHz
100
Fall time of SCL signal
SCL = 100 kHz
4.7
600
SCL = 2 MHz
300
SCL = 100 kHz
4
SCL = 400 kHz
600
SCL = 2 MHz
140
Rise time of SDA signal
6
Fall time of SDA signal
POST OFFICE BOX 655303
ns
µs
ns
µs
ns
50
ns
4
µs
SCL = 400 kHz
600
ns
SCL = 2 MHz
160
ns
SCL = 100 kHz
1000
SCL = 400 kHz
300
SCL = 100 kHz
300
300
ns
70
SCL = 100 kHz
1000
SCL = 400 kHz
300
ns
70
SCL = 100 kHz
300
SCL = 400 kHz
300
SCL = 2 MHz
140
• DALLAS, TEXAS 75265
ns
70
SCL = 400 kHz
SCL = 2 MHz
tf(SDA)
ns
SCL = 100 kHz
SCL = 2 MHz
tr(SDA)
µss
10
SCL = 400 kHz
SCL = 2 MHz
tf(SCL)
ns
SCL = 100 kHz
SDA → SCL hold time
Start condition hold time
ns
SCL = 400 kHz
SCL = 2 MHz
tsu(STA)
MHz
µss
50
SCL low to data out valid (acknowledge)
kHz
ns
TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
thermal resistance
PARAMETER
RθJA
TEST CONDITIONS
Junction-to-ambient thermal resistance
MIN
All 8 outputs with equal power
MAX
UNIT
115
°C/W
PARAMETER MEASUREMENT INFORMATION
15 V
5V
5V
R = 2 kΩ
ID
1
VCC
2
Word
Generator
(See Note A)
15
8
RL = 200 Ω
DUT
SDA
Output
SCL
G
DRAIN
A0 A1
9
3–6, 11–14
CL = 30 pF
(See Note B)
A2 GND
10
7
16
Test Circuit
Acknowledge
Occurs Here
5V
SCL
0V
5V
SDA
D0, 2, 4, 6 = On
D1, 3, 5, 7 = Off
0V
5V
G
0V
15 V
D0, 2, 4, 6
0V
15 V
D1, 3, 5, 7
0V
Voltage Waveforms
NOTES: A. The word generator has the following characteristics: tr ≤ 30 ns, tf ≤ 30 ns, pulsed repetition rate (PRR) = 400 kHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 1. Resistive-Load Test Circuit and Voltage Waveforms
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TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
PARAMETER MEASUREMENT INFORMATION
15 V
5V
5V
R = 2 kΩ
ID
1
VCC
2
Word
Generator
(See Note A)
15
8
RL = 200 Ω
DUT
SDA
Output
SCL
G
DRAIN
A0 A1
9
3–6, 11–14
CL = 30 pF
(See Note B)
A2 GND
10
7
16
Test Circuit
5V
G
50%
SDA
50%
0V
tPHL
tPLH
DRAIN
90%
15 V
90%
10%
tpd(ACK)
10%
tr
t(SP)
SCL
0 .5 V
tf
tsu(STO)
tr(SDA)
t(BUF)
tf(SDA)
SDA
tLOW
tr(SCL)
tsu(STA)
tf(SCL)
SCL
th(STA)
th(DAT)
Stop
tHIGH
tsu(DAT)
Repeated
Start
Start
NOTES: A. The word generator has the following characteristics: tr ≤ 30 ns, tf ≤ 30 ns, pulsed repetition rate (PRR) = 400 kHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 2. Test Circuit, Switching Times and Voltage Waveforms
8
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TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
TYPICAL CHARACTERISTICS
1.3
VCC = 5 V
TC = –40°C to 125°C
ICC – Supply Current – mA
1.2
1.1
1.0
0.9
0.8
0.7
100k
1M
10M
f – Frequency – Hz
rDS(on) – Static Drain-Source On-State Resistance – Ω
Figure 3. Supply Current vs Frequency
16
14
VCC = 5 V
12
10
TC = 125°C
8
TC = 25°C
6
TC = –40°C
4
2
0
0.05
0.07
0.09
0.11
0.13
0.15
0.17
0.19
0.21
ID(on) – On-State Drain Current – A
Figure 4. Static Drain-Source On-State Resistance vs
On-State Drain Current
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TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
rDS(on) – Static Drain-Source On-State Resistance – Ω
TYPICAL CHARACTERISTICS
14
ID = 100 mA
12
10
TC = 125°C
8
6
TC = 25°C
TC = –40°C
4
2
0
2.7
3.3
3.9
4.5
5.1
5.7
6.3
6.9
VCC – Logic Supply Voltage – V
Figure 5. Static Drain-Source On-State Resistance vs
Logic Supply Voltage
1.4
t – Switching Time – µs
1.2
tPLH
tr
1.0
tf
0.8
tPHL
0.6
0.4
0.2
ID = 75 mA
0.0
–40
–20
0
20
40
60
80
100
120
TC – Case Temperature – °C
Figure 6. Switching Time vs Case Temperature
10
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TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
TYPICAL CHARACTERISTICS
ID – Maximum Continuous Drain Current
of Each Output – A
0.25
VCC = 5 V
0.20
0.15
TC = 25°C
0.10
TC = 100°C
0.05
TC = 125°C
0.00
1
2
3
4
5
6
7
8
N – Number of Outputs Conducting Simultaneously
ID – Maximum Peak Drain Current of Each Output – A
Figure 7. Maximum Continuous Drain Current Of Each Output vs
Number Of Outputs Conducting Simultaneously
0.25
10%
0.20
20%
50%
0.15
80%
0.10
0.05
VCC = 5 V
TC = 25°C
d = tw/tperiod = 1 ms/tperiod
0.00
1
2
3
4
5
6
7
8
N – Number of Outputs Conducting Simultaneously
Figure 8. Maximum Peak Drain Current Of Each Output vs
Number Of Outputs Conducting Simultaneously
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TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
THERMAL INFORMATION
D PACKAGE†
R θJA – Normalized Junction-to-Ambient Thermal Resistance – °C/W
10
DC Conditions
1
d = 0.5
d = 0.2
d = 0.1
0.1
d = 0.05
d = 0.02
d = 0.01
0.01
Single Pulse
0.001
tc
tw
ID
0
0.0001
0.0001
0.001
0.01
0.1
1
tw – Pulse Duration – s
† Device mounted on FR4 printed-circuit board with no heat sink
NOTES: ZθA(t) = r(t) RθJA
tw = pulse duration
tc = cycle time
d = duty cycle = tw/tc
Figure 9. Normalized Junction - to -Ambient Thermal Resistance vs Pulse Duration
12
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TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
PRINCIPLES OF OPERATION
TPIC2810 subaddress and I2C protocol definition
subaddress definition:
Summary:
HEX
Value
R/W
Bit
Function
11H
1
Read data from the input register
11H
0
Write data to the data shift register, do not transfer to output register
22H
0
Command to transfer data from the data shift register to the output storage register
44H
0
Write data to the data shift register and transfer it to the output storage register immediately (extra
load 22H command not needed)
Other
x
No action on undefined subaddresses
All other undefined subaddress values are not acknowledged.
register definition:
D The data shift register receives serial data from the I2C interface.
D The data shift register receives data from the input interface and holds it until it is transferred to the output
storage register.
D The output storage register controls whether the FET is on or off.
TPIC2810 I2C input interface protocol definition
Slave Address and R/W
S
G3 G2 G1 G0 A2 A1 A0 RW A
S
G
A(0:2)
RW
A
Subaddress
Data
P
Subaddress
S7 S6 S5 S4 S3 S2 S1 S0
Data
A
D7 D6 D5 D4 D3 D2 D1 D0
A
P
Start Condition
Group ID: Defined as 1100
Device Address Selectable Via Input Terminals
Read/Write Select Bit
Acknowledge
Defined Per Subaddress Table
Data to Be Loaded Into the Shift and Output Registers
Stop Condition
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TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
PRINCIPLES OF OPERATION
Case 1: Read/Write serial data, but do not load output register
This case loads the data shift register with data via the I2C interface. Data is not transferred to the output storage
register.
write operation:
Slave Address and R/W = 0
S
Subaddress 11H
G3 G2 G1 G0 A2 A1 A0 RW A
G[3:0]:
A[2:0]:
RW:
Subaddress:
Data:
Acknowledge:
S7 S6 S5 S4 S3 S2 S1 S0
Data to Slave
A
D7 D6 D5 D4 D3 D2 D1 D0
A
P
Fixed at 1100
Selectable Via Input Terminals
0 = Write Shift Register
11H (0001 0001)
Output Data to the TPIC2810 Device
Occurs After Valid Address Byte, After the Subaddress Byte, and After the Data Byte
read operation:
Slave Address and R/W = 0
S
Subaddress 11H
G3 G2 G1 G0 A2 A1 A0 RW A
S
G[3:0]:
A[2:0]:
RW:
Subaddress:
Data:
Acknowledge:
14
S7 S6 S5 S4 S3 S2 S1 S0
A
Slave Address and R/W = 1
Data From Slave
G3 G2 G1 G0 A2 A1 A0 RW A
D7 D6 D5 D4 D3 D2 D1 D0 NA
Fixed at 1100
Selectable Via Input Terminals
1 = Read Shift Register (Note the Slave Address RW Bit = 0)
11H (0001 0001)
Input Data From the TPIC2810 Device
Occurs After Valid Address Byte and After the Subaddress Byte
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TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
PRINCIPLES OF OPERATION
Case 2: Transfer serial data to output storage register
This case transfers data from the data shift register to the output storage register. The transfer must occur during
the subaddress acknowledge bit and the data byte is ignored.
Slave Address and R/W = 0
S
G3 G2 G1 G0 A2 A1 A0 RW A
G[3:0]:
A[2:0]:
RW:
Subaddress:
Data:
Acknowledge:
Subaddress 22H
S7 S6 S5 S4 S3 S2 S1 S0
A
P
Fixed at 1100
Selectable Via Input Terminals
0 = Write Shift Register
22H (0010 0010)
Output Data to the TPIC2810 Device
Occurs After Valid Address Byte and After the Subaddress Byte
Case 3: Read serial data and load output storage register
This case loads the data shift register with data via the I2C interface and transfers the data to output storage
register, if R/W = 0. The transfer occurs during the acknowledge bit following the data byte. Data byte and
transfer to the output register is ignored if R/W = 1.
Slave Address and R/W = 0
S
G3 G2 G1 G0 A2 A1 A0 RW A
G[3:0]:
A[2:0]:
RW:
Subaddress:
Data:
Acknowledge:
Subaddress 44H
S7 S6 S5 S4 S3 S2 S1 S0
Data to Slave
A
D7 D6 D5 D4 D3 D2 D1 D0
A
P
Fixed at 1100
Selectable Via Input Terminals
0 = Write Shift Register
44H (0100 0100)
Output Data to the TPIC2810 Device
Occurs After Valid Address Byte, After the Subaddress Byte and After the Data Byte
Case 4: Undefined subaddress values
S
Slave Address and R/W = x
Subaddress Undefined
G3 G2 G1 G0 A2 A1 A0 RW A
S7 S6 S5 S4 S3 S2 S1 S0 NA
G[3:0]:
A[2:0]:
RW:
Subaddress:
Data:
Acknowledge:
Don’t Care
P
Fixed at 1100
Selectable Via Input Terminals
Don’t Care
All Bit Combinations Except 11H, 22H, and 44H
Don’t Care; Data Is Ignored
Occurs After Valid Address Byte, But Is Not Issued After an Undefined Subaddress Byte or After the Data Byte
Following an Undefined Subaddress Byte
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TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
PRINCIPLES OF OPERATION
I2C bus operation
The I2C bus is a communications link between a controller and a series of slave terminals. The link is established
using a two-wire bus consisting of a serial clock signal (SCL) and a serial data signal (SDA). The serial clock
is sourced from the controller in all cases where the serial data signal is bidirectional for data communication
between the controller and the slave terminals. Each device has an open drain output to transmit data on the
serial data line. An external pullup resistor must be placed on the serial data signal to provide the high level
portion of the data transmission.
Data transmission is initiated with a start bit from the controller as shown in Figure 10. Both the SCL and SDA
signals must remain in a logic high state when the controller is not communicating with the slave devices. A start
condition is recognized by the slave devices when the SDA line transitions from high to low during the high
portion of the SCL signal. Upon reception of a start bit, the TPIC2810 device receives serial data on the SDA
input and check for valid address and control information. If the appropriate group and address bits are set for
the device, then the device issues an acknowledge pulse and prepares the receive subaddress data. The group
ID for the TPIC2810 device is hard coded to be 1100. The slave address bits are set to correspond to the A(0:2)
inputs for the device. Up to eight TPIC2810 devices can be placed on the bus. Subaddress data is decoded and
responded to as per the TPIC2810 subaddress and I 2C protocol definition section of this data sheet. Data
transmission is complete by either the reception of a stop condition or the reception of the data word sent to
the device. A stop condition is recognized as a low-to-high transition of the SDA input during the high portion
of the SCL signal. All other transitions of the SDA line must occur during the low portion of the SCL signal.
An acknowledge is issued by the TPIC2810 device after the reception of valid address, subaddress and data
words as per the TPIC2810B subaddress and I 2C protocol definition section of this document. Reference
Figure 10. The device acknowledges each byte of data that it receives from the controller.
...
SDA
SCL
1
2
3
4
5
6
7
8
9
Acknowledge
Start Condition
Figure 10. Start/Stop/Acknowledge Protocol
16
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...
Stop Condition
TPIC2810
8-BIT LED DRIVER WITH I2C INTERFACE
SLIS109A – DECEMBER 2001 – REVISED SEPTEMBER 2002
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
8 PINS SHOWN
0.020 (0,51)
0.014 (0,35)
0.050 (1,27)
8
0.010 (0,25)
5
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
1
4
0.010 (0,25)
0°– 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
PINS **
0.004 (0,10)
8
14
16
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MIN
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
DIM
4040047/E 09/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
Falls within JEDEC MS-012
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17
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