SCLS068E − NOVEMBER 1988 − REVISED AUGUST 2003
Operating Voltage Range of 4.5 V to 5.5 V
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 80-µA Max ICC
Typical tpd = 12 ns
±4-mA Output Drive at 5 V
Low Input Current of 1 µA Max
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
SN54HCT273 . . . FK PACKAGE
(TOP VIEW)
VCC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
2D
2Q
3Q
3D
4D
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
8D
7D
7Q
6Q
6D
4Q
GND
CLK
5Q
5D
CLR
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
Inputs Are TTL-Voltage Compatible
Contain Eight D-Type Flip-Flops
Direct Clear Input
Applications Include:
− Buffer/Storage Registers
− Shift Registers
− Pattern Generators
1D
1Q
CLR
VCC
SN54HCT273 . . . J OR W PACKAGE
SN74HCT273 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
D
D
D
D
8Q
D
D
D
D
D
D
description/ordering information
These devices are positive-edge-triggered D-type flip-flops with a common enable input. The ’HCT273 devices
are similar to the ’HCT377 devices, but feature a common clear enable (CLR) input instead of a latched clock.
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the
positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not
directly related to the positive-going pulse. When CLK is at either the high or low level, the D input has no effect
at the output. The circuits are designed to prevent false clocking by transitions at CLR.
ORDERING INFORMATION
PACKAGE†
TA
PDIP − N
SN74HCT273N
Tube of 25
SN74HCT273DW
Reel of 2000
SN74HCT273DWR
SOP − NS
Reel of 2000
SN74HCT273NSR
HCT273
SSOP − DB
Reel of 2000
SN74HCT273DBR
HT273
Tube of 70
SN74HCT273PW
Reel of 2000
SN74HCT273PWR
Reel of 250
SN74HCT273PWT
CDIP − J
Tube of 20
SNJ54HCT273J
SNJ54HCT273J
CFP − W
Tube of 85
SNJ54HCT273W
SNJ54HCT273W
LCCC − FK
Tube of 55
SNJ54HCT273FK
TSSOP − PW
−55°C
−55
C to 125
125°C
C
TOP-SIDE
MARKING
Tube of 20
SOIC − DW
−40°C to 85°C
ORDERABLE
PART NUMBER
SN74HCT273N
HCT273
HT273
SNJ54HCT273FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
!"#$ $%$ $&'"%$ !''#$ % & (!)*%$ %#+ '! $&'" (#&%$ (#' # #'" & #,% $'!"#$ %$%' -%''%$.+
'!$ ('#$/ # $ $##%'*. $*!# #$/ & %**
(%'%"##'+
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCLS068E − NOVEMBER 1988 − REVISED AUGUST 2003
FUNCTION TABLE
(each flip-flop)
INPUTS
CLR
CLK
D
OUTPUT
Q
L
X
X
L
H
↑
H
H
H
↑
L
L
H
L
X
Q0
logic diagram (positive logic)
1D
CLK
2D
3
11
3D
4
1D
1D
C1
5D
8
1D
C1
R
CLR
4D
7
1D
C1
R
6D
13
1D
C1
R
7D
14
1D
C1
R
8D
17
1D
C1
R
18
1D
C1
R
C1
R
R
1
2
1Q
5
6
2Q
3Q
9
12
4Q
15
5Q
6Q
16
7Q
19
8Q
logic diagram, each flip-flop (positive logic)
D
C
C
TG
TG
Q
C
C
C
C
TG
CLK(I)
TG
C
C
C
C
R
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCLS068E − NOVEMBER 1988 − REVISED AUGUST 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HCT273
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
Input voltage
0
VO
∆t/∆v
Output voltage
0
High-level input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
SN74HCT273
2
2
Input transition rise/fall time
V
V
0.8
VCC
VCC
UNIT
0
0
500
0.8
V
VCC
VCC
V
500
ns
V
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C
MIN
TYP
MAX
SN54HCT273
MIN
MAX
SN74HCT273
MIN
MAX
UNIT
4.4
4.499
4.4
4.4
VI = VIH or VIL
IOH = −20 µA
IOH = −4 mA
4.5 V
VOH
4.5 V
3.98
4.30
3.7
3.84
0.001
0.1
0.1
0.1
VI = VIH or VIL
IOL = 20 µA
IOL = 4 mA
4.5 V
VOL
4.5 V
0.17
0.26
0.4
0.33
II
ICC
VI = VCC or 0
VI = VCC or 0,
5.5 V
±0.1
±100
±1000
±1000
nA
8
160
80
µA
1.4
2.4
3
2.9
mA
3
10
10
10
pF
∆ICC‡
IO = 0
One input at 0.5 V or 2.4 V,
Other inputs at 0 or VCC
Ci
5.5 V
5.5 V
4.5 V
to 5.5 V
V
V
‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or VCC.
0 $&'"%$ $#'$ ('! $ # &'"%1# '
#/$ (%# & #1#*("#$+ %'%#' %% %$ #'
(#&%$ %'# #/$ /%*+ #,% $'!"#$ '##'1# # '/ %$/# ' $$!# ## ('! -! $#+
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SCLS068E − NOVEMBER 1988 − REVISED AUGUST 2003
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
fclock
Clock frequency
CLK high or low
tw
Pulse duration
CLR low
Data
tsu
Setup time before CLK↑
CLR inactive
th
Hold time data after CLK↑
TA = 25°C
MIN
MAX
SN54HCT273
VCC
4.5 V
25
16
20
5.5 V
28
19
23
MIN
SN74HCT273
MAX
MIN
4.5 V
20
30
25
5.5 V
18
25
22
4.5 V
16
24
20
5.5 V
14
20
17
4.5 V
20
30
25
5.5 V
17
25
21
4.5 V
20
30
25
5.5 V
17
25
21
4.5 V
0
0
0
5.5 V
0
0
0
MAX
UNIT
MHz
ns
ns
ns
switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V,
CL = 50 pF (unless otherwise noted) (see Figure 1)
SN54HCT273
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
MIN
fmax
tpd
CLR
Any
tPHL
CLR
Any
tt
Any
TA = 25°C
TYP
MAX
MIN
4.5 V
25
31
16
5.5 V
28
37
19
MAX
UNIT
MHz
4.5 V
15
34
50
5.5 V
12
29
42
4.5 V
17
15
50
5.5 V
15
34
42
4.5 V
8
18
22
5.5 V
7
19
21
ns
ns
ns
switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V,
CL = 50 pF (unless otherwise noted) (see Figure 1)
SN74HCT273
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
fmax
tpd
CLR
Any
tPHL
CLR
Any
tt
Any
VCC
POST OFFICE BOX 655303
MIN
4.5 V
25
31
20
5.5 V
28
37
23
MAX
15
34
42
5.5 V
12
29
36
4.5 V
17
34
42
5.5 V
15
29
36
4.5 V
8
15
19
5.5 V
7
14
17
• DALLAS, TEXAS 75265
UNIT
MHz
4.5 V
0 $&'"%$ $#'$ ('! $ # &'"%1# '
#/$ (%# & #1#*("#$+ %'%#' %% %$ #'
(#&%$ %'# #/$ /%*+ #,% $'!"#$ '##'1# # '/ %$/# ' $$!# ## ('! -! $#+
4
TA = 25°C
MIN
TYP
MAX
ns
ns
ns
SCLS068E − NOVEMBER 1988 − REVISED AUGUST 2003
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance
No load
TYP
30
UNIT
pF
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
Test
Point
3V
High-Level
Pulse
1.3 V
0V
CL = 50 pF
(see Note A)
tw
1.3 V
1.3 V
0V
3V
1.3 V
3V
Low-Level
Pulse
LOAD CIRCUIT
Input
1.3 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.3 V
0V
tPLH
In-Phase
Output
1.3 V
10%
tPHL
90%
90%
tr
Out-ofPhase
Output
tPHL
90%
VOH Reference
1.3 V
Input
10% V
OL
tf
tPLH
1.3 V
10%
1.3 V
10%
90%
tf
VOH
Data
Input 1.3 V
0.3 V
3V
1.3 V
0V
tsu
2.7 V
VOL
tr
tr
VOLTAGE WAVEFORMS
SETUP AND HOLD AND INPUT RISE AND FALL TIMES
th
2.7 V
3V
1.3 V
0.3 V 0 V
tf
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT RISE AND FALL TIMES
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time with one input transition per measurement.
D. For clock inputs, fmax is measured when the input duty cycle is 50%.
E. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74HCT273DBLE
OBSOLETE
SSOP
DB
20
SN74HCT273DBR
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273DBRE4
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273DBRG4
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273DW
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273DWE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273DWG4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273DWR
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273DWRE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273DWRG4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273N
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74HCT273NE4
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74HCT273NSR
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273NSRE4
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273NSRG4
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273PW
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273PWE4
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273PWG4
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273PWLE
OBSOLETE
TSSOP
PW
20
TBD
Call TI
SN74HCT273PWR
ACTIVE
TSSOP
PW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273PWRE4
ACTIVE
TSSOP
PW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273PWRG4
ACTIVE
TSSOP
PW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273PWT
ACTIVE
TSSOP
PW
20
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273PWTE4
ACTIVE
TSSOP
PW
20
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCT273PWTG4
ACTIVE
TSSOP
PW
20
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TBD
Addendum-Page 1
Lead/Ball Finish
Call TI
MSL Peak Temp (3)
Call TI
Call TI
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-May-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SN74HCT273DBR
SSOP
DB
20
2000
330.0
16.4
8.2
7.5
2.5
12.0
16.0
Q1
SN74HCT273DWR
SOIC
DW
20
2000
330.0
24.4
10.8
13.0
2.7
12.0
24.0
Q1
SN74HCT273NSR
SO
NS
20
2000
330.0
24.4
8.2
13.0
2.5
12.0
24.0
Q1
SN74HCT273PWR
TSSOP
PW
20
2000
330.0
16.4
6.95
7.1
1.6
8.0
16.0
Q1
SN74HCT273PWT
TSSOP
PW
20
250
330.0
16.4
6.95
7.1
1.6
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-May-2011
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74HCT273DBR
SN74HCT273DWR
SSOP
DB
20
2000
346.0
346.0
33.0
SOIC
DW
20
2000
346.0
346.0
41.0
SN74HCT273NSR
SO
NS
20
2000
346.0
346.0
41.0
SN74HCT273PWR
TSSOP
PW
20
2000
346.0
346.0
33.0
SN74HCT273PWT
TSSOP
PW
20
250
346.0
346.0
33.0
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
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Applications
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www.ti.com/audio
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Amplifiers
amplifier.ti.com
Computers and Peripherals
www.ti.com/computers
Data Converters
dataconverter.ti.com
Consumer Electronics
www.ti.com/consumer-apps
DLP® Products
www.dlp.com
Energy and Lighting
www.ti.com/energy
DSP
dsp.ti.com
Industrial
www.ti.com/industrial
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www.ti.com/clocks
Medical
www.ti.com/medical
Interface
interface.ti.com
Security
www.ti.com/security
Logic
logic.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Power Mgmt
power.ti.com
Transportation and
Automotive
www.ti.com/automotive
Microcontrollers
microcontroller.ti.com
Video and Imaging
www.ti.com/video
RFID
www.ti-rfid.com
Wireless
www.ti.com/wireless-apps
RF/IF and ZigBee® Solutions
www.ti.com/lprf
TI E2E Community Home Page
e2e.ti.com
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