LS832 MONOLITHIC DUAL N-CHANNEL JFET Linear Systems Ultra Low Leakage Low Drift Monolithic Dual JFET The LS832 is a high-performance monolithic dual JFET featuring extremely low noise, tight offset voltage and low drift over temperature specifications, and is targeted for use in a wide range of precision instrumentation applications. The LS832 features a 25mV offset and 20-µV/°C drift. The 8 Pin P-DIP and 8 Pin SOIC provide ease of manufacturing, and the symmetrical pinout prevents improper orientation. (See Packaging Information). LS832 Applications: Wideband Differential Amps High-Speed,Temp-Compensated SingleEnded Input Amps High-Speed Comparators Impedance Converters and vibrations detectors. ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted) SYMBOL CHARACTERISTICS MIN. BVGSS Breakdown Voltage 40 BVGGO Gate‐To‐Gate Breakdown 40 TRANSCONDUCTANCE YfSS Full Conduction 70 YfS Typical Operation 50 |YFS1‐2 / Y FS| Mismatch ‐‐ DRAIN CURRENT IDSS Full Conduction 0.5 |IDSS1‐2 / IDSS| Mismatch at Full Conduction ‐‐ GATE VOLTAGE VGS(off) or Vp Pinchoff voltage 0.6 VGS(on) Operating Range ‐‐ GATE CURRENT ‐IGmax. Operating ‐‐ ‐IGmax. High Temperature ‐‐ ‐IGSSmax. At Full Conduction ‐‐ ‐IGSSmax. High Temperature 5 IGGO Gate‐to‐Gate Leakage ‐‐ OUTPUT CONDUCTANCE YOSS Full Conduction ‐‐ YOS Operating ‐‐ COMMON MODE REJECTION CMR ‐20 log | V GS1‐2/ V DS| ‐‐ ‐20 log | V GS1‐2/ V DS| ‐‐ NOISE NF Figure ‐‐ en Voltage ‐‐ CAPACITANCE CISS Input ‐‐ CRSS Reverse Transfer ‐‐ CDD Drain‐to‐Drain ‐‐ FEATURES ULTRA LOW DRIFT | V GS1‐2 / T| ≤20µV/°C ULTRA LOW LEAKAGE IG = 80fA TYP. LOW NOISE en = 70nV/√Hz TYP. LOW CAPACITANCE CISS = 3pF MAX. ABSOLUTE MAXIMUM RATINGS @ 25°C (unless otherwise noted) Maximum Temperatures Storage Temperature ‐65°C to +150°C Operating Junction Temperature +150°C Maximum Voltage and Current for Each Transistor – Note 1 ‐VGSS Gate Voltage to Drain or Source 40V ‐VDSO Drain to Source Voltage 40V ‐IG(f) Gate Forward Current 10mA ‐IG Gate Reverse Current 10µA Maximum Power Dissipation Device Dissipation @ Free Air – Total 400mW @ +125°C MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED SYMBOL CHARACTERISTICS VALUE UNITS CONDITIONS | V GS1‐2 / T| max. DRIFT VS. 20 µV/°C VDG=10V, ID=30µA TEMPERATURE TA=‐55°C to +125°C | V GS1‐2 | max. OFFSET VOLTAGE 25 mV VDG=10V, ID=30µA TYP. 60 ‐‐ 300 100 0.6 ‐‐ 1 2 ‐‐ ‐‐ ‐‐ ‐‐ 5 1 ‐‐ ‐‐ 90 90 ‐‐ 20 ‐‐ ‐‐ ‐‐ MAX. ‐‐ ‐‐ 500 200 3 10 5 4.5 4 0.1 0.1 0.2 0.5 ‐‐ 5 0.5 ‐‐ ‐‐ 1 70 3 1.5 0.1 UNITS V V µmho µmho % mA % V V pA nA pA nA pA µmho µmho dB CONDITIONS VDS = 0 ID=1nA I G= 1nA ID= 0 IS= 0 VDG= 10V VGS= 0V f = 1kHz VDG= 10V ID= 30µA f = 1kHz VDG= 10V VGS= 0V VDS= 10V ID= 1nA VDS=10V ID=30µA VDG= 10V ID= 30µA TA= +125°C VDS =0 VGS= 0V, VGS= ‐20V, TA= +125°C VGG = 20V VDG= 10V VGS= 0V VDG= 10V ID= 30µA ∆VDS = 10 to 20V ID=30µA ∆VDS = 5 to 10V ID=30µA VDS= 10V VGS= 0V RG= 10MΩ f= 100Hz NBW= 6Hz VDS=10V ID=30µA f=10Hz NBW=1Hz VDS= 10V, VGS= 0V, f= 1MHz VDS= 10V, VGS= 0V, f= 1MHz VDS= 10V, ID=30µA Click To Buy Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired dB nV/√Hz pF pF pF PDIP & SOIC (Top View) Available Packages: LS832 / LS832 in PDIP & SOIC LS832 / LS832 available as bare die Please contact Micross for full package and die dimensions Tel: +44 1603 788967 Email: [email protected] Web: http://www.micross.com/distribution Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.