FEDR27V3252J-01-02 OKI Semiconductor MR27V3252J 2M–Word × 16–Bit or 4M–Word × 8–Bit Page Mode Issue Date: Jul. 9, 2004 OTP GENERAL DESCRIPTION PIN CONFIGURATION (TOP VIEW) The MR27V3252J is a 32 Mbit electrically One Time Programmable Read-Only Memory with page mode. Its configuration can be electrically switched between 2,097,152-word × 16-bit and 4,194,304-word × 8-bit by the state of the BYTE# pin. The MR27V3252J supports high speed asynchronous read operation using a single 3.3V power supply. FEATURES · 2,097,152-word × 16-bit / 4,194,304-word × 8-bit electrically switchable configuration · Page size of 8-word x 16-Bit or 16-word x 8-Bit · 3.0 V to 3.6 V power supply · Random Access time 70 ns MAX · Page Access time 25 ns MAX · Operating current 50 mA MAX · Standby current 10 µA MAX · Input/Output TTL compatible · Three-state output A15 A14 A13 A12 A11 A10 A9 A8 A19 A20 NC NC NC NC NC A18 A17 A7 A6 A5 A4 A3 A2 A1 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 19 30 20 29 21 28 22 27 23 26 24 25 A16 BYTE#/VPP VSS D15/A–1 D7 D14 D6 D13 D5 D12 D4 VCC D11 D3 D10 D2 D9 D1 D8 D0 OE# VSS CE# A0 48TSOP(Type-I) PACKAGES ·MR27V3252JTN 48-pin plastic TSOP (TSOP I 48-P-1220-0.50-1K) 1/12 FEDR27V3252J-01-02 OKI Semiconductor MR27V3252J / OTP BLOCK DIAGRAM A–1 × 8/× 16 Switch CE OE BYTE#/VPP Row Decoder OE# Memory Cell Matrix 2M × 16-Bit or 4M × 8-Bit Column Decoder Address Buffer A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 CE# Multiplexer Output Buffer D0 D2 D1 D4 D3 D6 D5 D8 D7 D10 D9 D12 D11 D14 D13 D15 In 8-bit output mode, these pins are placed in a high-Z state and pin D15 functions as the A-1 address pin. PIN DESCRIPTIONS Pin name Functions D15 / A–1 Data output / Address input A0 to A20 Address inputs D0 to D14 Data outputs CE# Chip enable input OE# Output enable input BYTE#/VPP Mode switch/Program power supply voltage VCC Power supply voltage VSS Ground NC No connect 2/12 FEDR27V3252J-01-02 OKI Semiconductor MR27V3252J / OTP FUNCTION TABLE Mode CE# OE# BYTE# Read (16-Bit) L L H Read (8-Bit) L L Output disable L H Standby H ∗ Program L H Program inhibit H H Program verify H L VCC D0 to D7 D8 to D14 D15/A–1 DOUT L DOUT H Hi–Z Hi–Z 3.3 V L L/H H ∗ Hi–Z L ∗ DIN VCC VPP Hi–Z DOUT ∗: Don’t Care (H or L) ABSOLUTE MAXIMUM RATINGS Parameter Symbol Operating temperature under bias Ta Storage temperature Condition — Tstg Value Unit 0 to 70 °C –55 to 125 °C Input voltage VI –0.5 to VCC+0.5 V Output voltage VO –0.5 to VCC+0.5 V Power supply voltage VCC –0.5 to 5 V Program power supply voltage VPP –0.5 to 11.5 V Power dissipation per package PD Ta = 25°C 1.0 W Output short circuit current IOS — 10 mA relative to VSS RECOMMENDED OPERATING CONDITIONS (Ta = 0 to 70°C) Parameter Symbol VCC power supply voltage VCC VPP power supply voltage VPP Input “H” level VIH Condition VCC = 3.0 to 3.6 V Min. Typ. Max. Unit 3.0 — 3.6 V VCC+0.5 V — VCC+0.5∗ V — 0.6 V –0.5 2.2 Input “L” level VIL –0.5∗∗ Voltage is relative to VSS. ∗ : Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns. ∗∗ : -1.5V(Min.) when pulse width of undershoot is less than 10ns. PIN CAPACITANCE (VCC = 3.3 V, Ta = 25°C, f = 1 MHz) Parameter Symbol Input CIN1 BYTE#/VPP CIN2 Output COUT Condition VI = 0 V VO = 0 V Min. Typ. Max. — — 8 — — 200 — — 10 Unit pF 3/12 FEDR27V3252J-01-02 OKI Semiconductor MR27V3252J / OTP ELECTRICAL CHARACTERISTICS DC Characteristics (VCC = 3.0 V to 3.6 V, Ta = 0 to 70°C) Symbol Condition Min. Typ. Max. Unit Input leakage current Parameter ILI VI = 0 to VCC — — 5 µA Output leakage current ILO VO = 0 to VCC — — 5 µA VCC power supply current ICCSC CE# = VCC — — 10 µA (Standby) ICCST CE# = VIH — — 1 mA ICCA1 OE# = VIH, f = 10MHz — — 50 mA VPP power supply current IPP VPP = VCC — — 10 µA Input “H” level VIH — 2.2 — VCC+0.5∗ V Input “L” level VIL — –0.5∗∗ — 0.6 V Output “H” level VOH IOH = –1 mA 2.4 — — V Output “L” level VOL IOL = 2 mA — — 0.4 V VCC power supply current (Read) Voltage is relative to VSS. ∗ : Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns. ∗∗ : -1.5V(Min.) when pulse width of undershoot is less than 10ns. AC Characteristics (VCC = 3.0 V to 3.6 V, Ta = 0 to 70°C) Parameter Symbol Condition Min. Max. Unit tC — 70 — ns Address access time tACC CE# = OE# = VIL — 70 ns Page cycle time tPC — 25 — ns Page access time tPAC — — 25 ns CE# access time tCE OE# = VIL — 70 ns OE# access time tOE CE# = VIL — 25 ns tCHZ OE# = VIL 0 20 ns tOHZ CE# = VIL 0 20 ns tOH CE# = OE# = VIL 0 — ns Address cycle time Output disable time Output hold time Measurement conditions Input signal level --------------------------------------0 V/3.0 V Input timing reference level-------------------------1/2Vcc Output load ---------------------------------------------50 pF Output timing reference level ----------------------1/2Vcc Output load Output 50 pF (Including scope and jig) 4/12 FEDR27V3252J-01-02 OKI Semiconductor MR27V3252J / OTP TIMING CHART (READ CYCLE) Random Access Mode Read Cycle tC tC Address tOH tACC tCE CE# tCHZ tOE tOH OE# tOHZ tACC Dout Valid Data Valid Data Hi-Z Hi-Z Page Access Mode Read Cycle tC A3 to A20 tPC tPC A-1 to A2 (Byte mode) A0 to A2 (Word mode) tCE tOH CE# tOE tCHZ OE# tACC tPAC tPAC tOHZ Dout Hi-Z Hi-Z 5/12 FEDR27V3252J-01-02 OKI Semiconductor MR27V3252J / OTP ELECTRICAL CHARACTERISTICS (PROGRAMMING OPERATION) DC CHARACTERISTICS (Ta = 25°C ± 5°C) Parameter Symbol Condition Min. Typ. Max. Unit ILI VI = VCC+0.5 V — — 10 µA VPP power supply current (Program) IPP2 CE# = VIL — — 50 mA VCC power supply current ICC — — — 50 mA Input “H” level VIH — VCC-0.5 — VCC+0.5 V Input leakage current Input “L” level VIL — –0.5 — 0.8 V Output “H” level VOH IOH = –400 µA 2.4 — — V Output “L” level VOL IOL = 2.1 mA — — 0.45 V Program voltage VPP — 8.0 8.2 8.4 V VCC power supply voltage VCC — 3.9 4.0 4.1 V Voltage is relative to VSS. AC CHARACTERISTICS (VCC = 4.0 V ± 0.1 V, BYTE#/VPP = 8.2 V ± 0.25 V, Ta = 25°C ± 5°C) Symbol Condition Min. Typ. Max. Unit Address set-up time Parameter tAS — 100 — — ns OE# set-up time tOES — 2 — — µs Data set-up time tDS — 100 — — ns Address hold time tAH — 2 — — µs Data hold time tDH — 100 — — ns Output float delay time from OE# tOHZ — 0 — 100 ns VPP voltage set-up time tVS — 2 — — µs Program pulse width tPW — 7 8 9 µs Data valid from OE# tOE — — — 100 ns Address hold from OE# high tAOH — 0 — — ns Pin Check Function Pin Check Function is to check contact between each device-pin and each socket-lead with EPROM programmer. Setting up address as following condition call the preprogrammed codes on device outputs. (VCC = 3.0 V ± 0.1 V, CE# = VIL, OE# = VIL, BYTE#/VPP = VIH, Ta = 25°C ± 5°C) A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 0 1 0 1 0 1 0 1 0 VH 0 1 0 1 0 1 0 0 1 1 0 FF00 1 0 1 0 1 0 1 0 1 VH 1 0 1 0 1 0 1 1 0 0 1 00FF Other conditions DATA FFFF ∗: VH = 7 V ± 0.25 V 6/12 FEDR27V3252J-01-02 OKI Semiconductor MR27V3252J / OTP Consecutive Programming Waveforms A0 to A20 tAS tAH CE# tPW High OE# tDH tDS Din D0 to D15 Din tVS BYTE#/Vpp Consecutive Program Verify Waveforms A0 to A20 High CE# tACC tAHO OE# tOE D0 to D15 BYTE#/Vpp tOHZ Dout Dout 8.2 V 7/12 FEDR27V3252J-01-02 OKI Semiconductor MR27V3252J / OTP Program and Program Verify Cycle Waveforms A0 to A20 tAS tAHO CE# tPW tOES OE# tOHZ D0 to D15 BYTE#/Vpp tDH tDS tOE tOHZ Dout Din 8.2 V 8/12 FEDR27V3252J-01-02 OKI Semiconductor MR27V3252J / OTP Programming Flow Chart Start Address = First Location VCC = 4.0 V VPP = 8.2 V Program 10 µs Increment Address NO Last Address? YES Address = First Location VCC = 4.0 V/VPP = 4.0V Read(One Word) NG PASS Increment Address NO Last Address? YES Address = First Location VCC = 2.7 V/VPP = 2.7V Read(One Word) NG PASS Increment Address NO Last Address? YES Device Passed Device Failed 9/12 FEDR27V3252J-01-02 OKI Semiconductor MR27V3252J / OTP PACKAGE DIMENSIONS (Unit: mm) TSOP(1)48-P-1220-0.50-1K Mirror finish 5 Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised Epoxy resin 42 alloy Solder plating (≥5µm) 0.55 TYP. 1/Dec. 2, 1999 Notes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 10/12 FEDR27V3252J-01-02 OKI Semiconductor MR27V3252J / OTP REVISION HISTORY Document Page Description Date Previous Edition Current Edition FEDR27V3252J-01-01 Mar. 26, 2004 – – Final edition 1 FEDR27V3252J-01-02 Jul. 9, 2004 3 3 Add PD condition and IOS = 10mA No. 11/12 FEDR27V3252J-01-02 OKI Semiconductor MR27V3252J / OTP NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party’s right which may result from the use thereof. 6. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not, unless specifically authorized by Oki, authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. No part of the contents contained herein may be reprinted or reproduced without our prior permission. Copyright 2004 Oki Electric Industry Co., Ltd. 12/12