PRELIMINARY SPECIFICATION PE9303 3.5 GHz Low Power CMOS Divide-by-8 Prescaler For RAD-Hard Applications Product Description The PE9303 is a high performance monolithic CMOS prescaler with a fixed divide ratio of 8. Its operating frequency range is 1.5 GHz to 3.5 GHz. The PE9303 operates on a nominal 3 V supply and draws only 14 mA. It is packaged in a small 8-lead pre-formed flat pack and is ideal for space applications. Features • High-frequency operation: 1.5 GHz to 3.5 GHz • Fixed divide ratio of 8 • Low-power operation: 14 mA typical @ 3 V across frequency • Small package: 8-lead formed flat pack The PE9303 is manufactured in Peregrine’s patented Ultra Thin Silicon (UTSi®) CMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. Product Benefits Figure 1. Package Drawings • SEL Immune due to UTSi CMOS • SEU <10-10 errors / bit-day • 100 Krads (Si) Total Dose .380 / .400 .220 / .250 .180 SQ Max .166 SQ Pin 1 .050 TYP .150 .015 +-.002 TYP Table 1. Electrical Specifications @ +25 °C (ZS = ZL = 50 Ω) Parameter Supply Voltage Minimum Typical Maximum Units 2.85 3.0 3.15 V 14 17 mA Supply Current Input Frequency (FIN) 1.5 3.5 GHz Input Power (PIN) -10 +5 dBm Output Power -5 PEREGRINE SEMICONDUCTOR CORP. | http://www.peregrine-semi.com dBm Copyright Peregrine Semiconductor Corp. 2003 Page 1 of 6 PE9303 Preliiminary Specification Figure 2. Pin Configuration VDD 1 IN 2 Electrostatic Discharge (ESD) Precautions 8 GND 7 OUT When handling this UTSi device, observe the same precautions that you would use with other ESDsensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 3. PE9303 DEC 3 6 GND GND 4 5 GND Latch-Up Avoidance Unlike conventional CMOS devices, UTSi CMOS devices are immune to latch-up. Table 2. Pin Descriptions Pin No. Pin Name 1 VDD Power supply pin. Bypassing is required. 2 IN Input signal pin. Should be coupled with a capacitor (eg 15 pF). 3 DEC Power supply decoupling pin. Place capacitors as close as possible and connect directly to the ground plane (eg 10 nF & 10 pF). 4 GND Ground pin. Ground pattern on the board should be as wide as possible to reduce ground impedance. 5 GND Ground pin. 6 GND Ground pin. 7 OUT Divided frequency output pin. This pin should be coupled with a capacitor (eg 100 pF). 8 GND Ground Pin. Device Functional Considerations Description The PE9303 takes an input signal frequency from between 1.5 GHz to 3.5 GHz and produces an output signal frequency one-fourth that of the supplied input. In order for the prescaler to work properly, several conditions need to be adhered to. It is crucial that pin 3 be supplied with a bypass capacitor to ground. In addition, the input and output signals (pins 2 & 7, respectively) need to be ac coupled via an external capacitor as shown in the test circuit below. The ground pattern on the board should be made as wide as possible to minimize ground impedance. Table 3. Absolute Maximum Ratings Symbol VDD Parameter/Conditions Min Supply voltage Max Units 4.0 V TST Storage temperature range -65 150 °C TOP Operating temperature range -40 85 °C VESD ESD voltage (Human Body Model) 250 V PINMAX Maximum input power 10 dBm Copyright Peregrine Semiconductor Corp. 2003 Page 2 of 6 File No. 70/0052~01A | UTSi CMOS RFIC SOLUTIONS PE9303 Preliminary Specification Figure 3. Test Circuit Block Diagram VDD 3 V +/- 0.15 V DC 10 pF 1 nF 1 8 15 pF 50 Ohm 100 pF 2 50 Ohm 7 PE9303 AC 10 nF 10 pF 3 6 4 5 Spectrum Analyzer Signal Generator Figure 4. High Frequency System Application The wideband frequency of operation of the PE9303 makes it an ideal part for use in a DBS down converter system. INPUT st DBS 1 IF BPF SAW AGC FM DEMOD BASEBAND OUTPUT DIVIDE BY 8 PE9701 PE9303 LOW NOISE PLL SYNTH LPF PEREGRINE SEMICONDUCTOR CORP. | http://www.peregrine-semi.com Copyright Peregrine Semiconductor Corp. 2003 Page 3 of 6 PE9303 Preliiminary Specification Evaluation Board Description Figure 5. PE9303 Evaluation Board The PE9303 evaluation board is depicted in Figure 5. The input is driven into the RF In port while the divided output is taken at Out 1. Both input and output contain footprints for AC coupling capacitors (C3 and C1 respectively). The power supply connection is provided near the top of the evaluation board, J2 Pin 1 as supply, J2 Pin 2 as ground. In addition C2, C5, and C10 are placeholders for power supply decoupling capacitors. Placeholders C4, C6, and C8 are needed for required bypass capacitors. Note: C4 and C6 are located on the underside of the evaluation board. Evaluation Board Test Setup Applications Support The PE9303 can be tested on the evaluation board using the test setup shown in Figure 3 on page 3. In the test setup, it is essential that the power supply is properly decoupled and bypass capacitors are used for pin 3. In addition, the input and output need to be AC coupled. If you have a problem with your evaluation kit or if you have applications questions call (858) 455-0660 and ask for applications support. You may also contact us by fax or e-mail: Fax: (858) 455-0770 E-Mail: [email protected] Testing The PE9303 Evaluation Board was measured prior to shipment using the setup depicted in Figure 3. Testing was performed at room temperature and VDD = 2.85 V. The input sensitivity plot for the PE9303 board is included with the evaluation kit. Copyright Peregrine Semiconductor Corp. 2003 Page 4 of 6 File No. 70/0052~01A | UTSi CMOS RFIC SOLUTIONS PE9303 Preliminary Specification Table 4. Ordering Information Order Code Part Marking Description Package Shipping Method 9303-01 9303 PE9303-08CFPJ-B Engineering Samples 8-lead FLAT PACK 50 / Tray 9303-11 9303 PE9303-08CFPJ-B Production Units 8-lead FLAT PACK 50 / Tray 9303-00 PE9303-EK PE9302 Evaluation Kit Evaluation Board 1 / Box PEREGRINE SEMICONDUCTOR CORP. | http://www.peregrine-semi.com Copyright Peregrine Semiconductor Corp. 2003 Page 5 of 6 PE9303 Preliiminary Specification Sales Offices United States Japan Peregrine Semiconductor Corp. Peregrine Semiconductor K.K. 6175 Nancy Ridge Drive San Diego, CA 92121 Tel 1-858-455-0660 Fax 1-858-455-0770 5A-5, 5F Imperial Tower 1-1-1 Uchisaiwaicho, Chiyoda-ku Tokyo 100-0011 Japan Tel: 03-3507-5755 Fax: 03-3507-5601 Europe Peregrine Semiconductor Europe Aix-En-Provence Office Parc Club du Golf, bat 9 13856 Aix-En-Provence Cedex 3 France Tel 33-0-4-4239-3360 Fax 33-0-4-4239-7227 For a list of representatives in your area, please refer to our Web site at: http://www.peregrine-semi.com Data Sheet Identification Advance Information The information in this data sheet is believed to be reliable. However, The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out Product Specification of the use of its products in such applications. The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a PCN (Product Change Notice). Peregrine products are protected under one or more of the following U.S. patents: 6,090,648; 6,057,555; 5,973,382; 5,973,363; 5,930,638; 5,920,233; 5,895,957; 5,883,396; 5,864,162; 5,863,823; 5,861,336; 5,663,570; 5,610,790; 5,600,169; 5,596,205; 5,572,040; 5,492,857; 5,416,043. Other patents are pending. Peregrine, SEL Safe, the Peregrine logotype, Peregrine Semiconductor Corp. and UTSi are registered trademarks of Peregrine Semiconductor Corp. Copyright © 2003 Peregrine Semiconductor Corp. All rights reserved. Copyright Peregrine Semiconductor Corp. 2003 Page 6 of 6 File No. 70/0052~01A | UTSi CMOS RFIC SOLUTIONS