PEREGRINE PE9312

Product Specification
PE9312
1500 MHz Low Power UltraCMOS™
Divide-by-4 Prescaler
Rad hard for Space Applications
Product Description
The PE9312 is a high-performance static UltraCMOS™
prescaler with a fixed divide ratio of 4. Its operating frequency
range is DC to 1500 MHz. The PE9312 operates on a nominal
3 V supply and draws only 6.5 mA. It is packaged in a small
8-lead ceramic SOIC and is ideal for frequency scaling and
clock generation solutions.
The PE9312 is manufactured in Peregrine’s patented UltraThin Silicon (UTSi®) CMOS process, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Features
• DC to 1500 MHz operation
• Fixed divide ratio of 4
• Low-power operation: 6.5 mA typical
@3V
• Ultra small package: 8-lead Ceramic
SOIC
• Guaranteed 100 Krads(Si) Total Dose
Performance
• Superior Single Event Upset Immunity
Figure 1. Functional Diagram
Figure 2. Package Type
8-lead CSOIC
D
IN
Q
CLK QB
D
Q
OUT
CLK QB
Output
Buffer
Pre-Amp
Table 1. Electrical Specifications @ +25 °C, VDD = 2.6 V (ZS = ZL = 50 Ω)
VDD = 3.0 V, -40° C ≤ TA ≤ 85° C, unless otherwise specified
Parameter
Conditions
Minimum
Typical
Maximum
Units
2.85
3.0
3.15
V
6.5
11
mA
DC
1500
MHz
DC < Fin • 1000 MHz
-8
+10
dBm
1000 < Fin • 1500 MHz
0
+10
dBm
DC < Fin • 1500 MHz
0
Supply Voltage
Supply Current
Input Frequency (Fin)
Input Power (Pin)
Output Power (Pout)
Document No. 70-0119-02 │ www.psemi.com
dBm
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 7
PE9312
Product Specification
Figure 3. Pin Configuration
Electrostatic Discharge (ESD) Precautions
N/C
3
6
NC
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
GND
4
5
GND
Latch-Up Avoidance
VDD
1
IN
2
8
GND
7
OUT
PE9312
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 2. Pin Descriptions
Pin No.
Pin
Name
1
VDD
Power supply pin. Bypassing is required
(eg 1000 pF & 100 pF).
2
IN
Input signal pin. Should be coupled with a
capacitor (eg 1000 pF).
3
NC
No connection. This pin should be left
open.
4
GND
Ground pin. Ground pattern on the board
should be as wide as possible to reduce
ground impedance.
5
GND
Ground pin.
6
NC
No connection. This pin should be left
open.
7
OUT
Divided frequency output pin. This pin
should be coupled with a capacitor
(eg 1000 pF).
8
GND
Ground Pin.
Device Functional Considerations
Description
The PE9312 divides an input signal, up to a
frequency of 1500 MHz, by a factor of four thereby
producing an output frequency at a quarter of the
input frequency. To work properly at higher
frequency, the input and output signals (pins 2 &
7) must be AC coupled via an external capacitor,
as shown in the test circuit in Figure 8. The input
may be DC coupled for low frequency operation
with care taken to remain within the specified DC
input range for the device.
The ground pattern on the board should be made
as wide as possible to minimize ground
impedance. See Figure 7 for a layout example.
Table 3. Absolute Maximum Ratings
Symbol
Parameter/Conditions
Min
Max
Units
VDD
Supply voltage
4.0
V
Pin
Input Power
15
dBm
VIN
Voltage on input
-0.3
VDD
+0.3
V
Storage temperature range
-65
150
°C
-40
85
°C
TST
TOP
VESD
Operating temperature
range
ESD voltage (Human Body
Model, MIL-STD 883)
1000
V
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 7
Document No. 70-0119-02 │ UltraCMOS™ RFIC Solutions
PE9312
Product Specification
Typical Performance Data: VDD = 3.0 V
Figure 4. Input Sensitivity
Figure 5. Device Current
Figure 6. Output Power
Document No. 70-0119-02 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 7
PE9312
Product Specification
Figure 7. Test Circuit Block Diagram
3V
50
100 pF
1000 pF
GND
IN
OUT
1000pF
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 4 of 7
VDD
1000pF
N/C
N/C
GND
GND
50
Power Meter or
Frequency Counter
Document No. 70-0119-02 │ UltraCMOS™ RFIC Solutions
PE9312
Product Specification
Evaluation Kit Operation
The Ceramic SOIC Prescaler Evaluation Board was
designed to help customers evaluate the PE9312
divide-by-2 prescaler. On this board, the device
input (pin 2) is connected to the SMA connector J1
through a 50 Ω transmission line. A series capacitor
(C3) provides the necessary DC block for the device
input. A value of 1000 pF was used for the
evaluation board; other applications may require a
different value. It is also possible to place a 0 Ω
resistor in this location for very low frequency
applications.
Figure 8. Evaluation Board Layout
Peregrine specification 102/0034
The device output (pin 7) is connected to SMA
connector J3 through a 50 Ω transmission line. A
series capacitor (C1) provides the necessary DC
block for the device output. This capacitor value
must be chosen to have a low impedance at the
desired output frequency of the device. A value of
1000 pF was chosen for the evaluation board.
The board is constructed of a two-layer FR4 material
with a total thickness of 0.031”. The bottom layer
provides ground for the RF transmission lines. The
transmission lines were designed using a coplanar
waveguide above ground plane model with trace
width of 0.030”, trace gaps of 0.0061”, dielectric
thickness of 0.028”, metal thickness of 0.0014”, and
εr of 4.6. Note that the predominate mode of these
transmission lines is coplanar waveguide.
J2 provides DC power to the device via pin 1. Two
decoupling capacitors (C2=100 pF, C10=1000 pF)
are included on this trace. It is the responsibility of
the customer to determine proper supply decoupling
for their design application.
Document No. 70-0119-02 │ www.psemi.com
Figure 9. Evaluation Board Schematic
Peregrine specification 102/0202
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 7
PE9312
Product Specification
Figure 10. Package Drawing
8-lead CSOIC
.380 / .410
.210 / .250
Pin 1
.180 SQ MAX
.050 TYP
.150 TYP
TOP VIEW
.015 TYP
SIDE VIEW
.070 MAX
Table 4. Ordering Information
Order Code
Part Marking
Description
Shipping
Method
Package
9312-01
PE9312
PE9312-08CFPG-B Engineering Samples
Gullwing Glass Flatpack
50 / Tray
9312-11
PE9312
PE9312-08CFPG-B Production Units
Gullwing Glass Flatpack
50 / Tray
9312-00
PE9312-EK
PE9312 Evaluation Kit
Evaluation Kit
1 / Box
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 6 of 7
Document No. 70-0119-02 │ UltraCMOS™ RFIC Solutions
PE9312
Product Specification
Sales Offices
The Americas
North Asia Pacific
Peregrine Semiconductor Corp.
Peregrine Semiconductor K.K.
9450 Carroll Park Drive
San Diego, CA 92121
Tel 858-731-9400
Fax 858-731-9499
5A-5, 5F Imperial Tower
1-1-1 Uchisaiwaicho, Chiyoda-ku
Tokyo 100-0011 Japan
Tel: +81-3-3502-5211
Fax: +81-3-3502-5213
Europe
Peregrine Semiconductor Europe
Commercial Products:
Bâtiment Maine
13-15 rue des Quatre Vents
F- 92380 Garches, France
Tel: +33-1-47-41-91-73
Fax : +33-1-47-41-91-73
Space and Defense Products:
180 Rue Jean de Guiramand
13852 Aix-En-Provence cedex 3, France
Tel: +33(0) 4 4239 3361
Fax: +33(0) 4 4239 7227
South Asia Pacific
Peregrine Semiconductor
28G, Times Square,
No. 500 Zhangyang Road,
Shanghai, 200122, P.R. China
Tel: +86-21-5836-8276
Fax: +86-21-5836-7652
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The product is in a formative or design stage. The data
sheet contains design target specifications for product
development. Specifications and features may change in
any manner without notice.
Preliminary Specification
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any time without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine
decides to change the specifications, Peregrine will notify
customers of the intended changes by issuing a DCN
(Document Change Notice).
Document No. 70-0119-02 │ www.psemi.com
The information in this data sheet is believed to be reliable.
However, Peregrine assumes no liability for the use of this
information. Use shall be entirely at the user’s own risk.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Peregrine’s products are not designed or intended for use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the failure of the Peregrine product could
create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS is a trademark of Peregrine Semiconductor
Corp.
©2005 Peregrine Semiconductor Corp. All rights reserved.
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