Product Specification PE83501 3.5 GHz Low Power UltraCMOS™ Product Description Divide-by-2 Prescaler The PE83501 is a high-performance dynamic UltraCMOS™ prescaler with a fixed divide ratio of 2. Its operating frequency range is 400 MHz to 3.5 GHz. The PE83501 operates on a nominal 3 V supply and draws only 12 mA. It is packaged in a small 8-lead MSOP and is ideal for frequency scaling and microwave PLL synthesis solutions. Military Operating Temperature Range Features • High-frequency operation: 400 MHz to 3.5 GHz • Fixed divide ratio of 2 • Low-power operation: The PE83501 is manufactured on Peregrine’s UltraCMOS™ process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. 12 mA typical @ 3 V • Small package: 8-lead MSOP • Low cost Figure 2. Package Type Figure 1. Functional Schematic Diagram 8-lead MSOP D Fin Fout Q CLK DRIVER DEC OUTPUT BUFFER QB PREAMP OFF-CHIP BYPASS Table 1. Electrical Specifications (ZS = ZL = 50 Ω) 2.85V ≤ VDD ≤ 3.15 V; -55° C ≤ TA ≤ 125° C, unless otherwise specified Parameter Conditions Minimum Typical Maximum Units 2.85 3.0 3.15 V 13 18 mA 400 3500 MHz 400 MHz ≤ Fin ≤ 2.0 GHz -10 +10 dBm 2.0 GHz < Fin ≤ 2.8 GHz 0 +10 dBm 2.8 GHz < Fin ≤ 3.5 GHz +5 +10 dBm 400 MHz ≤ Fin ≤ 3.5 GHz -15 Supply Voltage Supply Current Input Frequency (Fin) Input Power (Pin) Output Power (Pout) Document No. 70-0124-02 │ www.psemi.com dBm ©2003-2006 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 8 PE83501 Product Specification Electrostatic Discharge (ESD) Precautions Figure 3. Pin Configuration (Top View) VDD Fin 1 2 8 GND 7 Fout When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 3. PE83501 DEC 3 6 GND GND 4 5 GND Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. Table 2. Pin Descriptions Device Functional Considerations Pin No. Pin Name 1 VDD Power supply pin. Bypassing is required. 2 Fin Input signal pin. DC blocking capacitor required (15 pF typical) 3 DEC Power supply decoupling pin. Place a capacitor as close as possible and connect directly to the ground plane. 4 GND Ground pin. Ground pattern on the board should be as wide as possible to reduce ground impedance. 5 GND Ground pin. 6 GND Ground pin. 7 Fout 8 GND Description The PE83501 divides a 400 MHz to 3.5 GHz input signal by two, producing a 200 MHz to 1.75 GHz output signal. To work properly, pin 3 must be supplied with a bypass capacitor to ground. In addition, the input and output signals (pins 2 & 7) must be AC coupled via an external capacitor, as shown in the test circuit in Figure 4. The ground pattern on the board should be made as wide as possible to minimize ground impedance. See Figure 9 for a layout example. Divided frequency output pin. DC blocking capacitor required (47 pF typical) Ground pin. Table 3. Absolute Maximum Ratings Symbol Parameter/Conditions Min Max Units VDD Supply voltage 4.0 V Pin Input Power 15 dBm TST Storage temperature range -65 150 °C TOP Operating temperature range -55 125 °C VESD ESD voltage (Human Body Model) 250 V Absolute Maximum Ratings are those values listed in the above table. Exceeding these values may cause permanent device damage. Exposure to absolute maximum ratings for extended periods may affect device reliability. ©2003-2006 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 8 Document No. 70-0124-02 │ UltraCMOS™ RFIC Solutions PE83501 Product Specification Figure 4. Test Circuit Block Diagram VDD 3 V +/- 0.15 V 10 pF 1000 pF 1 8 2 7 50 Ω 50 Ω PE83501 15 pF 3 8 Lead MSOP Signal Generator 4 10 nF 47 pF 6 N/C Spectrum Analyzer 5 10 pF Figure 5. High Frequency System Application The wideband frequency of operation of the PE83501 makes it an ideal part for use in a DBS downconverter system. INPUT FROM DBS 1ST IF BPF SAW AGC FM DEMOD BASEBAND OUTPUT DIVIDE-BY-2 PE3236 PE83501 LOW NOISE PLL SYNTH LPF Document No. 70-0124-02 │ www.psemi.com ©2003-2006 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 8 PE83501 Product Specification Typical Performance Data: VDD = 3.0 V Figure 6. Input Sensitivity Figure 7. Device Current Figure 8. Output Power ©2003-2006 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 8 Document No. 70-0124-02 │ UltraCMOS™ RFIC Solutions PE83501 Product Specification Evaluation Kit It is the responsibility of the customer to determine proper supply decoupling for their design application. Evaluation Kit Operation The MSOP Prescaler Evaluation Board was designed to help customers evaluate the PE83501 Divide-by-2 Prescaler. On this board, the device input (pin 2) is connected to connector J1 through a 50 Ω transmission line. A series capacitor (C3) provides the necessary DC block for the device input. It is important to note that the value of this capacitance will impact the performance of the device. A value of 15 pF was found to be optimal for this board layout; other applications may require a different value. The device output (pin 7) is connected to connector J3 through a 50 Ω transmission line. A series capacitor (C1) provides the necessary DC block for the device output. Note that this capacitor must be chosen to have a low impedance at the desired output frequency the device. The value of 47 pF was chosen to provide a wide operating range for the evaluation board. The board is constructed of a two-layer FR4 material with a total thickness of 0.031”. The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide above ground plane model with trace width of 0.030”, trace gaps of 0.007”, dielectric thickness of 0.028”, metal thickness of 0.0014” and εr of 4.4. Note that the predominate mode for these transmission lines is coplanar waveguide. J2 provides DC power to the device. Starting from the lower left pin, the second pin to the right (J2-3) is connected to the device VDD pin (1). Two decoupling capacitors (10 pF, 1000 pF) are included on this trace. Document No. 70-0124-02 │ www.psemi.com The DEC pin (3) must be connected to a low impedance AC ground for proper device operation. On the board, two decoupling capacitors (C6 = 10 nF, C4 = 10 pF), located on the back of the board, perform this function. Applications Support If you have a problem with your evaluation kit or if you have applications questions call (858) 731-9400 and ask for applications support. You may also contact us by fax or e-mail: Fax: (858) 731-9499 E-Mail: [email protected] Figure 9. Evaluation Board Layouts Peregrine Specification 101/0035 Figure 10. Evaluation Board Schematic Peregrine Specification 102/0200 ©2003-2006 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 8 PE83501 Product Specification Figure 11. Package Drawing 8-lead MSOP TOP VIEW 0.65BSC .525BSC 8 7 6 5 2.45±0.10 2X 3.00±0.10 0.51±0.13 -B- 0.51±0.13 1 2 3 4 2.95±0.10 .25 A B C -C0.86±0.08 2.95±0.10 1.10 MAX -A0.10 A 0.33+0.07 -0.08 0.08 A B C 0.10±0.05 3.00±0.10 4.90±0.15 3.00±0.10 FRONT VIEW ©2003-2006 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 8 SIDE VIEW Document No. 70-0124-02 │ UltraCMOS™ RFIC Solutions PE83501 Product Specification Figure 12. Tape and Reel Specifications 8-lead MSOP Pin1 Table 4. Ordering Information Order Code Part Marking Description Package Shipping Method 83501-11 PE83501 PE83501-08MSOP-100A 8-lead MSOP 50 pcs. / Tube 83501-12 PE83501 PE83501-08MSOP-2000C 8-lead MSOP 2000 pcs. / T&R 83501-00 PE83501-EK PE83501-08MSOP-EK Evaluation Board 1 / Box Document No. 70-0124-02 │ www.psemi.com ©2003-2006 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 8 PE83501 Product Specification Sales Offices The Americas North Asia Pacific Peregrine Semiconductor Corporation Peregrine Semiconductor K.K. 9450 Carroll Park Drive San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499 Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Europe Peregrine Semiconductor, Korea Peregrine Semiconductor Europe #B-2402, Kolon Tripolis, #210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-480 S. Korea Tel: +82-31-728-4300 Fax: +82-31-728-4305 Bâtiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-4741-9173 Fax : +33-1-4741-9173 South Asia Pacific Space and Defense Products Peregrine Semiconductor, China Americas: Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Tel: 858-731-9453 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence Cedex 3, France Tel: +33-4-4239-3361 Fax: +33-4-4239-7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). ©2003-2006 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 8 The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp. Document No. 70-0124-02 │ UltraCMOS™ RFIC Solutions