SIPEX SP320ACF

SP320
®
Complete +5V-Only V.35 Interface
with RS-232 (V.28) Control Lines
■
■
■
■
■
■
10Mbps Data Throughput
+5V-Only, Single Supply Operation
3 Drivers, 3 Receivers – V.35
4 Drivers, 4 Receivers – RS-232
80-pin MQFP Surface Mount Packaging
Pin Compatible with SP319
DESCRIPTION
The SP320 is a complete V.35 interface transceiver offering 3 drivers and 3 receivers of V.35, and
4 drivers and 4 receivers of RS-232 (V.28). A Sipex patented charge pump allows +5V only low
power operation. RS-232 drivers and receivers are specified to operate at 120kbps, all V.35
drivers and receivers operate up to 5Mbps.
+5V
25, 33, 41, 62, 73
26
+
C1+
+
30 C128 C2+
0.1µF
0.1µF
+5V
31
VCC
VDD
SP320
Vcc
14 DRIN1
61 DRA1
100Ω
Vcc
59 DRB1
13 T1IN
400kΩ
Vcc
100Ω
R1IN 66
Vcc
5kΩ
Vcc
5kΩ
Vcc
22 DRIN2
R4IN 39
42 DRA2
5kΩ
Vcc
RCA3 76
400kΩ
RCOUT3 79
51 T4OUT
5kΩ
400kΩ
R4OUT 21
47 T3OUT
24 T4IN
400kΩ
R3IN 35
R3OUT 19
54 T2OUT
17 T3IN
400kΩ
R2IN 68
58 T1OUT
16 T2IN
400kΩ
RCB2 38
R2OUT 78
0.1µF
+
400kΩ
RCB1 71
RCA2 37
R1OUT 80
32
3 TS000
9 ENV35
RCOUT2 20
+
C2-
RCA1 70
RCOUT 1
VSS
0.1µF
27
44 DRB2
23 STEN
15 DRIN3
63 DRA3
100Ω
65 DRB3
6 TTEN
RTEN 7
RCB3 77
29, 34, 43, 60, 64, 72
Rev:A Date: 1/27/04
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines
1
© Copyright 2004 Sipex Corporation
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at
these ratings or any other above those indicated in the operation
sections of the specifications below is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect
reliability.
VCC.....................................................................................................+7V
Input Voltages
Logic........................................................-0.3V to (VCC+0.5V)
Drivers..................................................-0.3V to (VCC+0.5V)
Receivers..................................................±30V at ≤100mA
Output Voltages
Logic........................................................-0.3V to (VCC+0.5V)
Drivers.......................................................................±14V
Receivers..............................................-0.3V to (VCC+0.5V)
Storage Temperature.......................................................-65˚C to +150˚C
Power Dissipation..........................................................................1500mW
Package Derating
ØJC.......................................................................16 •C/W
ØJA.......................................................................46 •C/W
SPECIFICATIONS
TMIN to TMAX and VCC = 5V±5% unless otherwise noted.
PARAMETER
MIN.
V.35 DRIVER
TTL Input Levels
VIL
VIH
±0.44
50
135
Voltage Output Offset
-0.6
AC Characteristics
Transition Time
Maximum Transmission Rate
Propagation Delay
tPHL
V.35 RECEIVER
TTL Output Levels
VOL
VOH
Receiver Inputs
Differential Input
Threshold
Input Impedance
Short Circuit Impedance
AC Characteristics
Maximum Transmission Rate
Propagation Delay
tPHL
±0.55
100
150
CONDITIONS
Volts
Volts
±0.66
150
165
Volts
Ohms
Ohms
+0.6
Volts
Measured from A=B to Gnd,
VOUT=-2V to +2V
VOffset={[|VA|+|VB|]/2}
ns
Mbps
Rise/fall time, 10% to 90%
RL=100Ω, VDIFF OUT= 0.55V±20%
40
RL=100Ω from A to B
150
250
ns
150
250
ns
Measured from 1.5V of VIN
to 50% of VOUT
Measured from 1.5V of VIN
to 50% of VOUT
0.4
Volts
Volts
IOUT=-3.2mA
IOUT=1.0mA
+0.3
110
165
Volts
Ohms
Ohms
2.4
-0.3
90
135
UNITS
0.8
5
tPLH
Rev:A Date: 1/27/04
MAX.
2.0
Voltage Outputs
Differential Outputs
Source Impedance
Short Circuit Impedance
tPLH
TYP.
100
150
5
Measured from A=B to Gnd
VIN=-2V to +2V
Mbps
VIN = ±0.55V ±20%
Measured from 50% of VIN to
1.5V of ROUT
Measured from 50% of VIN to
1.5V of ROUT
150
250
ns
150
250
ns
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines
2
© Copyright 2004 Sipex Corporation
SPECIFICATIONS (CONTINUED)
TMIN to TMAX and VCC = 5V±5% unless otherwise noted.
PARAMETER
RS-232 DRIVER
TTL Input Levels
VIL
VIH
MIN.
TYP.
MAX.
+5.0
-15.0
-15
-100
300
AC Characteristics
Slew Rate
Maximum Transmission Rate
Volts
Volts
+15.0
-5.0
+15
+100
Volts
Volts
Volts
mA
Ohms
RL= 3kΩ to Gnd
RL= 3kΩ to Gnd
RL= ∞
RL= Gnd
VCC= 0V; VOUT= ±2V
V/µs
RL= 3kΩ, CL= 50pF; From +3V to -3V
or -3V to +3V, TA = 25˚C, VCC = +5V
RL= 3kΩ, CL= 2500pF
30
120
kbps
Transition Time
Propagation Delay
tPHL
tPLH
RS-232 RECEIVER
TTL Output Levels
VOL
VOH
Receiver Input
Input Voltage Range
High Threshold
Low Threshold
Hysteresis
Receiver Input Circuit Bias
Input Impedance
AC Characteristics
Maximum Transmission Rate
Propagation Delay
tPHL
tPLH
CONDITIONS
0.8
2.0
Voltage Outputs
High Level Output
Low Level Output
Open Circuit Output
Short Circuit Current
Power Off Impedance
UNITS
1.56
µs
Rise/fall time, between ±3V
RL= 3kΩ, CL= 2500pF
2
8
µs
2
8
µs
RL= 3kΩ, CL= 2500pF; From 1.5V
of TIN to 50% of VOUT
RL= 3kΩ, CL= 2500pF; From 1.5V
of TIN to 50% of VOUT
0.4
Volts
Volts
+15
3.0
Volts
Volts
Volts
Volts
Volts
kOhms
2.4
-15
0.8
0.2
1.7
1.2
0.5
3
5
1
+2.0
7
120
VCC= 5V; TA= +25˚C
VIN= ±15V
kbps
0.1
0.1
1
1
µs
µs
From 50% of RIN to 1.5V of ROUT
From 50% of RIN to 1.5V of ROUT
POWER REQUIREMENTS
No Load VCC Supply Current
Full Load VCC Supply Current
35
60
70
mA
mA
Shutdown Current
1.5
No load; VCC= 5.0V; TA= 25˚C
RS-232 drivers RL= 3kΩ to Gnd;
DC Input
V.35 drivers RL= 100Ω from A to B;
DC Input
TS000 = ENV35 = 0V
Rev:A Date: 1/27/04
mA
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines
3
© Copyright 2004 Sipex Corporation
All of the V.35 receivers can operate at data
rates as high as 5Mbps. The sensitivity of the
V.35 receiver inputs is ±300mV.
THEORY OF OPERATION
The SP320 is a single chip +5V-only serial
transceiver that supports all the signals necessary to implement a full V.35 interface. Three
V.35 drivers and three V.35 receivers make up
the clock and data signals. Four RS-232 (V.28)
drivers and four RS-232 (V.28) receivers are
used for control line signals for the interface.
RS-232 (V.28) Drivers
The RS-232 drivers are inverting transmitters,
which accept either TTL or CMOS inputs and
output the RS-232 signals with an inverted sense
relative to the input logic levels. Typically, the
RS-232 output voltage swing is ±9V with no
load, and ±5V minimum with full load. The
transmitter outputs are protected against infinite
short-circuits to ground without degradation in
reliability.
V.35 Drivers
The V.35 drivers are +5V-only, low power
voltage output transmitters. The drivers do not
require any external resistor networks, and will
meet the following requirements:
In the power off state, the output impedance of
the RS-232 drivers will be greater than 300Ω
over a ±2V range. Should the input of a driver be
left open, an internal 400kΩ pullup resistor to
VCC forces the input high, thus committing the
output to a low state. The slew rate of the
transmitter output is internally limited to a
maximum of 30V/µs in order to meet the EIA
standards. The RS-232 drivers are rated for
120kbps data rates.
1. Source impedance in the range of 50Ω to
150Ω.
2. Resistance between short-circuited terminals
and ground is 150Ω ±15Ω.
3. When terminated with a 100Ω resistive load
the terminal to terminal voltage will be 0.55
Volts ±20% so that the A terminal is positive to
the B terminal when binary 0 is transmitted, and
the conditions are reversed to transmit binary 1.
RS-232 (V.28) Receivers
The RS-232 receivers convert RS-232 input
signals to inverted TTL signals. Each of the four
receivers features 500mV of hysteresis margin
to minimize the effects of noisy transmission
lines. The inputs also have a 5kΩ resistor to
ground; in an open circuit situation the input of
the receiver will be forced low, committing the
output to a logic high state. The input resistance
will maintain 3kΩ-7kΩ over a ±15V range.
The maximum operating voltage range for the
receiver is ±30V, under these conditions the
input current to the receiver must be limited to
less than 100mA. The RS-232 receivers can
operate to beyond 120kbps.
4. The arithmetic mean of the voltage of the A
terminal with respect to ground, and the B
terminal with respect to ground will not exceed
0.6 Volts when terminated as in 3 above.
The V.35 drivers can operate at data rates as
high as 5Mbps. The driver outputs are protected
against short-circuits between the A and B
outputs and short circuits to ground.
Two of the V.35 drivers, DRIN2 and DRIN3 are
equipped with enable control lines. When the
enable pins are high the driver outputs are
disabled, the output impedance of a disabled
driver will nominally be 300Ω. When the enable
pins are low, the drivers are active.
CHARGE PUMP
The charge pump is a Sipex patented design
(U.S. 5,306,954) and uses a unique approach
compared to older less-efficient designs. The
charge pump still requires four external
capacitors, but uses a four-phase voltage
shifting technique to attain symmetrical ±10V
power supplies. The capacitors can be as low
as 0.1µF with a 16 Volt rating. Polarized or
non-polarized capacitors can be used.
V.35 Receivers
The V.35 receivers are +5V only, low power
differential receivers which meet the following
requirements:
1. Input impedance in the range of 100Ω ±10Ω.
2. Resistance to ground of 150Ω ±15Ω,
measured from short-circuited terminals.
Rev:A Date: 1/27/04
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines
4
© Copyright 2004 Sipex Corporation
Phase 4
-Vdd transfer- The fourth phase of the clock
connects the negative terminal of C2 to ground
and transfers the generated +10V across C2 to
C4, the Vdd storage capacitor. Again, simultaneously with this, the positive side of capacitor
C1 is switched to +5V and the negative side is
connected to ground, and the cycle begins again.
+10V
a) C2+
GND
GND
b) C2–
Since both V+ and V- are separately generated
from Vcc in a no load condition, V+and V- will
be symmetrical. Older charge pump approaches
that generate V- from V+ will show a decrease
in the magnitude of V- compared to V+ due to
the inherent inefficiencies in the design.
–10V
Figure 1. Charge Pump Waveforms
The clock rate for the charge pump typically
operates at 15kHz. The external capacitors must
be 0.1µF with a 16V breakdown rating.
Figure 1a shows the waveform found on the
positive side of capacitor C2, and Figure 1b
shows the negative side of capacitor C2. There
is a free-running oscillator that controls the four
phases of the voltage shifting. A description of
each phase follows.
Shutdown Mode
The SP320 can be put into a low power
shutdown mode by bringing both TS000 (pin 3)
and ENV35 (pin 9) low. In shutdown mode, the
SP320 will draw less than 2mA of supply
current. For normal operation, both pins should
be connected to +5V.
Phase 1
-Vss charge storage- During this phase of the
clock cycle, the positive side of capactors C1
and C2 are initially charged to +5V. C1+ is then
switched to ground and the charge in C1- is
transferred to C2-. Since C2+ is connected to
+5V, the voltage potential across capacitor C2 is
now 10V.
External Power Supplies
For applications that do not require +5V only,
external supplies can be applied at the V+ and
V- pins. The value of the external supply
voltages must be no greater than ±10V. The
current drain from the ±10V supplies is used for
the RS-232 drivers. For the RS-232 driver the
current requirement will be 3.5mA per driver.
It is critical the external power supplies provide
a power supply sequence of : +10V, +5V, and
then -10V.
Phase 2
-Vss transfer- Phase two of the clock connects
the negative terminal of C2 to the Vss storage
capacitor and the positive terminal of C2 to
ground, and transfers the generated -10V to C3.
Simultaneously, the positive side of capacitor
C1 is switched to +5V and the negative side is
connected to ground.
Applications Information
The SP320 is a single chip device that can
implement a complete V.35 interface. Three (3)
V.35 drivers and three (3) V.35 receivers are
used for clock and data signals and four (4)
RS-232 (V.28) drivers and four (4) RS-232
(V.28) receivers can be used for the control
signals of the interface. The following examples
show the SP320 configured in either a DTE or
DCE application.
Phase 3
-Vdd charge storage- The third phase of the
clock is identical to the first phase- the transferred charge in C1 produces -5V in the negative
terminal of C1, which is applied to the negative
side of capacitor C2. Since C2+ is at +5V, the
voltage potential across C2 is +10V.
Rev:A Date: 1/27/04
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines
5
© Copyright 2004 Sipex Corporation
VCC = +5V
VCC = +5V
C4
+10V
C1
–
–
+
C2
–
+
–
VDD Storage Capacitor
C1
VSS Storage Capacitor
C3
+
–
–
+
VDD Storage Capacitor
VSS Storage Capacitor
C3
–5V
VCC = +5V
C4
+
–
–
Figure 3. Charge Pump Phase 2
VCC = +5V
C1
+
+
C2
–
–5V
Figure 2. Charge Pump Phase 1
+
C4
+5V
+
+
C2
–
+
–
+
–
C1
VSS Storage Capacitor
C3
–10V
C2
–
–
–
–
+
VDD Storage Capacitor
VSS Storage Capacitor
C3
–5V
50Ω 125Ω
1µF
1µF
T
1µF
1µF
=
VCC2
5V
50Ω
V.35
V.35
1µF
P
DX
T
DX
T
T
RX
T
T
TXC (114)
AA
W
Y
RXC (115)
A
GND (102)
RX
T
RX
T
DX
T
DX
T
DX
T
R
CABLE SHIELD
T
X
V
TXD (104)
R
B
VCC1
U
V
T
RX
S
Y
X
P
SCTE (113)
W
AA
RX
TXD (103)
S
U
B
VCC2
A
1µF
1µF
1µF
+
+
Figure 5. Charge Pump Phase 4
VCC1
5V
RS-232
DX
DX
RX
RX
RX
OPTIONAL SIGNALS
+
–5V
Figure 4. Charge Pump Phase 3
1µF
C4
+5V
VDD Storage Capacitor
RX
DX
DX
1µF
1µF
1µF
1µF
H
C
E
D
F
NN
N
L
DTR (108)
RTS (105)
DSR (107)
CTS (106)
DCD (109)
H
C
E
D
F
TM (142)
NN
RDL (140)
N
LLB (141)
L
ISO 2593
34-PIN DTE/DCE
INTERFACE
CONNECTOR
RS-232
1µF
RX
RX
DX
DX
DX
DX
RX
RX
ISO 2593
34-PIN DTE/DCE
INTERFACE
CONNECTOR
Figure 6. A Competitor’s Typical V.35 Solution Using Six Components.
Rev:A Date: 1/27/04
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines
6
© Copyright 2004 Sipex Corporation
+5V
0.1µF
28
C2+
0.1µF
31
C2-
25
VCC
+5V
1N5819
0.1µF
0.1µF
27 26 30
VDD C1+ C1- 32
VSS
28
0.1µF
C2+
SP320CF
DRIN1
14
DRIN3
15
P
S
TxC (113)
U
U
W
W
A
79
RCOUT2
20
RCOUT1
1
C2-
25
27 26 30
0.1µF
VCC VDD C1+ C1- 32
VSS
RCOUT1
14
RCOUT2
20
A
RCOUT3
79
TxCC (114)
Y
AA
RxC (115)
T1IN
13
C
T3IN
17
N
T4IN
24
L
R2OUT
78
E
R1OUT
80
D
R3OUT
19
F
R4OUT
21
NN
X
V
RxD (104)
T
R
H
Y
AA
X
V
T2IN
16
T
R
DTR (108)
RTS (105)
RL (140)
LL (141)
DSR (107)
CTS (106)
DCD (109)
TM (142)
B
29, 34, 43, 60, 64, 72
31
1N5819
0.1µF
SP320CF
TxD (103)
P
S
DRIN2
22
RCOUT3
0.1µF
DRIN2
22
DRIN3
15
DRIN1
14
H
R2OUT
78
C
R1OUT
80
N
R4OUT
21
L
R3OUT
19
E
T2IN
16
D
T1IN
13
F
T3IN
17
NN
T4IN
24
B
ISO2593
34-PIN DTE/DCE
INTERFACE CONNECTOR
ISO2593
34-PIN DTE/DCE
INTERFACE CONNECTOR
29, 34, 43, 60, 64, 72
Figure 7. Typical DTE-DCE V.35 Connection with the SP320
Rev:A Date: 1/27/04
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines
7
© Copyright 2004 Sipex Corporation
ISO-2593 connector pin out
Signal Ground
Clear to Send
Data Carrier Detect
Ring Indicator
Local Loopback
Remote Loopback
Receive Data (A)
Receive Data (B)
Receive Timing (A)
Receive Timing (B)
Unassigned--Unassigned--Unassigned--Unassigned--Unassigned--Unassigned--Test Mode
A
C
E
H
K
M
P
S
U
W
Y
AA
CC
EE
HH
KK
MM
B
D
F
J
L
N
R
T
V
X
Z
BB
DD
FF
JJ
LL
NN
Typical DCE V.35 interface
Chasis Ground
Request to Send
DCE Ready (DSR)
DTE Ready (DTR)
Unassigned--Unassigned--Transmitted Data (A)
Transmitted Data (B)
Terminal Timing (A) } 113(A)
Terminal Timing (B) } 113(B)
Transmit Timing (A) } 114(A)
Transmit Timing (B) } 114(B)
Unassigned--Unassigned--Unassigned--Unassigned--Unassigned---
+5V
25, 33, 41, 62, 73
26
+
0.1µF
C1+
VCC
VDD
30
+
0.1µF
+5V
C128 C2+
SP320
RCOUT 1
TXC
100Ω
Vcc
RCOUT2 20
400kΩ
RTS
DTR
R1OUT 80
Vcc
400kΩ
R2OUT 78
Vcc
5kΩ
106
DSR
107
DCD
109
47 T3OUT
24 T4IN
400kΩ
104(B)
CTS
54 T2OUT
17 T3IN
5kΩ
R3IN 35
140
104(A)
58 T1OUT
16 T2IN
400kΩ
R2IN 68
108
RXD
61 DRA1
13 T1IN
Vcc
100Ω
R1IN 66
105
14 DRIN1
59 DRB1
RCB2 38
113(B)
0.1µF
+
Vcc
400KΩ
RCB1 71
RCA2 37
103(B)
113(A)
0.1µF
3 TS000
RCA1 70
TXD
32
+
31 C2-
9 ENV35
103(A)
VSS
27
RI
125
51 T4OUT
Vcc
RLPBK
5kΩ
22 DRIN2
400kΩ
141
R4IN 39
LLPBK
R4OUT 21
5kΩ
Vcc
RCA3 76
SPARE
400kΩ
SPARE
SPARE
R3OUT 19
RCOUT3 79
100Ω
RTEN 7
RCB3 77
TXCC
42 DRA2
114(A)
44 DRB2
23 STEN
114(B)
15 DRIN3
RXC
63 DRA3
115(A)
65 DRB3
115(B)
6 TTEN
29, 34, 43, 60, 64, 72
Rev:A Date: 1/27/04
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines
8
© Copyright 2004 Sipex Corporation
ISO-2593 connector pin out
Signal Ground
Clear to Send
Data Carrier Detect
Ring Indicator
Local Loopback
Remote Loopback
Receive Data (A)
Receive Data (B)
Receive Timing (A)
Receive Timing (B)
Unassigned--Unassigned--Unassigned--Unassigned--Unassigned--Unassigned--Test Mode
A
C
E
H
K
M
P
S
U
W
Y
AA
CC
EE
HH
KK
MM
B
D
F
J
L
N
R
T
V
X
Z
BB
DD
FF
JJ
LL
NN
Typical DTE V.35 interface
Chasis Ground
Request to Send
DCE Ready (DSR)
DTE Ready (DTR)
Unassigned--Unassigned--Transmitted Data (A)
Transmitted Data (B)
Terminal Timing (A) } 113(A)
Terminal Timing (B) } 113(B)
Transmit Timing (A) } 114(A)
Transmit Timing (B) } 114(B)
Unassigned--Unassigned--Unassigned--Unassigned--Unassigned---
+5V
25, 33, 41, 62, 73
26
+
0.1µF
C1+
VCC
VDD
30
+
0.1µF
+5V
C128 C2+
SP320
104(A)
104(B)
114(A)
114(B)
106
107
109
100Ω
14 DRIN1
Vcc
400kΩ
TXD
61 DRA1
13 T1IN
Vcc
100Ω
103(A)
R1IN 66
Vcc
400kΩ
R2IN 68
Vcc
5kΩ
400kΩ
108
RLPBK
47 T3OUT
24 T4IN
R3IN 35
105
DTR
54 T2OUT
17 T3IN
5kΩ
103(B)
RTS
58 T1OUT
16 T2IN
400kΩ
RCB2 38
R2OUT 78
DSR
Vcc
59 DRB1
R1OUT 80
CTS
0.1µF
+
400kΩ
RCB1 71
RCA2 37
RCOUT2 20
TXCC
32
3 TS000
RCA1 70
RCOUT 1
+
31 C2-
9 ENV35
RXD
VSS
0.1µF
27
140
LLPBK
51 T4OUT
141
Vcc
R3OUT 19
DCD
5kΩ
22 DRIN2
400kΩ
125
R4IN 39
R4OUT 21
RI
115(A)
5kΩ
Vcc
RCA3 76
400kΩ
RCOUT3 79
RXC
115(B)
100Ω
RTEN 7
RCB3 77
TXCT
42 DRA2
113(A)
44 DRB2
23 STEN
113(B)
15 DRIN3
SPARE
63 DRA3
SPARE
65 DRB3
SPARE
6 TTEN
29, 34, 43, 60, 64, 72
Rev:A Date: 1/27/04
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines
9
© Copyright 2004 Sipex Corporation
80 R1OUT
79 RCOUT3
78 R2OUT
77 RCB3
76 RCA3
75 NC
74 NC
73 VCC
72 GND
71 RCB1
70 RCA1
69 NC
68 R2IN
67 NC
66 R1IN
65 DRB3
64 GND
63 DRA3
62 VCC
61 DRA1
Pin configuration
RCOUT1 1
NC 2
TS000 3
NC 4
NC 5
TTEN 6
RTEN 7
NC 8
ENV35 9
NC 10
NC 11
NC 12
T1IN 13
DRIN1 14
DRIN3 15
T2IN 16
T3IN 17
NC 18
R3OUT 19
RCOUT2 20
60 GND
59 DRB1
58 T1OUT
57 NC
56 NC
55 NC
54 T2OUT
53 NC
52 NC
51 T4OUT
50 NC
49 NC
48 NC
47 T3OUT
46 NC
45 NC
44 DRB2
43 GND
42 DRA2
41 VCC
ROUT4 21
DRIN2 22
STEN 23
T4IN 24
VCC 25
C1+ 26
VDD 27
C2+ 28
GND 29
C1- 30
C2- 31
VSS 32
VCC 33
GND 34
R3IN 35
NC 36
RCA2 37
RCB2 38
R4IN 39
NC 40
SP320
Typical application circuit
+5V
25, 33, 41, 62, 73
26
+
C1+
+
30 C128 C2+
0.1µF
0.1µF
+5V
31
VCC
VDD
SP320
Vcc
14 DRIN1
61 DRA1
100Ω
Vcc
59 DRB1
13 T1IN
400kΩ
Vcc
100Ω
R1IN 66
Vcc
5kΩ
Vcc
5kΩ
Vcc
22 DRIN2
400kΩ
42 DRA2
5kΩ
Vcc
RCA3 76
400kΩ
RCOUT3 79
51 T4OUT
5kΩ
R4IN 39
R4OUT 21
47 T3OUT
24 T4IN
400kΩ
R3IN 35
R3OUT 19
54 T2OUT
17 T3IN
400kΩ
R2IN 68
58 T1OUT
16 T2IN
400kΩ
RCB2 38
R2OUT 78
0.1µF
+
400kΩ
RCB1 71
RCA2 37
R1OUT 80
32
C2-
RCA1 70
RCOUT2 20
+
3 TS000
9 ENV35
RCOUT 1
VSS
0.1µF
27
44 DRB2
23 STEN
15 DRIN3
63 DRA3
100Ω
65 DRB3
6 TTEN
RTEN 7
RCB3 77
29, 34, 43, 60, 64, 72
Rev:A Date: 1/27/04
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines
10
© Copyright 2004 Sipex Corporation
PACKAGE: 80 Pin MQFP
D
D1
D2
0.30" RAD. TYP.
PIN 1
c
0.20" RAD. TYP.
E1
E
E2
CL
5°-16°
0° MIN.
0°–7°
5°-16°
CL
L
L1
A2
A
b
A1
e
DIMENSIONS
Minimum/Maximum
(mm)
SYMBOL
80–PIN MQFP
JEDEC MS-22
(BEC) Variation
MIN
NOM
A
COMMON DIMENTIONS
MAX
SYMBL MIN
2.45
A1
0.00
A2
1.80
b
0.22
2.00
Seating
Plane
c
0.11
0.25
L
0.73
2.20
L1
NOM
MAX
23.00
0.88
1.03
1.60 BASIC
0.40
D
17.20 BSC
D1
14.00 BSC
D2
12.35 REF
E
17.20 BSC
E1
14.00 BSC
E2
12.35 REF
e
0.65 BSC
N
80
80 PIN MQFP (MS-022 BC)
Rev:A Date: 1/27/04
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines
11
© Copyright 2004 Sipex Corporation
ORDERING INFORMATION
Model
Temperature Range
Package Types
SP320ACF ................................................... 0˚C to +70˚C ...................... 80-pin JEDEC (BE-2 Outline) MQFP
Please consult the factory for pricing and availability on a Tape-On-Reel option.
REVISION HISTORY
DATE
1/27/04
REVISION
A
DESCRIPTION
Implemented tracking revision.
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Rev:A Date: 1/27/04
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines
12
© Copyright 2004 Sipex Corporation