® SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers ■ Operates over entire Li+ Battery range ■ Interoperable with EIA/TIA-232-F and adheres to EIA/TIA-562 down to a +2.35V power supply ■ AUTO ON-LINE® circuitry automatically wakes up from a 1µA shutdown ■ Minimum 250Kbps data rate ■ Regulated charge pump yields stable RS-232 outputs regardless of VCC variations ■ Unique VL for low logic compatibility regardless of VCC ■ Enhanced ESD Specifications: +15kV Human Body Model +15kV IEC1000-4-2 Air Discharge +8kV IEC1000-4-2 Contact Discharge ■ Enhanced battery life as the VCC drops below 3.1V C2+ 1 28 C1+ GND 2 27 V+ C2- 3 26 VCC V- 4 T1OUT 5 T2OUT 6 T3OUT 7 25 SP3281EB C1- 24 T1IN 23 T2IN 22 T3IN R1IN 8 21 R1OUT R2IN 9 20 R2OUT T4OUT 10 19 T4IN R3IN 11 18 T5OUT 12 17 T5IN ONLINE 13 16 VL SHUTDOWN 14 R3OUT 15 STATUS APPLICATIONS ■ Cell phone data cables ■ PDAs, PDA cradles ■ Hand held equipment ■ Peripherals DESCRIPTION The SP3281EB device is an RS-232 transceiver solution intended for portable or hand-held applications such as notebook and palmtop computers, PDAs, cell phones and their data cables and cradles. The SP3281EB is compatible with low voltage logic down to 1.8V using a logic select pin (VL) which conditions the logic inputs and outputs to be compatible with system logic. The SP3281EB uses an internal high-efficiency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V operation. This charge pump and Sipex's driver architecture allow the SP3281EB device to deliver compliant RS-232 performance from a single +3.3V to +5.5Vpower supply and additionally adhere to EIA/TIA-562 driver outputs levels down to a power supply voltage of 2.35V. The AUTO ON-LINE® feature allows the device to automatically "wake-up" during a shutdown state when an RS-232 cable is connected and a connected peripheral is turned on. Otherwise, the device automatically shuts itself down drawing less than 1µA. TABLE 1 Device SP3281EB Power Supplies 2.35V to 5.5V RS-232 Drivers 5 RS232 Receivers 3 External AUTO ON-LINE® Components Circuitry 4 yes Data No. of Rate Pins 250kbps 28 Applicable U.S. Patents - 5,306,954; and 6,378,026. Rev. 6/19/03 SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 1 © Copyright 2003 Sipex Corporation ABSOLUTE MAXIMUM RATINGS TxIN, ONLINE, SHUTDOWN, .............0.3V to +6.0V RxIN..................................................................+25V Output Voltages TxOUT............................................................+13.2V RxOUT, STATUS.......................-0.3V to (VL + 0.3V) Short-Circuit Duration TxOUT.....................................................Continuous These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. VCC......................................................-0.3V to +6.0V V+ (note 1).........................................-0.3V to +7.0V V- (note 1)..........................................+0.3V to -7.0V V+ + |V-| (note 1).............................................+13V ICC (DC VCC or GND current).........................+100mA Input Voltages VL........................................................-0.3V to +6.0V Storage Temperature......................-65°C to +150°C Power Dissipation per package 28-pin SSOP (derate 11.2mW/oC above +70oC)............900mW 28-pin TSSOP (derate 13.2mW/oC above +70oC).........1100mW ELECTRICAL CHARACTERISTICS VCC = +2.35 to +5.5V, VL=+1.8 to +5.5V, C1 - C4 = 0.22µF. TA=TMIN to TMAX, unless otherwise noted. Typical values are at VCC=VL=+3.3V, and TA = +25°C.) PARAMETER MIN. TYP. MAX. UNITS CONDITIONS Supply Current, AUTO ON-LINE® 1.0 10 µA All RxIN open, all TxIN at VLor GND, VCC=VL=+3.3V, TA=25°C ONLINE = GND, SHUTDOWN = VL, Supply Current, Shutdown 1.0 10 µA All RxIN open, all TxIN at VL or GND VCC=VL=+3.3V, TA=25°C ONLINE = VL or GND, SHUTDOWN = GND Supply Current, AUTO ON-LINE® Disabled 0.3 1.0 mA All TxIN at VL or GND, ONLINE = VL, VCC=VL=+3.3V, TA=25°C SHUTDOWN = VL,no load 0.8 0.6 0.4 V SUPPLY CURRENT LOGIC INPUTS AND RECEIVER OUTPUTS Input Logic Threshold LOW Input Logic Threshold HIGH 2.4 2.0 1.4 V 0.9 Transmitter Input Hysteresis 0.3 TxIN, ONLINE, SHUTDOWN VL = +3.3V or +5.0V VL = +2.5V VL = +1.8V TxIN, ONLINE, SHUTDOWN VL = +5.0V VL = +3.3V VL = +2.5V VL = +1.8V V Input Leakage Current ±0.01 ±1.0 µA Output Leakage Current ±0.05 ±10 µA RxOUT, Receivers disabled 0.4 0.4 V IOUT = +1.6mA, VL=2.5V, 3.3V, or 5.0V IOUT = +0.8mA, VL=1.8V V IOUT = -1.0mA, VL=2.5V, 3.3V, 5.0V IOUT = -0.5mA, VL=1.8V Output Voltage LOW Output Voltage HIGH TxIN, ONLINE, SHUTDOWN, TA = 25°C VL - 0.6 VL - 0.6 VL - 0.1 VL - 0.1 VCC Mode Switch Point (VCC is Falling) 2.95 3.1 3.25 V TxOUT=±5.0V to ±3.7V VCC Mode Switch Point (VCC is Rising) 3.3 3.5 3.7 V TxOUT=±3.7V to ±5.0V DRIVER OUTPUTS VCC Mode Switch Point Hysteresis Rev. 6/19/03 400 mV SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 2 © Copyright 2003 Sipex Corporation ELECTRICAL CHARACTERISTICS: Continued VCC = +2.35 to +5.5V, VL=+1.8 to +5.5V, C1 - C4 = 0.22µF. TA=TMIN to TMAX, unless otherwise noted. Typical values are at VCC=VL=+3.3V, and TA = +25°C.) PARAMETER MIN. TYP. MAX. UNITS Output Voltage Swing ±5.0 +/-3.7 Output Resistance V ±5.4 300 Output Short-Circuit Current Ω ±35 Ouput Leakage Current CONDITIONS All driver outputs loaded with 3KΩ to GND, TA=25°C VCC=3.25V to 5.5V, VCC=2.35 to 2.95V, VCC = V+ = V- = 0V, VTXOUT = ±2V ±60 mA VTXOUT = GND +/-25 µA VTXOUT=+/-12V, transmitter disabled, VCC=0V or 2.35V to 5.5V 25 V RECEIVER INPUTS Input Voltage Range Input Threshold LOW -25 0.3 0.6 0.8 HIGH 1.0 1.5 1.8 Input Hysteresis Input Resistance 0.8 1.2 1.5 V VL=1.8V, TA=25°C VL=2.5V or 3.3V, TA=25°C VL=5.0V, TA=25°C 1.8 2.4 2.4 V VL=1.8V, TA=25°C VL=2.5V or 3.3V, TA=25°C VL=5.0V, TA=25°C 7 kΩ 0.3 3 5 V TA=25°C AUTO ON-LINE® CIRCUITRY CHARACTERISTICS (ONLINE = GND, SHUTDOWN = VCC) STATUS Output Voltage LOW HIGH 0.4 VL - 0.6 Receiver Threshold to Drivers Enabled (tONLINE) Receiver +/- Threshold to Status HIGH (tSTSH) to Status LOW (tSTSL) V VL-0.1 IOUT = 1.6mA, VL=2.5V, 3.3V, 5.0V or IOUT = +0.8mA, VL=1.8V IOUT = -1.0mA, VL=2.5V, 3.3V, 5.0V or IOUT = -0.5mA, VL=1.8V 200 µs 20 20 µs µs AC Characteristics Maximum Data Rate 250 kbps SP3281EB: RL = 3kΩ, CL = 1000pF, one driver switching Receiver Propagation Delay t PHL t PLH 0.15 0.15 µs Receiver input to output, CL = 150pF Receiver Output Enable Time 200 ns Normal operation Receiver Output Disable Time 200 ns Normal operation Time to Exit Shutdown 100 µs |VTXOUT|>3.7V, VCC=3.3V Driver Skew |tPHL-tPLH| 100 ns Measured at zero crossover Receiver Skew |tPHL-tPLH| 50 ns Measured at zero crossover Transition-Region Slew Rate 30 Rev. 6/19/03 V/µs VCC = 3.3V, RL = 3kΩ to 7kΩ , TA = 25°C, measurements taken from -3.0V to +3.0V or +3.0V to -3.0V CL = 150pF to 1000pF SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 3 © Copyright 2003 Sipex Corporation PIN DESCRIPTION NAME FUNCTION PIN NO. C2+ Positive terminal of the symmetrical charge-pump capacitor C2. 1 GND Ground. 2 C2- Negative terminal of the symmetrical charge-pump capacitor C2. 3 V- Regulated -4.0V or -5.5V output generated by the charge pump. 4 T1OUT RS-232 driver output. 5 T2OUT RS-232 driver output. 6 T3OUT RS-232 driver output. 7 R1IN RS-232 receiver input. 8 R2IN RS-232 receiver input. 9 T4OUT RS-232 driver output. 10 R3IN RS-232 receiver input. 11 T5OUT RS-232 driver output. 12 ONLINE Apply logic HIGH to override AUTO ON-LINE® circuitry keeping drivers active (SHUTDOWN must also be logic HIGH, refer to Table 2). SHUTDOWN STATUS VL T5IN R3OUT T4IN 13 Apply logic LOW to shut down drivers and charge pump. This overrides all AUTO ON-LINE® circuitry and ONLINE (refer to Table 2). 14 TTL/CMOS Output indicating if a RS-232 signal is present on any Rx input. 15 Logic level supply voltage selection 16 TTL/CMOS driver input. 17 TTL/CMOS receiver output. 18 TTL/CMOS driver input. 19 R2OUT TTL/CMOS receiver output. 20 R1OUT TTL/CMOS receiver output. 21 T3IN TTL/CMOS driver input. 22 T2IN TTL/CMOS driver input. 23 T1IN TTL/CMOS driver input. 24 C1- Negative terminal of the symmetrical charge-pump capacitor C1. 25 VCC +2.35V to +5.5V supply voltage. 26 V+ C1+ Regulated +4.0V or +5.5V output generated by the charge pump. 27 Positive terminal of the symmetrical charge-pump capacitor C1 28 Table 2. Device Pin Description Rev. 6/19/03 SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 4 © Copyright 2003 Sipex Corporation TYPICAL PERFOMANCE CHARACTERISTICS Unless otherwise noted, the following perfomance characteristics apply for VCC = +4.2V, 250kbps data rate, all drivers loaded with 3kΩ, 0.22µF charge pump capacitors, and TAMB = +25°C. VCC C5 28 C1+ C2+ 1 GND 2 C1 V+ 27 VCC V- 4 25 C1- C2 + TTL/CMOS INPUTS 21 R1OUT R2IN 9 20 SP3281EB + C4 24 T1IN T1OUT 5 23 T2IN T2OUT 6 22 T3IN T3OUT 7 19 T4IN T4OUT 10 17 T5IN T5OUT 12 21 R1OUT R3IN 11 18 R3OUT T5OUT 12 17 T5IN ONLINE 13 16 VL V- 0.1µF 4 3 C2- R2OUT 19 T4IN R1IN 8 R2IN 9 R3IN 11 + 0.1µF RS-232 OUTPUTS 5kΩ TTL/CMOS OUTPUTS 20 R2OUT 5kΩ 18 R3OUT RS-232 INPUTS 5kΩ VCC 14 13 15 STATUS SHUTDOWN 14 27 C3 0.1µF 23 T2IN R1IN 8 T4OUT 10 V+ 0.1µF 24 T1IN 22 T3IN T3OUT 7 26 VCC 28 C1+ 1 C2+ 26 SP3281EB + 0.1µF 25 C1- C2- 3 T1OUT 5 T2OUT 6 + SHUTDOWN ONLINE 16 V L Logic Level Select GND 2 Figure 2. SP3281EB Pinout Configuration Figure 3. SP3281EB Application Diagram VCC C5 + 26 VCC 0.1µF 28 C1 + C1+ 0.1µF 25 C11 + C2 C2+ V+ C3 0.1µF 3 27 SP3281EB V- C2- + 0.1µF 4 0.1µF C4 + 21 R1OUT R1IN 8 R2IN 9 R3IN 11 5kΩ 20 R2OUT 5kΩ 18 R3OUT 5kΩ VCC 24 T1IN T1OUT 5 23 T2IN T2OUT 6 22 T3IN T3OUT 7 19 T4IN T4OUT 10 17 T5IN T5OUT 12 14 13 To µP Supervisor Circuit DB-9 Connector SHUTDOWN ONLINE 15 STATUS VL 16 GND 2 DB-9 Connector Pins: 1. Received Line Signal Detector 2. Received Data 3. Transmitted Data 4. Data Terminal Ready 5. Signal Ground (Common) 6 7 8 9 1 2 3 4 5 6. DCE Ready 7. Request to Send 8. Clear to Send 9. Ring Indicator Figure 4. Circuit for the connectivity of the SP3281EB with a DB-9 connector Rev. 6/19/03 SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 5 © Copyright 2003 Sipex Corporation DESCRIPTION The SP3281EB device meets the EIA/TIA-232 and ITU-T V.28/V.24 communication protocols and can be implemented in battery-powered, portable, or hand-held applications such as notebook or palmtop computers. The SP3281EB device features Sipex's proprietary and patented (U.S. #5,306,954) on-board charge pump circuitry that generates ±5.5V RS-232 voltage levels from a single +3.3V to +5.5V power supply. The SP3281EB will adhere to EIA/TIA-562 voltage levels with VCC as low as 2.35V. THEORY OF OPERATION The SP3281EB device is made up of four basic circuit blocks: 1. Drivers, 2. Receivers, 3. The Sipex proprietary charge pump, and 4. AUTO ON-LINE® circuitry. Drivers The drivers are inverting level transmitters that , when VCC is between +3.3V and +5.5V, convert TTL or CMOS logic levels to 5.0V EIA/TIA-232 levels with an inverted sense relative to the input logic levels . Typically, the RS-232 output voltage swing is +5.4V with no load and +5V minimum fully loaded. The driver outputs are protected against infinite short-circuits to ground without degradation in reliability. These drivers comply with the EIA-TIA-232F and all previous RS-232 versions. The driver outputs will adhere to EIA/ TIA-562 when VCC is as low as 2.35V. The SP3281EB device is an ideal choice for power sensitive designs. The SP3281EB device features AUTO ON-LINE® circuitry which reduces the power supply drain to a 1µA supply current. In many portable or hand-held applications, an RS232 cable can be disconnected or a connected peripheral can be turned off. Under these conditions, the internal charge pump and the drivers will be shut down. Otherwise, the system automatically comes online. This feature allows design engineers to address power saving concerns without major design changes. The SP3281EB drivers can guarantee a data rate of 250 kbps fully loaded with 3kΩ in parallel with 1000pF, ensuring compatibility with PC-to-PC communication software. All unused driver inputs must be connected to VL or GND. Figure 6 shows a loopback test circuit used to test the SP3281EB RS-232 drivers. Figure 7 shows the test results of the loopback circuit with all five drivers active at 120kbps with typical RS-232 loads in parallel with 1000pF capacitors. Figure 8 shows the test results where one driver was active at 250kbps and all five drivers loaded with an RS232 receiver in parallel with a 1000pF capacitor. A solid RS-232 data transmission rate of 120kbps provides compatibility with many designs in personal computer peripherals and LAN applications. VCC C5 C1 + + 26 VCC 0.1µF 28 C1+ V+ 27 0.1µF C3 + 0.1µF 25 C11 C2+ C2 + 0.1µF RxD UART or Serial µC SP3281EB V- 4 C4 3 C224 T1IN T1OUT 5 T2OUT 6 CTS 23 T2IN DSR 22 T3IN T3OUT 7 DCD 19 T4IN T4OUT 10 RI 17 T5IN T5OUT 12 TxD 21 R1OUT RTS 20 R2OUT DTR 18 R3OUT + 0.1µF RS-232 OUTPUTS Receivers The receivers convert ±5.0V EIA/TIA-232 levels to TTL or CMOS logic output levels. R1IN 8 5kΩ R2IN 9 5kΩ VCC RS-232 INPUTS R3IN 11 5kΩ 14 13 15 SHUTDOWN VL 16 ONLINE STATUS Receivers are not active when in shutdown. If there is no activity present at the receivers for a period longer than 100µs during AUTO ONLINE® mode or when SHUTDOWN is enabled, the device goes into a standby mode where the circuit draws 1µA. The truth table logic of the driver and receiver outputs can be found in Table 3. GND 2 RESET µP Supervisor IC VIN Figure 5. Interface Circuitry Being Controlled by Microprocessor Supervisory Circuit Rev. 6/19/03 SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 6 © Copyright 2003 Sipex Corporation Since receiver input is usually from a transmission line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 300mV. This ensures that the receiver is virtually immune to noisy transmission lines. Should an input be left unconnected, an internal 5kΩ pulldown resistor to ground will commit the output of the receiver to a HIGH state. VCC C5 C1 + + 0.1µF VCC C1+ V+ 0.1µF + C3 0.1µF C1C2+ C2 + SP3281EB VC4 0.1µF + C2- RxOUT LOGIC OUTPUTS Charge Pump The charge pump is a Sipex–patented design (U.S. #5,306,954) and uses a unique approach compared to older less–efficient designs. The charge pump uses a four–phase voltage shifting technique to attain symmetrical ±5.5V power supplies. The internal power supply consists of a regulated dual charge pump that provides output voltages ±5.5V regardless of the input voltage (VCC) over the +3.3V to +5.5V range. This is important to maintain compliant RS-232 levels regardless of power supply fluctuations. The charge pump will provide output voltage levels of ±4.0V when the input voltage (VCC) is from +3.1V to +2.35V. The charge pump operates in a discontinuous mode using an internal oscillator. If the output voltages are less than a magnitude of 5.5V ( VCC > 3.3V ) and 4.0V (VCC < 3.1V), the charge pump is enabled. If the output voltages exceed a magnitude of 5.5V (VCC > 3.3V) and 4.0V (VCC < 3.1V), the charge pump is disabled. This oscillator controls the four phases of the voltage shifting (Figure 10). A description of each phase follows. Phase 1 (Figure 11) TxOUT TxIN LOGIC INPUTS 0.1µF RxIN 1000pF 5kΩ VCC ONLINE SHUTDOWN GND Figure 6. Loopback Test Circuit for RS-232 Driver Data Transmission Rates Figure 7. Loopback Test Circuit Result at 120kbps (All Drivers Fully Loaded) [ T ] +6V a) C2+ T 1 2 2 0V 0V b) C2T -6V Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 1.96V Figure 8. Loopback Test Circuit result at 250kbps (All Drivers Fully Loaded) Rev. 6/19/03 Figure 10. Charge Pump Waveforms SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 7 © Copyright 2003 Sipex Corporation from VCC, in a no–load condition V+ and V– will be symmetrical. Older charge pump approaches that generate V– from V+ will show a decrease in the magnitude of V– compared to V+ due to the inherent inefficiencies in the design. — VSS charge storage — During this phase of the clock cycle, the positive side of capacitors C1 and C2 are initially charged to VCC. Cl+ is then switched to GND and the charge in C1– is transferred to C2– . Since C2+ is connected to VCC, the voltage potential across capacitor C2 is now 2 times VCC. The clock rate for the charge pump typically operates at 500kHz. The external capacitors should be 0.22µF with a 16V working voltage rating for a VCC input range of +2.35V to +5.5V. Phase 2 (Figure 12) — VSS transfer — Phase two of the clock connects the negative terminal of C2 to the VSS storage capacitor and the positive terminal of C2 to GND. This transfers a negative generated voltage to C 3 . This generated voltage is regulated to a minimum voltage of -5.5V (VCC > 3.3V) and -4.0V (VCC < 3.1V). Simultaneous with the transfer of the voltage to C3, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND. Charge Pump Capacitor Selection The charge pump capacitors C1-C4 and bypass C5 can be of any type including ceramic. If polarized capacitors are used, refer to figure 3 application diagram for proper orientation. The following chart illustrates the minimum capacitor valve for a given input voltage range. Phase 3 (Figure 13) — VDD charge storage — The third phase of the clock is identical to the first phase — the charge transferred in C1 produces –VCC in the negative terminal of C1, which is applied to the negative side of capacitor C2. Since C2+ is at VCC, the voltage potential across C2 is 2 times VCC. Phase 4 (Figure 14) — VDD transfer — The fourth phase of the clock connects the negative terminal of C2 to GND, and transfers this positive generated voltage across C2 to C4, the VDD storage capacitor. This voltage is regulated to +5.5V (V CC>3.3V) and +4.0V(VCC<3.1V). At this voltage, the internal oscillator is disabled. Simultaneous with the transfer of the voltage to C4, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND, allowing the charge pump cycle to begin again. The charge pump cycle will continue as long as the operational conditions for theinternal oscillator are present. VCC (V) C1 and C5 (µF) 3.0 to 3.6 0.1 C2,C3,C4 (µF) 0.1 4.5 to 5.5 0.047 0.33 2.35 to 5.5 0.22 0.22 Since both V+ and V– are separately generated VCC +VCC + C1 - C2 C4 + - VDD Storage Capacitor + - - + VSS Storage Capacitor C3 -VCC -VCC Figure 11. Charge Pump — Phase 1 Rev. 6/19/03 SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 8 © Copyright 2003 Sipex Corporation VCC C4 + + C1 - VDD Storage Capacitor + C2 - - + VSS Storage Capacitor C3 -5.5V or -4.0V Figure 12. Charge Pump — Phase 2 VCC +VCC + C1 - C4 + - VDD Storage Capacitor + C2 - - + VSS Storage Capacitor C3 -VCC -VCC Figure 13. Charge Pump — Phase 3 VCC +5.5V or +4.0V + C1 - C2 C4 + - VDD Storage Capacitor + - - + VSS Storage Capacitor C3 Figure 14. Charge Pump — Phase 4 Inactive Detection Block S H U T RECEIVER +2.7V 0V RS-232 INPUT VOLTAGES -2.7V RXINACT D O W N VCC STATUS RXIN RS-232 Receiver Block 0V RXOUT tSTSL tSTSH tONLINE +5V DRIVER RS-232 OUTPUT VOLTAGES Figure 15. Stage I of AUTO ON-LINE® Circuitry 0V -5V Figure 17. AUTO ON-LINE® Timing Waveforms Rev. 6/19/03 SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 9 © Copyright 2003 Sipex Corporation Delay Stage Delay Stage Delay Stage R2 INACT R3 INACT STATUS R1 INACT Figure 16. Stage II of AUTO ON-LINE® Circuitry SHUTDOWN INPUT ONLINE INPUT RS-232 SIGNAL AT RECEIVER INPUT STATUS OUTPUT TXOUT RXOUT TRANSCEIVER STATUS HIGH - YES HIGH Active Active Normal Operation HIGH HIGH NO LOW Active Active Normal Operation HIGH LOW NO LOW High-Z Active LOW - YES HIGH High-Z High-Z Shutdown LOW - NO LOW High-Z High-Z Shutdown AUTO ON-LINE® Mode Table 3. AUTO ON-LINE® Logic AUTO ON-LINE® Circuitry The SP3281EB device has a patent pending AUTO ON-LINE® circuitry on board that saves power in applications such as laptop computers, palmtop (PDA) computers, and other portable systems. receiver input typically sees at least +3V, which are generated from the transmitters at the other end of the cable with a +5V minimum. When the external transmitters are disabled or the cable is disconnected, the receiver inputs will be pulled down by their internal 5kΩ resistors to ground. When this occurs over a period of time, the internal transmitters will be disabled and the device goes into a shutdown or standby mode. When ONLINE is HIGH, the AUTO ON-LINE® mode is disabled. The SP3281EB device incorporates an AUTO ON-LINE® circuit that automatically enables itself when the external transmitters are enabled and the cable is connected. Conversely, the AUTO ON-LINE® circuit also disables most of the internal circuitry when the device is not being used and goes into a standby mode where the device typically draws 1µA. This function is controlled by the ONLINE pin. When this pin is tied to a logic LOW, the AUTO ON-LINE® function is active. Once active, the device is enabled until there is no activity on the receiver inputs. The Rev. 6/19/03 The AUTO ON-LINE® circuit has two stages: 1) Inactive Detection 2) Accumulated Delay The first stage, shown in Figure 15, detects an inactive input. A logic HIGH is asserted on RXINACT if the cable is disconnected or the SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 10 © Copyright 2003 Sipex Corporation a) MIL-STD-883, Method 3015.7 b) IEC1000-4-2 Air-Discharge c) IEC1000-4-2 Direct Contact external transmitters are disabled. Otherwise, RXINACT will be at a logic LOW. This circuit is duplicated for each of the other receivers. The Human Body Model has been the generally accepted ESD testing method for semiconductors. This method is also specified in MIL-STD-883, Method 3015.7 for ESD testing. The premise of this ESD test is to simulate the human body’s potential to store electro-static energy and discharge it to an integrated circuit. The simulation is performed by using a test model as shown in Figure 18. This method will test the IC’s capability to withstand an ESD transient during normal handling such as in manufacturing areas where the ICs tend to be handled frequently. ON-LINE® The second stage of the AUTO circuitry, shown in Figure 16, processes all the receiver's RXINACT signals with an accumulated delay that disables the device to a 1µA supply current. The STATUS pin goes to a logic LOW when the cable is disconnected, or when the external transmitters are disabled. When the drivers or internal charge pump are disabled, the supply current is reduced to 1µA. This can commonly occur in hand-held or portable applications where the RS-232 cable is disconnected or the RS-232 drivers of the connected peripheral are turned off. The IEC-1000-4-2, formerly IEC801-2, is generally used for testing ESD on equipment and systems. For system manufacturers, they must guarantee a certain amount of ESD protection since the system itself is exposed to the outside environment and human presence. The premise with IEC1000-4-2 is that the system is required to withstand an amount of static electricity when ESD is applied to points and surfaces of the equipment that are accessible to personnel during normal usage. The transceiver IC receives most of the ESD current when the ESD source is applied to the connector pins. The test circuit for IEC10004-2 is shown on Figure 19. There are two methods within IEC1000-4-2, the Air Discharge method and the Contact Discharge method. The AUTO ON-LINE® mode can be disabled by the SHUTDOWN pin. If this pin is a logic LOW, the AUTO ON-LINE® function will not operate regardless of the logic state of the ONLINE pin. Table 3 summarizes the logic of the AUTO ONLINE® operating modes and the truth table logic of the driver and receiver outputs. When the SP3281EB device is shut down, the charge pump is turned off. V+ charge pump output decays to VCC, the V- output decays to GND. The decay time will depend on the size of capacitors used for the charge pump. Once in shutdown, the time required to exit the shut down state and have valid V+ and V- levels is typically 200µs. With the Air Discharge Method, an ESD voltage is applied to the equipment under test (EUT) through air. This simulates an electrically charged person ready to connect a cable onto the rear of the system only to find an unpleasant zap just before the person touches the back panel. The high energy potential on the person discharges through an arcing path to the rear panel of the system before he or she even touches the system. This energy, whether discharged directly or through air, is predominantly a function of the discharge current rather than the discharge voltage. Variables with an air discharge such as approach speed of the object carrying the ESD potential to the system and humidity will tend to change the discharge current. For example, the rise time of the discharge current varies with the approach speed. For easy programming, the STATUS pin can be used to indicate DTR or a Ring Indicator signal. Tying ONLINE and SHUTDOWN together will bypass the AUTO ON-LINE® circuitry so this connection acts like a shutdown input pin. ESD TOLERANCE The SP3281EB device incorporates ruggedized ESD cells on all driver output and receiver input pins. The ESD structure is improved over our previous family for more rugged applications and environments sensitive to electro-static discharges and associated transients. The improved ESD tolerance is at least +15kV without damage nor latchup. The Contact Discharge Method applies the ESD current directly to the EUT. This method was There are different methods of ESD testing applied: Rev. 6/19/03 SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 11 © Copyright 2003 Sipex Corporation devised to reduce the unpredictability of the ESD arc. The discharge current rise time is constant since the energy is directly transferred without the air-gap arc. In situations such as hand held systems, the ESD charge can be directly discharged to the equipment from a person already holding the equipment. The current is transferred on to the keypad or the serial port of the equipment directly and then travels through the PCB and finally to the IC. i➙ The higher CS value and lower RS value in the IEC1000-4-2 model are more stringent than the Human Body Model. The larger storage capacitor injects a higher voltage to the test point when SW2 is switched on. The lower current limiting resistor increases the current charge onto the test point. The circuit model in Figures 18 and 19 represent the typical ESD testing circuit used for all three methods. The CS is initially charged with the DC power supply when the first switch (SW1) is on. Now that the capacitor is charged, the second switch (SW2) is on while SW1 switches off. The voltage stored in the capacitor is then applied through RS, the current limiting resistor, onto the device under test (DUT). In ESD tests, the SW2 switch is pulsed so that the device under test receives a duration of voltage. For the Human Body Model, the current limiting resistor (RS) and the source capacitor (CS) are 1.5kΩ an 100pF, respectively. For IEC-1000-4-2, the current limiting resistor (RS) and the source capacitor (CS) are 330Ω an 150pF, respectively. 30A 15A 0A t=0ns t=30ns t➙ Figure 20. ESD Test Waveform for IEC1000-4-2 RSS RC C SW2 SW1 Device Under Test CSS DC Power Source Figure 18. ESD Test Circuit for Human Body Model Contact-Discharge Module R RSS RC C RV SW2 SW1 Device Under Test CSS DC Power Source RS and RV add up to 330Ω 330 for IEC1000-4-2. Figure 19. ESD Test Circuit for IEC1000-4-2 Rev. 6/19/03 SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 12 © Copyright 2003 Sipex Corporation DEVICE PIN TESTED HUMAN BODY MODEL Air Discharge Driver Outputs Receiver Inputs ±15kV ±15kV ±15kV ±15kV IEC1000-4-2 Direct Contact Level 4 4 ±8kV ±8kV Table 4. Transceiver ESD Tolerance Levels PACKAGE: PLASTIC SHRINK SMALL OUTLINE (SSOP) E H D A Ø e B A1 L DIMENSIONS (Inches) Minimum/Maximum (mm) Rev. 6/19/03 28–PIN A 0.068/0.078 (1.73/1.99) A1 0.002/0.008 (0.05/0.21) B 0.010/0.015 (0.25/0.38) D 0.397/0.407 (10.07/10.33) E 0.205/0.212 (5.20/5.38) e 0.0256 BSC (0.65 BSC) H 0.301/0.311 (7.65/7.90) L 0.022/0.037 (0.55/0.95) Ø 0°/8° (0°/8°) SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 13 © Copyright 2003 Sipex Corporation PACKAGE: PLASTIC THIN SMALL OUTLINE (TSSOP) E2 E D A Ø e B A1 DIMENSIONS in inches (mm) Minimum/Maximum Rev. 6/19/03 L 28–PIN A - /0.043 (- /1.10) A1 0.002/0.006 (0.05/0.15) B 0.007/0.012 (0.19/0.30) D 0.378/0.386 (9.60/9.80) E 0.169/0.177 (4.30/4.50) e 0.026 BSC (0.65 BSC) E2 0.126BSC (3.20BSC) L 0.020/0.030 (0.50/0.75) Ø 0°/8° SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 14 © Copyright 2003 Sipex Corporation ORDERING INFORMATION Model Temperature Range Package Types SP3281EBCA ................................................. 0°C to +70°C ..................................................... 28-pin SSOP SP3281EBCY .................................................. 0°C to +70°C ................................................... 28-pin TSSOP SP3281EBEA ................................................. 40°C to +85°C .................................................... 28-pin SSOP SP3281EBEY ................................................. 40°C to +85°C .................................................. 28-pin TSSOP Please consult the factory for pricing and availability on a Tape-On-Reel option. Corporation ANALOG EXCELLENCE Sipex Corporation Headquarters and Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Sales Office 22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: [email protected] Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Rev. 6/19/03 SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers 15 © Copyright 2003 Sipex Corporation