WEIDA WCFS1016C1C

S1016C1C
WCFS1016C1C
64K x 16 Static RAM
Features
• High speed
— tAA = 12, 15 ns
• CMOS for optimum speed/power
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in 400-mil SOJ
Functional Description
The WCFS1016C1C is a high-performance CMOS static RAM
organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power
consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is
written into the location specified on the address pins (A0
through A15). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O9 through I/O16) is written into the location
specified on the address pins (A0 through A15).
Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then
data from the memory location specified by the address pins
will appear on I/O1 to I/O8. If Byte High Enable (BHE) is LOW,
then data from memory will appear on I/O9 to I/O16. See the
truth table at the back of this data sheet for a complete description of read and write modes.
The input/output pins (I/O1 through I/O16) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The WCFS1016C1C is available in 400-mil-wide SOJ packages.
Logic Block Diagram
Pin Configuration
SOJ
Top View
64K x 16
RAM Array
512 X 2048
SENSE AMPS
A7
A6
A5
A4
A3
A2
A1
A0
ROW DECODER
DATA IN DRIVERS
I/O1–I/O8
I/O9–I/O16
A8
A9
A10
A11
A12
A13
A14
A15
COLUMN DECODER
BHE
WE
CE
OE
BLE
A4
A3
A2
A1
A0
CE
I/O1
I/O2
I/O3
I/O4
VCC
VSS
I/O5
I/O6
I/O7
I/O8
WE
A15
A14
A13
A12
NC
1
44
2
3
4
43
42
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
BHE
BLE
I/O16
I/O15
I/O14
I/O13
VSS
VCC
I/O12
I/O11
I/O10
I/O9
NC
A8
A9
A10
A11
NC
Selection Guide
WCFS1016C1C 12ns
WCFS1016C1C 15ns
Maximum Access Time (ns)
12
15
Maximum Operating Current (mA)
140
130
Maximum CMOS Standby Current (mA)
10
10
Revised February 14, 2002
WCFS1016C1C
Maximum Ratings
Current into Outputs (LOW) ........................................ 20 mA
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Static Discharge Voltage............................................ >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current..................................................... >200 mA
Operating Range
Supply Voltage on VCC to Relative GND[1] .... –0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State[1] ......................................–0.5V to VCC+0.5V
Range
Commercial
Ambient
Temperature[2]
VCC
0°C to +70°C
5V ± 10%
DC Input Voltage[1]...................................–0.5V to VCC+0.5V
Electrical Characteristics Over the Operating Range
Test
Conditions
Parameter
Description
WCFS1016C1C 12ns
Min.
Max.
VOH
Output HIGH
Voltage
VCC = Min.,
IOH = –4.0 mA
2.4
VOL
Output LOW
Voltage
VCC = Min.,
IOL = 8.0 mA
VIH
Input HIGH
Voltage
2.2
6.0
VIL
Input LOW
Voltage[1]
–0.5
IIX
Input Load
Current
GND < VI < VCC
IOZ
Output
Leakage
Current
GND < VI < VCC,
Output Disabled
IOS
Output Short
Circuit
Current[3]
VCC = Max.,
VOUT = GND
ICC
VCC
Operating
Supply
Current
ISB1
ISB2
WCFS1016C1C 15ns
Min.
Max.
2.4
0.4
Unit
V
0.4
V
2.2
6.0
V
0.8
–0.5
0.8
V
–1
+1
–1
+1
µA
–1
+1
–1
+1
µA
–300
–300
mA
VCC = Max.,
IOUT = 0 mA,
f = fMAX = 1/tRC
140
130
mA
Automatic CE
Power-Down
Current
—TTL Inputs
Max. VCC,
CE > VIH
VIN > VIH or
VIN < VIL,
f = fMAX
40
40
mA
Automatic CE
Power-Down
Current
—CMOS
Inputs
Max. VCC,
CE >
VCC – 0.3V, VIN >
VCC – 0.3V,
or VIN < 0.3V, f = 0
10
10
mA
Notes:
1. VIL (min.) = –2.0V for pulse durations of less than 20 ns.
2. TA is the “Instant On” case temperature.
3. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
Page 2 of 9
WCFS1016C1C
Capacitance[4]
Parameter
Description
CIN
Input Capacitance
COUT
Output Capacitance
Test Conditions
TA = 25°C, f = 1 MHz,
VCC = 5.0V
Max.
Unit
8
pF
8
pF
AC Test Loads and Waveforms
R 481 Ω
R 481 Ω
5V
5V
OUTPUT
90%
OUTPUT
30 pF
R2
255Ω
INCLUDING
JIG AND
SCOPE
(a)
OUTPUT
Equivalent to: THÉVENIN
EQUIVALENT
ALL INPUT PULSES
3.0V
R2
255Ω
5 pF
INCLUDING
JIG AND
SCOPE
(b)
167
GND
Rise Time: 1 V/ns
10%
90%
10%
Fall Time:1 V/ns
1021B-3
1.73V
30 pF
Notes:
4. Tested initially and after any design or process changes that may affect
these parameters
Page 3 of 9
WCFS1016C1C
Switching Characteristics[5] Over the Operating Range
WCFS1016C1C 12ns
Parameter
Description
Min.
Max.
WCFS1016C1C 15ns
Min.
Max.
Unit
READ CYCLE
tRC
Read Cycle Time
12
tAA
Address to Data Valid
tOHA
Data Hold from Address Change
tACE
CE LOW to Data Valid
12
15
ns
tDOE
OE LOW to Data Valid
6
7
ns
[6]
tLZOE
OE LOW to Low Z
tHZOE
OE HIGH to High Z[6, 7]
tLZCE
CE LOW to Low
Z[6]
CE HIGH to High
tPU
CE LOW to Power-Up
tPD
CE HIGH to Power-Down
tDBE
Byte Enable to Data Valid
tLZBE
Byte Enable to Low Z
tHZBE
WRITE
12
3
15
3
ns
7
3
6
0
7
6
0
ns
ns
15
ns
7
ns
0
6
ns
ns
0
12
ns
ns
0
6
Byte Disable to High Z
ns
3
0
Z[6, 7]
tHZCE
15
ns
7
ns
CYCLE[8]
tWC
Write Cycle Time
12
15
ns
tSCE
CE LOW to Write End
9
10
ns
tAW
Address Set-Up to Write End
8
10
ns
tHA
Address Hold from Write End
0
0
ns
tSA
Address Set-Up to Write Start
0
0
ns
tPWE
WE Pulse Width
8
10
ns
tSD
Data Set-Up to Write End
6
8
ns
tHD
Data Hold from Write End
0
0
ns
3
3
ns
tLZWE
[6]
WE HIGH to Low Z
Z[6, 7]
tHZWE
WE LOW to High
tBW
Byte Enable to End of Write
6
8
7
9
ns
ns
Notes:
5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the
specified IOL/IOH and 30-pF load capacitance.
6. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device.
7. tHZOE, tHZBE, tHZCE, and tHZWE are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
8. The internal write time of the memory is defined by the overlap of CE LOW, WE LOW and BHE / BLE LOW. CE, WE and BHE / BLE must be LOW to initiate
a write, and the transition of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that
terminates the write.
Page 4 of 9
WCFS1016C1C
Switching Waveforms
Read Cycle No. 1
[9, 10]
tRC
ADDRESS
tAA
tOHA
DATA OUT
PREVIOUS DATA VALID
Read Cycle No. 2 (OE Controlled)
DATA VALID
[10, 11]
ADDRESS
tRC
CE
tACE
OE
tHZOE
tDOE
BHE, BLE
tLZOE
tHZCE
tDBE
tLZBE
DATA OUT
HIGH IMPEDANCE
tLZCE
VCC
SUPPLY
CURRENT
tHZBE
HIGH
IMPEDANCE
DATA VALID
tPD
tPU
50%
IICC
CC
50%
IISB
SB
Notes:
9. Device is continuously selected. OE, CE, BHE and/or BHE = VIL.
10. WE is HIGH for read cycle.
11. Address valid prior to or coincident with CE transition LOW.
Page 5 of 9
WCFS1016C1C
Switching Waveforms (continued)
Write Cycle No. 1 (CE Controlled)
[12, 13]
tWC
ADDRESS
CE
tSA
tSCE
tAW
tHA
tPWE
WE
tBW
BHE, BLE
tSD
tHD
DATA I/O
Write Cycle No. 2 (BLE or BHE Controlled)
tWC
ADDRESS
BHE, BLE
tSA
tBW
tAW
tHA
tPWE
WE
tSCE
CE
tSD
tHD
DATA I/O
Notes:
12. Data I/O is high impedance if OE or BHE and/or BLE= VIH.
13. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
Page 6 of 9
WCFS1016C1C
Switching Waveforms (continued)
Write Cycle No. 3 (WE Controlled, LOW)
tWC
ADDRESS
tSCE
CE
tAW
tHA
tSA
tPWE
WE
tBW
BHE, BLE
tHZWE
tSD
tHD
DATA I/O
tLZWE
Truth Table
CE
OE
H
X
L
L
L
X
WE
BLE
BHE
X
X
X
High Z
High Z
Power-Down
Standby (ISB)
H
L
L
Data Out
Data Out
Read - All bits
Active (ICC)
L
H
Data Out
High Z
Read - Lower bits only
Active (ICC)
H
L
High Z
Data Out
Read - Upper bits only
Active (ICC)
L
L
Data In
Data In
Write - All bits
Active (ICC)
L
H
Data In
High Z
Write - Lower bits only
Active (ICC)
H
L
High Z
Data In
Write - Upper bits only
Active (ICC)
L
I/O1–I/O8
I/O9–I/O16
Mode
Power
L
H
H
X
X
High Z
High Z
Selected, Outputs Disabled
Active (ICC)
L
X
X
H
H
High Z
High Z
Selected, Outputs Disabled
Active (ICC)
Ordering Information
Speed
(ns)
Ordering Code
Package
Name
Package Type
12
WCFS1016C1C-JC12
J
44-Lead (400-Mil) Molded SOJ
15
WCFS1016C1C-JC15
J
44-Lead (400-Mil) Molded SOJ
Operating
Range
Commercial
Page 7 of 9
WCFS1016C1C
Package Diagrams
44-Lead (400-Mil) Molded SOJ J
Page 8 of 9
WCFS1016C1C
Document Title: WCFS1016C1C 64K x 16 Static RAM
REV.
Issue Date
Orig. of Change
Description of Change
**
4/15/02
XFL
New Datasheet
Page 9 of 9