WCMA4008C1X 512K x 8 Static RAM Features • Voltage Range — 4.5V–5.5V • Low active power — Typical active current: 2.5 mA @ f = 1 MHz • • • • • — Typical active current: 12.5 mA @ f = fmax Low standby current Automatic power-down when deselected TTL-compatible inputs and outputs Easy memory expansion with CE and OE features CMOS for optimum speed/power Functional Description The WCMA4008C1X is a high-performance CMOS static RAM organized as 512K words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers. This device has an automatic power-down feature that reduces power consumption by more than 99% when deselected. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18). Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH for read. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins. The eight input/output pins (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, and WE LOW). The WCMA4008C1X is available in a standard 32-pin 450-mil-wide body width SOIC. Logic Block Diagram Pin Configuration Top View SOIC I/O0 INPUT BUFFER CE I/O1 I/O2 512 x 256 x 8 ARRAY I/O3 I/O4 I/O5 COLUMN DECODER POWER DOWN I/O6 I/O7 A2 A3 A15 A18 A13 A8 A A119 A10 WE OE SENSE AMPS ROW DECODER A0 A1 A4 A5 A6 A7 A12 A14 A16 A17 A17 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 A18 WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 WCMA4008C1X Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage on VCC to Relative GND ....... –0.5V to +7.0V DC Voltage Applied to Outputs in High Z State[1] .....................................–0.5V to VCC +0.5V DC Input Voltage[1]..................................–0.5V to VCC +0.5V Current into Outputs (LOW) .........................................20 mA Static Discharge Voltage...............................................2001V (per MIL-STD-883, Method 3015) Latch-Up Current .....................................................>200 mA Product Portfolio Power Dissipation Operating, Icc VCC Range Product WCMA4008C1X Standby (ISB2) f = fmax Min. Typ. Max. Speed 4.5 V 5.0V 5.5V 70 ns Temp. Ind’l Typ.[3] Max. Typ.[2] Max. 12.5 mA 20 mA 4 µA 20 µA Operating Range Range Industrial Ambient Temperature VCC –40°C to +85°C 4.5V–5.5V Notes: 1. VIL (min.) = –2.0V for pulse durations of less than 20 ns. 2. Typical values are measured at VCC = 5V, TA = 25°C, and are included for reference only and are not tested or guaranteed. Page 2 of 10 WCMA4008C1X Electrical Characteristics Over the Operating Range WCMA4008C1X Parameter Description Test Conditions Min. 2.4 VOH Output HIGH Voltage VCC = Min., IOH = – 1 mA VOL Output LOW Voltage VCC = Min., IOL = 2.1 mA VIH Input HIGH Voltage VIL Input LOW Voltage IIX Input Leakage Current GND ≤ VI ≤ VCC IOZ Output Leakage Current GND ≤ VI ≤ VCC, Output Disabled ICC VCC Operating Supply Current f = fMAX = 1/tRC ISB1 Automatic CE Power-Down Current —TTL Inputs Max. VCC,CE ≥ VIH VIN ≥ VIH or VIN ≤ VIL, f = fMAX ISB2 Automatic CE Power-Down Current —CMOS Inputs Max. VCC, CE ≥ VCC – 0.3V, VIN ≥ VCC – 0.3V, or VIN ≤ 0.3V, f =0 f = 1 MHz Typ.[2] Max. Unit V 0.4 V 2.2 VCC +0.3 V –0.3 0.8 V –1 +1 µA –1 +1 µA 20 mA IOUT =0 mA VCC = Max., 12.5 2.5 mA 4 1.5 mA 20 µA Capacitance[3] Parameter Description CIN Input Capacitance COUT Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC = 5.0V Max. Unit 6 pF 8 pF AC Test Loads and Waveforms R1 1800Ω R1 1800 Ω 5V ALL INPUT PULSES 5V OUTPUT 100 pF INCLUDING JIG AND SCOPE (a) OUTPUT R2 5 pF 990 Ω INCLUDING JIG AND SCOPE (b) 3.0V 90% R2 990 Ω GND ≤ 3 ns 10% 90% 10% ≤ 3 ns Equivalent to: THEVENIN EQUIVALENT 639 Ω 1.77V OUTPUT Note: 3. Tested initially and after any design or process changes that may affect these parameters. Page 3 of 10 WCMA4008C1X Switching Characteristics[4] Over the Operating Range WCMA4008C1X Parameter Description Min. Max. Unit READ CYCLE tRC Read Cycle Time tAA Address to Data Valid 70 tOHA Data Hold from Address Change tACE CE LOW to Data Valid tDOE OE LOW to Data Valid tLZOE OE LOW to Low Z[5] 10 OE HIGH to High Z [5] tLZCE CE LOW to Low Z tHZCE CE HIGH to High Z tPU CE LOW to Power-Up tPD 70 ns 35 ns ns 25 10 [5, 6] ns ns 25 0 CE HIGH to Power-Down ns ns 5 [5, 6] tHZOE ns 70 ns ns 70 ns [7] WRITE CYCLE tWC Write Cycle Time 70 ns tSCE CE LOW to Write End 60 ns tAW Address Set-Up to Write End 60 ns tHA Address Hold from Write End 0 ns tSA Address Set-Up to Write Start 0 ns tPWE WE Pulse Width 55 ns tSD Data Set-Up to Write End 30 ns tHD Data Hold from Write End 0 ns [5] tLZWE WE HIGH to Low Z tHZWE WE LOW to High Z[5, 6] 5 ns 25 ns Notes: 4. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 100-pF load capacitance. 5. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 6. tHZOE, tHZCE, and tHZWE are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage. 7. The internal write time of the memory is defined by the overlap of CE LOW, and WE LOW. CE and WE must be LOW to initiate a write, and the transition of any of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write. Page 4 of 10 WCMA4008C1X Data Retention Characteristics (Over the Operating Range) Parameter Description Conditions VDR VCC for Data Retention ICCDR Data Retention Current tCDR[3] Chip Deselect to Data Retention Time tR[8] Operation Recovery Time Min. Typ.[2] Max. 2.0 No input may exceed VCC + 0.3V VCC = VDR = 3.0V CE > VCC – 0.3V VIN > VCC – 0.3V or VIN < 0.3V Unit V 20 µA 0 ns tRC ns Data Retention Waveform DATA RETENTION MODE VCC 3.0V tCDR VDR > 2V 3.0V tR CE Page 5 of 10 WCMA4008C1X Switching Waveforms Read Cycle No.1[9, 10] tRC ADDRESS tAA tOHA DATA OUT PREVIOUS DATA VALID DATA VALID Read Cycle No. 2 (OE Controlled)[10, 11] ADDRESS tRC CE tACE OE tHZOE tDOE DATA OUT tLZOE HIGH IMPEDANCE tHZCE DATA VALID tLZCE VCC SUPPLY CURRENT HIGH IMPEDANCE tPD tPU 50% 50% ISB Notes: 8. Full Device operatin requires linear VCC ramp from VDR to VCC(min) > 100 µs or stable at Vcc(min) > 100 µs. 9. Device is continuously selected. OE, CE = VIL. 10. WE is HIGH for read cycle. 11. Address valid prior to or coincident with CE transition LOW. Page 6 of 10 WCMA4008C1X Switching Waveforms (continued) Write Cycle No. 1 (CE Controlled)[12] tWC ADDRESS tSCE CE tSA tAW tHA tPWE WE tSD DATA I/O tHD DATA VALID Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[12, 13] tWC ADDRESS tSCE CE tHZCE tAW tSA tHA tPWE WE OE tSD DATA I/O tHD DATAIN VALID NOTE 14 tHZOE Notes: 12. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. 13. Data I/O is high-impedance if OE = VIH. 14. During this period the I/Os are in the output state and input signals should not be applied. Page 7 of 10 WCMA4008C1X Switching Waveforms (continued) Write Cycle No.3 (WE Controlled, OE LOW)[12, 13] tWC ADDRESS tSCE CE tHZCE tAW tSA tHA tPWE WE tSD NOTE 14 DATAI/O tHD DATA VALID tLZWE tHZWE Truth Table CE OE WE I/O0 – I/O7 Mode Power H X X High Z Power-Down Standby (ISB) L L H Data Out Read Active (ICC) L X L Data In Write Active (ICC) L H H High Z Selected, Outputs Disabled Active (ICC) Page 8 of 10 WCMA4008C1X Ordering Information Speed (ns) 70 Ordering Code WCMA4008C1X-GF70 Package Name G32 Package Type 32-Lead (450-Mil) Molded SOIC Operating Range Industrial Package Diagrams 32-Lead (450 MIL) Molded SOIC, G32 Page 9 of 10 WWW.ALLDATASHEET.COM Copyright © Each Manufacturing Company. All Datasheets cannot be modified without permission. This datasheet has been download from : www.AllDataSheet.com 100% Free DataSheet Search Site. Free Download. No Register. Fast Search System. www.AllDataSheet.com