TI SN74AHC1G09DCKR

SN74AHC1G09
SCLS724B – MAY 2011 – REVISED JULY 2011
www.ti.com
SINGLE 2–INPUT POSITIVE–AND GATE WITH OPEN DRAIN OUTPUT
Check for Samples: SN74AHC1G09
FEATURES
•
1
•
•
•
•
Operating Range 2-V to 5.5-V
Max tpd of 6 ns at 5-V
±8-mA Output Drive at 5-V
Schmitt-Trigger Action at All Inputs Makes the
Circuit Tolerant for Slower Input Rise and Fall
Time
•
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DCK PACKAGE
(TOP VIEW)
DBV PACKAGE
(TOP VIEW)
A
1
B
2
GND
3
A
1
B
2
GND
3
5
V CC
4
Y
V CC
5
Y
4
DESCRIPTION/ORDERING INFORMATION
Single 2-input Positive–AND Gate With open drain output.
ORDERING INFORMATION
TA
–55°C to 125°C
(1)
(2)
PACKAGE
ORDERABLE
PART NUMBER
(1)
TOP-SIDE
MARKING (2)
SOT (SOT-23) – DBV
Reel of 3000
SN74AHC1G09DBVR
A09_
SOT (SC-70) – DCK
Reel of 3000
SN74AHC1G09DCKR
AJ_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUTS
(1)
OUTPUTY
A
B
Y
H
H
H(Z) (1)
L
X
L
X
L
L
High impedance output state.
Requires a pull-up resistor to get a
high.
LOGIC DIAGRAM
A
B
1
2
4
Y
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
SN74AHC1G09
SCLS724B – MAY 2011 – REVISED JULY 2011
www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE
UNIT
Supply voltage range, VCC
–0.5 to 7
V
Input voltage range, VI (2)
–0.5 to 7
V
Output voltage range, VO (2)
–0.5 to VCC + 0.7
V
Input clamp current, IIK (VI < 0)
–20
mA
Output clamp current, IOK (VO < 0 or VO > VCC)
–20
mA
Continuous output current, IO (VO = 0 to VCC)
±25
mA
Continuous current through VCC or GND
±50
mA
Package thermal impedance, θJA
Storage temperature range, Tstg
(1)
(2)
(3)
2
(3)
206
DCK package (3)
252
DBV package
–65 to 150
°C/W
°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
The package thermal impedance is calculated in accordance with JESD 51-7.
Copyright © 2011, Texas Instruments Incorporated
SN74AHC1G09
SCLS724B – MAY 2011 – REVISED JULY 2011
www.ti.com
RECOMMENDED OPERATING CONDITIONS (1)
MIN
VCC
MAX
Supply voltage
2
VIH
VCC = 2 V
1.5
VCC = 3 V
2.1
VCC = 5.5 V
UNIT
5.5
V
V
3.85
VCC = 2 V
0.5
VCC = 3 V
0.9
VIL
Low-level Input voltage
VI
Input Voltage
0
5.5
V
VO
Output voltage
0
5.5
V
50
µA
IOL
Low-level output current
VCC = 5.5 V
1.65
VCC = 2 V
Δt/Δv
Input Transition rise or fall rate
TA
Operating free-air temperature
(1)
V
VCC = 3.3 V ± 0.3 V
4
VCC = 5 V ± 0.5 V
8
VCC = 3.3 V ± 0.3 V
mA
100
VCC = 5 V ± 0.5 V
ns/V
20
–55
°C
125
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA = 25°C
VCC
MIN
IOL = 50 µA
VOL
II
TYP
MAX
TA = –40°C to
85°C
TA = –55°C to
125°C
MIN
MIN
MAX
UNIT
MAX
2V
0.1
0.1
0.1
3V
0.1
0.1
0.1
4.5 V
0.1
0.1
0.1
IOL = 4 mA
3V
0.36
0.44
0.55
IOL = 8 mA
4.5 V
0.36
0.44
0.55
0 V to 5.5 V
±0.1
±1
±2
µA
1
10
20
µA
10
10
10
pF
VI = 5.5 V or GND
ICC
VI = VCC or GND, IO = 0
Ci
VI = VCC or GND
Copyright © 2011, Texas Instruments Incorporated
5.5 V
5V
4
V
3
SN74AHC1G09
SCLS724B – MAY 2011 – REVISED JULY 2011
www.ti.com
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPD
TA = –40°C to
85°C
TA = 25°C
TA = –55°C to
125°C
FROM
(INPUT)
TO
(OUTPUT)
OUTPUT
CAPACITANCE
A or B
Y
CL = 15 pF
3.6
7.0
1.0
8.0
1.0
8.5
ns
A or B
Y
CL = 50 pF
6.5
11.0
1.5
12.0
1.5
12.5
ns
MIN
TYP
MAX
MIN
MAX
MIN
UNIT
MAX
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPD
FROM
(INPUT)
TO
(OUTPUT)
OUTPUT
CAPACITANCE
A or B
Y
A or B
Y
TA = –40°C to
85°C
TA = 25°C
MIN
MIN
MAX
TA = –55°C to
125°C
MIN
UNIT
TYP
MAX
MAX
CL = 15 pF
2.5
5.0
1.0
6.0
1.0
6.5
ns
CL = 50 pF
4.6
7.5
1.5
8.0
1.5
8.5
ns
OPERATING CHARACTERISTICS
VCC = 5 V, TA = 25°C
PARAMETER
Cpd
4
Power dissipation capacitance
TEST CONDITIONS
No load,
f = 1 MHz
TYP
5
UNIT
pF
Copyright © 2011, Texas Instruments Incorporated
SN74AHC1G09
SCLS724B – MAY 2011 – REVISED JULY 2011
www.ti.com
PARAMETER MEASUREMENT INFORMATION
VCC
RL = 1 kΩ
From Output
Under Test
Test
Point
From Output
Under Test
S1
Open
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
VCC
50% VCC
Timing Input
tw
tsu
VCC
50% VCC
50% VCC
Input
0V
th
VCC
50% VCC
Data Input
50% VCC
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VCC
50% VCC
Input
50% VCC
0V
tPLH
tPHL
VOH
In-Phase
Output
50% VCC
tPHL
Out-of-Phase
Output
50% VCC
VOL
Output
Waveform 1
S1 at VCC
(see Note B)
VOH
50% VCC
VOL
50% VCC
tPZL
tPLZ
≈VCC
50% VCC
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
50% VCC
0V
tPZH
tPLH
50% VCC
VCC
Output
Control
VOL + 0.3 V
tPHZ
50% VCC
VOH − 0.3 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
CL includes probe and jig capacitance.
B.
Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output
control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the
output control.
C.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf
≤ 3 ns.
D.
The outputs are measured one at a time with one input transition per measurement.
E.
All parameters and waveforms are not applicable to all devices.
Since this device has open-drain outputs, tPLZ and tPZL are the same as tPD.
G.
tPZL is measured at VCC/2.
H.
tPLZ is measured at VOL + 0.3 V.
VOH
≈0 V
A.
F.
VOL
Figure 1. Load Circuit and Voltage Waveforms
Copyright © 2011, Texas Instruments Incorporated
5
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2011
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
SN74AHC1G09DBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
SN74AHC1G09DCKR
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
(3)
Samples
(Requires Login)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Mar-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
SN74AHC1G09DBVR
SOT-23
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
DBV
5
3000
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
SN74AHC1G09DBVR
SOT-23
DBV
5
3000
178.0
9.2
3.3
3.2
1.55
4.0
8.0
Q3
SN74AHC1G09DCKR
SC70
DCK
5
3000
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
SN74AHC1G09DCKR
SC70
DCK
5
3000
178.0
9.2
2.4
2.4
1.22
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Mar-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74AHC1G09DBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
SN74AHC1G09DBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
SN74AHC1G09DCKR
SC70
DCK
5
3000
180.0
180.0
18.0
SN74AHC1G09DCKR
SC70
DCK
5
3000
180.0
180.0
18.0
Pack Materials-Page 2
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