Datasheet AS13986 D u a l L o w - N o i s e , L o w - D r o p o u t Vo l ta g e R e g u l a t o r 1 General Description 2 Key Features ! Input Voltage: 2.5 to 5.5V ! Dual Output Voltages: 1.2 to 5.0V (in 50mV Steps) ! Ultra-Low Dropout Voltage: 45mV @ 150mA Load, 0.3mV @ 1mA Load ! Very Low Quiescent Current: 135µA @ No Load, 255µA @ 150mA Load, 2µA In Off Mode ! Guaranteed Output Current up to 150mA ! Fast Turn-On Time: 160µs (COUT = 1µF, CBYPASS = 10nF, IOUT = 1mA) ! Logic-Controlled Shutdown ! Up to 1.5% Output Voltage Accuracy ! Integrated Current-Limit and Thermal Overload Protection ! Output Low-Noise Voltage: 30µVRMS (10Hz to 100kHz) The AS13986 was specifically designed to work with low-ESR ceramic capacitors. ! Supply Voltage Rejection.: 55dB @ 1kHz, 50dB @ 10kHz The AS13986 is available in a 8-pin WLP package. ! Stable With Low-ESR Ceramic Capacitors ! Temperature Range: -40 to 125ºC ! 8-pin WLP Package The AS13986 dual low-dropout regulator provides up to 150mA at each output using a 2.5 to 5.5V input voltage. The ultra-low drop-out voltage, low quiescent current, and low noise make the AS13986 perfect for low-power, battery-operated applications. Regulator ground current increases only slightly in dropout, extending the battery life in low-power applications. The device features excellent power supply rejection (55dB @ 1kHz and 50dB at 10kHz). The high power supply rejection is maintained down to low input voltage levels used in battery operated devices. Integrated shutdown logic control function is available for each output. In cases where the device is used as a local regulator it is possible to switch some of the circuitry into standby mode, thus decreasing total power consumption. 3 Applications The device is ideal for powering cordless and mobile phones, MP3 players, CD and DVD players, PDAs, handheld computers, digital cameras and any other hand-held battery-powered device. Figure 1. AS13986 - Block Diagram A2 A3 VIN B3 VOUT1 EN1 B1 A1 Enable VOUT2 EN2 Fast Turn On + – C1 VREF – BYPASS + Thermal Protection AS13986 C2, C3 GND www.austriamicrosystems.com Revision 1.02 1 - 13 AS13986 Datasheet - P i n o u t 4 Pinout Pin Assignments Figure 2. Pin Assignments (Top View) A B C 3 AS13986 2 1 Pin Descriptions Table 1. Pin Descriptions Pin Number Pin Name A1 VOUT2 Description Regulated Output Voltage 2 Output Voltage 2 Enable/Disable VEN ≤ 0.4V: VOUT2 is disabled. VEN ≥ 1.2V: VOUT2 is enabled. Note: This pin must not float as it is not internally pulled-up or pulled-down. B1 EN2 C1 BYPASS C2 GND Common Ground C3 GND Common Ground B3 EN1 Output Voltage 1 Enable/Disable VEN ≤ 0.4V: VOUT1 is disabled. VEN ≥ 1.2V: VOUT1 is enabled. A3 VOUT1 A2 VIN www.austriamicrosystems.com Bypass Pin. This pin should be connected to an external capacitor (10nF typ) to minimize noise. Regulated Output Voltage 1 Input Voltage Revision 1.02 2 - 13 AS13986 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Parameter Min Max Units DC Input Voltage -0.3 7 V DC Output Voltage -0.3 VIN + 0.3 V ENABLE Input Voltage -0.3 VIN + 0.3 V Output Current Internally limited Power Dissipation Internally limited Storage Temperature Range -65 +150 ºC Operating Junction Temperature Range -40 +125 ºC +120 ºC/W Thermal Resistance Junction Ambient Temperature Package Body Temperature www.austriamicrosystems.com +260 ºC Revision 1.02 Comments The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD-020C “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices”. The lead finish for Pb-free leaded packages is matte tin (100% Sn). 3 - 13 AS13986 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics TAMB = 25ºC, VIN = VOUT(NOM) +0.5V, COUT = CIN = 1µF, CBYPASS = 10nF, IOUT = 1mA, VEN = 1.2V (unless otherwise specified) Note: Exposing the WLP package to direct light could cause device malfunction. Table 3. Electrical Characteristics Symbol Parameter VIN Operating Input Voltage Conditions Output Voltage Tolerance VOUT ≥ 3V Output Voltage Tolerance VOUT < 3V ΔVOUT Line Regulation 1 Load Regulation 1 Output AC Line Regulation (Figure 3) Min Max Unit 2.5 Typ 5.5 V IOUT = 1mA -1.5 1.5 TAMB = -40 to 125ºC -2.5 2.5 % of VOUT(N IOUT = 1mA -75 75 TAMB = -40 to 125ºC -100 100 VIN = (VOUT(NOM) + 0.5V) to 4.5V, VOUT < 3V -0.2 0.2 VIN = (VOUT(NOM) + 0.5V) to 5.5V, VOUT < 3V -0.35 0.35 IOUT = 1 to 150mA 0.003 VIN = VOUT(NOM) + 1V, IOUT = 150mA, tR = tF = 30µs 1 Both Outputs Enabled, VEN = 1.4V, IOUT = 0mA 135 370 Both Outputs Disabled, VEN = 0.4V 0.001 Both Outputs Disabled, VEN = 0.4V, TAMB = -40 to 125ºC 100 One Output Enabled, VEN = 1.4V, IOUT = 0 to 150mA, TAMB = -40 to 125ºC 220 IOUT = 1mA IOUT = 1mA, TAMB = -40 to 125ºC 2 IOUT = 150mA 2 mV 45 100 VIN = VOUT(NOM) + 0.25V, VRIPPLE = 0.1V, IOUT = 50mA, f = 1kHz 55 VIN = VOUT(NOM) + 0.25V, VRIPPLE = 0.1V, IOUT = 50mA, f = 10kHz 50 500 mA 480 mA ISC Short Circuit Current RLOAD = 0Ω IOUT(PK) Peak Output Current VOUT ≥ VOUT(NOM) - 5% www.austriamicrosystems.com 2 0.3 IOUT = 150mA, TAMB = -40 to 125ºC SVR µA 130 One Output Enabled, VEN = 1.4V, IOUT = 0 to 150mA Supply Voltage Rejection (Figure 4) 2 90 One Output Enabled, VEN = 1.4V, IOUT = 0mA, TAMB = -40 to 125ºC Dropout Voltage 2 4 One Output Enabled, IOUT = 0mA 3 %/mA 255 Both Outputs Enabled, VEN = 1.4V, IOUT = 0mA to 150mA, TAMB = -40 to 125ºC VLOAD %/V 200 Both Outputs Enabled, VEN = 1.4V, IOUT = 0 to 150mA Quiescent Current 0.008 mV mVpp Both Outputs Enabled, VEN = 1.4V, IOUT = 0mA,TAMB = -40 to 125ºC IQ OM) Revision 1.02 dB 300 4 - 13 AS13986 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s Table 3. Electrical Characteristics (Continued) Symbol VEN Parameter Conditions Min Enable Input Logic Low Enable Input Logic High VIN = 2.5V to 5.5V, TAMB = -40 to 125ºC Typ 4 VEN = 0.4V, VIN = 5.5V eN Output Noise Voltage BW = 10Hz to 100kHz, COUT = 1µF, IOUT = 0mA 30 CBYPASS = 10nF 160 TSHDN 5 Thermal Shutdown 0.4 V 2 Enable Input Current Turn On Time Unit 1.2 IEN tON Max ±10 4, 6 nA µVRMS 250 160 µs ºC Recommended Output Capacitor COUT Output Capacitor Capacitance 1 ESR 0.005 22 5 2 µF Ω 1. Temperature variations are included within the output voltage accuracy. The line and load regulation tests will be indirectly tested and covered by the total accuracy test. 2. Guaranteed by Design. 3. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value (does not apply to input voltages below 2.5V). 4. ENx must be driven with a tR = tF < 10ms. 5. Turn on time is time measured between the enable input just exceeding the VINH high value and the output voltage just reaching 95% of its nominal value. Maximum limit guaranteed by design. 6. Typical thermal protection hysteresis is 20ºC. Note: All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods. Figure 3. AC Line Regulation Input Voltage Test Signal 30µs 30µs 600mV VIN = VOUT(NOM) + 1V 600µs 4.6ms Figure 4. SVR Input Voltage Test Signal VIN 100mV VOUT(NOM) + 0.25V www.austriamicrosystems.com Revision 1.02 5 - 13 AS13986 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 7 Typical Operating Characteristics Figure 6. Output Voltage vs. Temperature; VIN = 3.3V, VSHDN = 1.4V, IOUT = 150mA 2.9 2.9 2.85 2.85 Output Voltage (V) . Output Voltage (V) . TAMB = +25ºC (unless otherwise specified) Figure 5. Output Voltage vs. Temperature; VIN = 3.3V, VSHDN = 1.4V, IOUT = 0mA VOUT1 2.8 VOUT2 2.75 2.7 2.65 VOUT1 2.8 VOUT2 2.75 2.7 2.65 2.6 -50 -25 0 25 50 2.6 -50 -25 75 100 125 150 0 Temperature (°C) 0.3 0.003 0.25 . 0.0035 0.0025 0.002 0.0015 0.001 VOUT1 VOUT2 0 -50 -25 0 25 VOUT1 0.15 VOUT2 0.1 0.05 0 -50 -25 50 75 100 125 150 0 25 50 75 100 125 150 Temperature (°C) Figure 9. Quiescent Current vs. Temperature; VOUT = 2.8V, VIN = 3.3V, IOUT = 150mA, VSHDN = 1.4V Figure 10. Quiescent Current vs. Temperature; VOUT = 2.8V, VIN = 3.3V, IOUT = 0mA, VSHDN = 1.4V 225 . . 350 Quiescent Current (µA) 325 Quiescent Current (µA) 75 100 125 150 0.2 Temperature (°C) 300 275 250 225 200 -50 -25 50 Figure 8. Line Regulation vs. Temperature; VIN = 3.3 to 4.5V, VSHDN =1.4V, IOUT =1mA Line Regulation (%/V) Load Regulation (%/mA) . Figure 7. Load Regulation vs. Temperature; VIN = 3.3V, VSHDN = 1.4V, IOUT = 1 to 150mA 0.0005 25 Temperature (°C) 200 175 150 125 100 75 0 25 50 75 100 125 150 -50 -25 Temperature (°C) www.austriamicrosystems.com 0 25 50 75 100 125 150 Tem perature (°C) Revision 1.02 6 - 13 AS13986 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 100µs/Div 100µs/Div 2V/Div VOUT2 1V/Div VSHDN Figure 14. Turn Off Time; VIN = 3.3V, CBYPASS = 10nF, CIN = COUT = 1µF (Ceramic), tR = 20ns, IOUT = 1mA, VOUT = 2.8V 40µs/Div 2V/Div VOUT1 VOUT1 2V/Div VOUT2 2V/Div VSHDN 1V/Div Figure 13. Turn On Time; VIN = 3.3V, IOUT1 = IOUT2 =150mA, CIN = COUT = 1µF, VOUT = 2.8V CBYPASS = 10nF, Rise Time/Fall Time = 1µs www.austriamicrosystems.com 10mV/Div 1mV/Div 1mA/Div 10mV/Div VIN VOUT2 IOUT1 500mV/Div 10mV/Div 10mV/Div VOUT1 VOUT2 VIN Figure 12. Load Transient Responds; VIN = 3.3V, CBYPASS = 10nF, CIN = COUT = 1µF (Ceramic), tR = 20ns, IOUT = 1mA, VOUT = 2.8V VOUT1 Figure 11. Line Transient Response; VIN = 3.8 to 4.4V, IOUT = 150mA, CIN = COUT = 1µF, VOUT = 2.8V CBYPASS = 10nF, Rise Time/Fall Time = 1µs 4ms/Div Revision 1.02 7 - 13 AS13986 Datasheet - D e t a i l e d D e s c r i p t i o n 8 Detailed Description Regulator On/Off Operation The AS13986 outputs (VOUT1 and VOUT2) are enabled by pulling the corresponding ENx pin high (1.4V) and disabled by pulling the ENx pin low (0V). For reliable operation, the signal source used to drive the ENx input must be capable of swinging above and below the specified turn-on/off voltage thresholds listed in Table 3 on page 4 (Enable Input Logic Low and Enable Input Logic High parameters). Note: Reliable enable/disable operation of VOUT1 and VOUT2 is guaranteed by driving the ENx pins with tR and tF = 10ms. Fast Turn-On Time In normal operation, the AS13986 outputs are turned on when VREF reaches its regulated value (1.23V nominal). Turnon time is decreased by charging the capacitor at pin BYPASS with the internal 70µA current source. The current source is turned off when the bandgap voltage reaches approximately 95% of its regulated value. Turn-on time is determined by the time constant of the bypass capacitor; smaller capacitor values decrease turn-on time, although noise reduction decreases as well. Therefore, turn-on time and noise reduction must be taken into consideration when choosing the value of the bypass capacitor. www.austriamicrosystems.com Revision 1.02 8 - 13 AS13986 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9 Application Information Figure 15. Typical Application Diagram A2 +2.5 to 6V A3 VIN VOUT1 B3 A1 EN1 VOUT2 B1 CIN 1µF EN2 AS13986 COUT2 1 to 22µF C1 BYPASS CBYPASS 0.01µF C2 GND COUT2 1 to 22µF C3 GND Current Limit The AS13986 features integrated short-circuit protection and a current limiting circuitry which controls the pass transistor gate voltage, limiting output current to approximately 500mA. Thermal Overload Protection On-chip thermal overload protection limits total power dissipation in the AS13986. When the junction temperature (TJ) exceeds +160ºC, the thermal sensor sends a signal to the shutdown logic, turning off the pass transistors and allowing the device to cool down. The pass transistors will turn on again when the junction temperature cools by 20ºC (typ), resulting in a pulsed output during continuous thermal overload conditions. Power Dissipation Maximum power dissipation of the AS13986 depends on the thermal resistance of the case and PCB, the temperature difference between the die junction and ambient air, and the rate of air flow. The power dissipated by the AS13986 is calculated as: PD = IO (VIN - VOUT) (EQ 1) PMAX = (TJ(MAX) - TAMB)/RTH (EQ 2) The maximum power dissipation is: Where: TJ(MAX) = +125ºC TAMB is the ambient temperature. RTH is the thermal resistance. www.austriamicrosystems.com Revision 1.02 9 - 13 AS13986 Datasheet - A p p l i c a t i o n I n f o r m a t i o n External Component Selection Input Capacitor A ceramic, tantalum, or film capacitor of 1µF (typ) should be used between pin VIN and GND (the value of the capacitor may be increased without limit). This capacitor must be located a distance of not more than 1cm from VIN, and returned to a clean analog ground (see Figure 15). Note: Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a low impedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input, it must be guaranteed by the manufacturer to have a surge current rating sufficient for the application. There are no requirements for the ESR on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will be approximately 1µF over the entire operating temperature range. Output Capacitor The AS13986 was specifically designed to use very small ceramic output capacitors (temperature characteristics X7R, X5R, Z5U or Y5V) in 1 to 22µF range (ESR of 0.005 to 5Ω). Tantalum or film capacitors can be used at the output, however these types of capacitors require more PCB space and are more expensive than ceramic capacitors. Note: The output capacitor must meet the minimum capacitance requirement and also have an ESR value which is within a stable range. Bypass Capacitor Noise on both regulator outputs (VOUT1 and VOUT2) can be significantly reduced by connecting a 0.01µF capacitor between pin BYPASS and GND (see Figure 15), with virtually no effect on the transient response of the AS13986. Using a bypass capacitor will also prevent output overshoot during start up. This capacitor should be connected directly to a high-impedance node in the band gap reference circuit. See also Fast Turn-On Time on page 8. Note: Any significant loading on the high-impedance node will effect the regulated output voltage. For this reason, DC leakage current through pin BYPASS must be kept as low as possible for best output voltage accuracy. High-quality ceramic capacitors with NPO or COG dielectric are ideal as bypass capacitors as they typically exhibit very low leakage current. Polypropylene and polycarbonate film capacitors are also a good choice as these capacitors typically have extremely low leakage current and are available in small surface-mount packages. Layout and Grounding Considerations Well designed PC board layout is essential for optimizing device performance. In addition to providing electrical connections, the AS13986 pins also channel heat away from the die. ! Wide circuit-board traces and large, solid copper polygons should be used to improve power dissipation. ! Multiple vias to buried ground planes should be used to further enhance thermal conductivity. www.austriamicrosystems.com Revision 1.02 10 - 13 AS13986 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 10 Package Drawings and Markings The device is available in an 8-pin WLP package. Figure 16. 8-pin WLP Package 1 2 A1 3 f C e ob B D1 e A f f e E1 e A2 f A E A B D C 1 www.austriamicrosystems.com 2 3 Symbol A A1 A2 b D D1 E E1 e f Revision 1.02 Min 0.570 0.230 0.340 0.301 Typ 0.600 0.250 0.350 0.311 1.550 1 1.550 1 0.5 0.275 Max 0.630 0.270 0.360 0.321 11 - 13 AS13986 Datasheet - O r d e r i n g I n f o r m a t i o n 11 Ordering Information The device is available as the standard products shown in Table 4. Table 4. Ordering Information Ordering Code Markings AS13986-2828-T ASKP Dual LDO 2.8V and 2.8V, 150mA Tape and Reel 8-pin WLP AS13986-1833-T ASRL Dual LDO 1.8V and 3.3V, 150mA Tape and Reel 8-pin WLP Dual LDO, 150mA Tape and Reel 8-pin WLP AS13986-xxyy-T 1 Description Delivery Form Package 1. xx is a placeholder for VOUT1, 1.2V to 5.0V (in 50mV Steps). yy is a placeholder for VOUT2, 1.2V to 5.0V (in 50mV Steps). Available upon request. For more information and inquiries contact http://www.austriamicrosystems.com/contact Note: All products are RoHS compliant and Pb-free. Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect For further information and requests, please contact us mailto:[email protected] or find your local distributor at http://www.austriamicrosystems.com/distributor www.austriamicrosystems.com Revision 1.02 12 - 13 AS13986 Datasheet Copyrights Copyright © 1997-2009, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. 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