AMSCO AS5163HTSU

DATA SHEET
AS5163
12 BIT AUTOMOTIVE Angle Position Sensor
General Description
The AS5163 is a contactless magnetic angle position
sensor for accurate angular measurement over a full turn
of 360°. A sub range can be programmed to achieve the
best resolution for the application. It is a system-on-chip,
combining integrated Hall elements, analog front end,
digital signal processing and best in class automotive
protection features in a single device.
Benefits
To measure the angle, only a simple two-pole magnet,
rotating over the center of the chip, is required. The
magnet may be placed above or below the IC.
The absolute angle measurement provides instant
indication of the magnet’s angular position with a
resolution of 0.022° = 16384 positions per revolution.
According to this resolution the adjustment of the
application specific mechanical positions are possible.
The angular output data is available over a 12 bit PWM
signal or 12 bit ratiometric analog output.
The AS5163 operates at a supply voltage of 5 V and the
supply and output pins are protected against overvoltage
up to +27 V. In addition the supply pins are protected
against reverse polarity up to – 18 V.
-
Unique fully differential patented solution
-
Best protections for automotive applications
-
Easy to program
-
Flexible interface selection PWM, analog output
-
Ideal for applications in harsh environments due to
contactless position sensing
-
Robust system, tolerant to magnet misalignment, air
gap variations, temperature variations and external
magnetic fields
-
No calibration required because of inherent
accuracy.
-
High driving capability of analog output (including
diagnostics)
Key Features
−
360° contactless high resolution angular position
encoding
−
User programmable start and end point of the
application region.
−
User programmable clamping levels and
programming of the transition point.
−
Powerful analog output
•
short circuit monitor
•
Figure 1: Typical arrangement of AS5163 and magnet
Applications
-
High driving capability for resistive and
capacitive loads
−
−
Wide temperature range: - 40°C to + 150°C
Small Pb-free package: TSSOP 14.
−
Broken GND and VDD detection over a wide range
of different load conditions.
Automotive applications:
- throttle and valve position sensing
- gearbox position sensor
- Headlight position control
- Torque sensing
- pedal position sensing
- non contact potentiometers
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
Blockdiagram
Figure 2: Block diagram AS5163
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
Contents
1
PIN CONFIGURATION ............................................................................................................ 7
1.1
2
P IN D ESCRIPTION ................................................................................................................... 7
ELECTRICAL CHARACTERISTICS ....................................................................................... 8
2.1
2.2
2.3
2.4
2.5
A BSOLUTE M AXIMUM R ATINGS ............................................................................................... 8
O PERATING C ONDITIONS ......................................................................................................... 8
T IMING C ONDITIONS ............................................................................................................... 8
M AGNETIC I NPUT S PECIFICATION ............................................................................................ 8
E LECTRICAL S YSTEM S PECIFICATIONS ..................................................................................... 9
3
FUNCTIONAL DESCRIPTION ................................................................................................. 9
4
OPERATION ........................................................................................................................... 10
4.1 VDD V OLTAGE M ONITOR ..................................................................................................... 10
4.1.1 VDD Overvoltage Management ...................................................................................... 10
4.1.2 VDD5 Undervoltage Management .................................................................................. 11
5
ANALOG OUTPUT ................................................................................................................. 11
5.1 P ROGRAMMING P ARAMETERS ................................................................................................ 12
5.1.1 Application specific angular range programming ........................................................... 12
5.1.2 Application specific programming of the break point ...................................................... 12
5.1.3 Full Scale Mode ............................................................................................................ 13
5.1.4 Resolution of the Parameters ......................................................................................... 13
5.1.5 Analogue Output Diagnostic Mode ................................................................................. 14
5.2 A NALOG O UTPUT D RIVER P ARAMETERS ................................................................................. 15
6
PULSE WIDTH MODULATION (PWM) OUTPUT ................................................................. 16
7
KICK DOWN FUNCTION ....................................................................................................... 17
8
PROGRAMMING THE AS5163............................................................................................... 18
8.1 H ARDWARE S ETUP ............................................................................................................... 19
8.2 P ROTOCOL TIMING AND COMMANDS OF SINGLE PIN INTERFACE ................................................ 19
8.2.1 Unblock ........................................................................................................................ 21
8.2.2 WRITE128 ..................................................................................................................... 22
8.2.3 READ128 ...................................................................................................................... 23
8.2.4 DOWNLOAD ................................................................................................................. 24
8.2.5 UPLOAD ....................................................................................................................... 24
8.2.6 FUSE ............................................................................................................................ 24
8.2.7 PASS2FUNC ................................................................................................................. 25
8.2.8 READ ............................................................................................................................ 25
8.2.9 WRITE .......................................................................................................................... 25
8.3 OTP P ROGRAMMING D ATA ................................................................................................... 26
8.4 R EAD /W RITE USER DATA ...................................................................................................... 28
8.5 P ROGRAMMING P ROCEDURE .................................................................................................. 29
9
CHOOSING THE PROPER MAGNET .................................................................................... 30
9.1
9.2
P HYSICAL P LACEMENT OF THE M AGNET ................................................................................. 31
M AGNET P LACEMENT ........................................................................................................... 31
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10
PACKAGE DRAWINGS AND MARKINGS ......................................................................... 32
11
ORDERING INFORMATION............................................................................................... 32
12
REVISION HISTORY........................................................................................................... 33
CONTACT ..................................................................................................................................... 33
HEADQUARTERS ......................................................................................................................... 33
COPYRIGHTS ............................................................................................................................... 33
DISCLAIMER................................................................................................................................ 33
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List of Figures
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1: T YPICAL ARRANGEMENT OF AS5163 AND MAGNET ................................................................ 1
2: B LOCK DIAGRAM AS5163 ................................................................................................... 2
3: P IN CONFIGURATION TSSOP14 ............................................................................................ 7
4: C ONNECTIONS FOR 5V SUPPLY VOLTAGES .......................................................................... 10
5: P ROGRAMMING OF AN INDIVIDUAL APPLICATION RANGE ...................................................... 12
6: I NDIVIDUAL PROGRAMMING OF THE BREAK POINT BP .......................................................... 13
7: F ULL SCALE MODE ............................................................................................................ 13
8: O VERVIEW ABOUT THE ANGULAR OUTPUT VOLTAGE ............................................................ 14
9: PWM OUTPUT SIGNAL ....................................................................................................... 16
10: K ICK D OWN H YSTERESIS IMPLEMENTATION ...................................................................... 17
11: P ROGRAMMING SCHEMATIC OF THE AS5163 ..................................................................... 19
12: B IT CODING OF THE SINGLE PIN PROGRAMMING INTERFACE ................................................ 19
13: P ROTOCOL D EFINITION .................................................................................................... 20
14: B US TIMING FOR THE WRITE128 COMMAND ..................................................................... 20
15: B US TIMING FOR THE READ128 COMMAND ....................................................................... 20
16: B US TIMING FOR THE READ COMMANDS .......................................................................... 21
17: U NBLOCK SEQUENCE ....................................................................................................... 21
18: F RAME ORGANISATION OF THE WRITE128 COMMAND ....................................................... 22
19: F RAME ORGANISATION OF THE READ128 COMMAND ......................................................... 23
20: F RAME O RGANISATION OF THE DOWNLOAD COMMAND .................................................. 24
21: F RAME ORGANISATION OF THE UPLOAD COMMAND ......................................................... 24
22: F RAME ORGANISATION OF THE FUSE COMMAND ............................................................... 24
23: F RAME ORGANISATION OF THE PASS2FUNC COMMAND .................................................... 25
24: F RAME ORGANISATION OF THE READ COMMAND .............................................................. 25
25: F RAME ORGANISATION OF THE WRITE COMMAND ............................................................. 25
26: T YPICAL MAGNET (6 X 3 MM ) AND MAGNETIC FIELD DISTRIBUTION ....................................... 30
27: D EFINED CHIP CENTER AND MAGNET DISPLACEMENT RADIUS ............................................. 31
28: V ERTICAL PLACEMENT OF THE MAGNET ............................................................................ 31
29: P ACKAGE D IMENSIONS AND M ARKING ............................................................................. 32
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List of Tables
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
T ABLE
1: P IN DESCRIPTION TSSOP14 .................................................................................................. 7
2: A BSOLUTE MAXIMUM RATINGS ............................................................................................. 8
3: O PERATING C ONDITIONS ...................................................................................................... 8
4 T IMING CONDITIONS .............................................................................................................. 8
5: M AGNET I NPUT S PECIFICATION ............................................................................................. 9
6: R ESOLUTION OF THE PROGRAMMING PARAMETERS ............................................................... 13
7: DIFFERENT FAILURE CASES OF AS5163 ................................................................................ 15
8: G ENERAL P ARAMETERS O UTPUT D RIVER ............................................................................. 15
9: E LECTRICAL PARAMETERS FOR THE ANALOGUE OUTPUT STAGE ............................................. 16
10: PWM SIGNAL PARAMETERS .............................................................................................. 17
11: E LECTRICAL PARAMETERS FOR THE PWM OUTPUT MODE .................................................... 17
12: P ROGRAMMING PARAMETERS FOR THE K ICK D OWN FUNCTION ............................................. 18
13: E LECTRICAL PARAMETERS OF THE KDOWN OUTPUT .......................................................... 18
14: OTP COMMANDS AND COMMUNICATION INTERFACE MODES ................................................. 20
15: OTP D ATA O RGANISATION P ART 1.................................................................................... 26
16: OTP D ATA O RGANISATION P ART 2.................................................................................... 27
17: R EAD /W RITE DATA .......................................................................................................... 28
18: P ACKAGE D IMENSIONS ..................................................................................................... 32
19: O RDERING I NFORMATION ................................................................................................. 32
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Pin Configuration
VDD
1
14
OUT
VDD5
2
13
NC
NC
3
VDD3
4
GNDA
5
NC
NC
AS5163
1
12
GNDP
11
KDOWN
10
NC
6
9
NC
7
8
GNDD
Figure 3: Pin configuration TSSOP14
1.1
Pin Description
Table 1: Pin description TSSOP14 shows the description of each pin of the standard TSSOP14 package (Thin Shrink Small
Outline Package, 14 leads; see Figure 3).
Pins 1, 2, 4, 5, 8 and 12 are supply pins and outputs of the internal voltage regulators.
Pins 3, 6, 7, 9, 10 and 13 are used for fabrication test purpose and should be connected according Table 1 at the
application board.
Pin 11 is one additional output pin which can be used for a compare function including a hysteresis. An open drain
configuration is used. If the internal angle is above a programmable threshold the output is switched to low. Below the
threshold the output is high using a pull up resistor.
Pin 14 is the output pin which is used for the analog output or digital PWM output mode. In addition this pin is used for
programming of the device.
Pin
Symbol
Type
Description
1
VDD
S
Positive supply pin. This pin is over voltage protected.
2
VDD5
S
4,5V-Regulator output, internally regulated from VDD.
This pin needs an external ceramic capacitor of 2.2 µF
3
NC
4
VDD3
S
3,45V-Regulator output, internally regulated from VDD5.
This pin needs an external ceramic capacitor of 2.2 µF
5
GNDA
S
Analogue ground pin. Connected to ground in the
application.
6
NC
DIO/AIO
Test pins for fabrication. Connected to ground in the
application.
7
NC
DIO/AIO
Test pins for fabrication. Open in the application.
8
GNDD
9
NC
10
NC
11
KDOWN
12
GNDP
13
NC
14
OUT
DIO/AIO
Test pins for fabrication. Connected to ground in the
application.
S
Digital ground pin. Connected to ground in the application.
DIO/AIO
Test pins for fabrication. Connected to ground in the
application.
DIO/AIO
Test pins for fabrication. Connected to ground in the
application.
DO_OD
Kick down functionality.
S
Analogue ground pin. Connected to ground in the
application.
DIO/AIO
DIO/AIO
Test pins for fabrication. Connected to ground in the
application.
Output pin can be programmed as analogue output or
PWM output. Over this pin the programming is possible.
Table 1: Pin description TSSOP14
S
DO_OD
DI/AIO
DO_T
supply pin
digital output open drain
multi purpose pin
digital output /tri-state
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2
Electrical Characteristics
2.1
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings“ may cause permanent damage to the device. These are stress ratings
only. Functional operation of the device at these or any other conditions beyond those indicated under “Operating Conditions” is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Parameter
Symbol
Min
Value
Unit
Note
DC supply voltage at pin VDD
Overvoltage
VDD
-18
27
V
No operation
Output voltage OUT
Vout
-0.3
27
V
permanent
Output voltage KDOWN
VKDOWN
-0.3
27
V
permanent
DC supply voltage at pin VDD3
VDD3
-0.3
5.5
V
DC supply voltage at pin VDD5
VDD5
-0.3
7
V
Input current (latchup immunity)
Iscr
-100
100
mA
Norm: JEDEC 78
Norm: MIL 883 E method 3015
Electrostatic discharge
ESD
±4
kV
VDD, GND, OUT and KDOWN Pin.
All other pins ± 2 kV
Storage temperature
Tstrg
Body temperature (Lead-free
package)
TBody
Humidity non-condensing
-55
H
5
125
°C
260
°C
85
%
Min – 67°F ; Max +257°F
t=20 to 40s, Norm: IPC/JEDEC J-Std-020C
Lead finish 100% Sn “matte tin”
Table 2: Absolute maximum ratings
2.2
Operating Conditions
Parameter
Symbol
Min
Ambient temperature
Tamb
-40
Supply current
Isupp
Typ Max
+150
15
Unit
°C
Note
-40°F…+302°F
mA
Supply voltage at pin VDD
VDD
4.5
5.0
5.5
V
Voltage regulator output voltage at pin VDD3
VDD3
3.3
3.45
3.6
V
Voltage regulator output voltage at pin VDD5
VDD5
4.5
5V Operation
V
Table 3: Operating Conditions
2.3
Timing Conditions
Parameter
Symbol
Internal Master Clock
FRCOT
Interface Clock Time
TCLK
WachDog error detection time
Min
Typ
4.05
Max
4.5
Unit
4.95
222.2
MHz
ns
TDETWD
12
Note
±10%
TCLK = 1 / FRCOT
ms
Table 4 Timing conditions
2.4
Magnetic Input Specification
(Operating conditions: T am b = -40 to +150°C, VDD5 = 4.5-5.5V (5V operation) unless otherwise noted)
Two-pole cylindrical diametrically magnetized source:
Parameter
Symbol
Min
Diameter
dmag
Thickness
tmag
2.5
Magnetic input field amplitude
Bpk
30
Revision 2.4
Typ
Max
6
Unit
Note
mm
Recommended magnet: Ø 6mm x 2.5mm for
cylindrical magnets
mm
70
mT
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Required vertical component of the magnetic field
strength on the die’s surface, measured along a
concentric circle with a radius of 1.1mm
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
Parameter
Magnetic offset
Symbol
Min
Typ
Boff
Field non-linearity
Displacement radius
Disp
0.25
Eccentricity
Ecc
100
Max
Unit
± 10
mT
Constant magnetic stray field
5
%
Including offset gradient
1
mm
Offset between defined device center and magnet
axis (see Figure 27). Dependant on the selected
magnet.
µm
Eccentricity of magnet center to rotational axis
-0.12
Recommended magnet
material and temperature drift
Note
NdFeB (Neodymium Iron Boron)
%/K
SmCo (Samarium Cobalt)
-0.035
Table 5: Magnet Input Specification
2.5
Electrical System Specifications
(Operating conditions: T am b = -40 to +150°C, VDD = 4.5-5.5V (5V operation) unless otherwise noted)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Resolution Analog and PWM
Output
RES
12
bit
Integral non-linearity (optimum)
360 degree full turn
INLopt
± 0.5
deg
Maximum error with respect to the best line fit.
Centered magnet without calibration, Tamb =25 °C.
Integral non-linearity (optimum)
360 degree full turn
INLtemp
± 0.9
deg
Maximum error with respect to the best line fit.
Centered magnet without calibration,
Tamb = -40 to +150°C
Integral non-linearity 360
degree full turn
INL
± 1.4
deg
Best line fit = (Errmax – Errmin) / 2
Over displacement tolerance with 6mm diameter
magnet, without calibration, Tamb = -40 to +150°C
Transition noise
TN
Deg
RMS
1 sigma
Power-on reset thresholds
Von
Voff
On voltage; 300mV typ. hysteresis
Off voltage; 300mV typ. hysteresis
0.06
1.37
1.08
2.2
1.9
2.9
2.6
V
V
Power-up time
tPwrUp
10
ms
System propagation delay
absolute output : delay of ADC,
DSP and absolute interface
tdelay
100
µs
DC supply voltage 3.3V (VDD3)
DC supply voltage 3.3V (VDD3)
Fast mode, times 2 in slow mode
Table 5: Electrical System Specifications
Note: The INL performance is specified over the full turn of 360 degrees. An operation in an angle segment increases the
accuracy. A two point linearization is recommended to achieve the best INL performance for the chosen angle segment.
3
Functional Description
The AS5163 is manufactured in a CMOS process and uses a spinning current Hall technology for sensing the magnetic field
distribution across the surface of the chip.
The integrated Hall elements are placed around the center of the device and deliver a voltage representation of the
magnetic field at the surface of the IC.
Through Sigma-Delta Analog / Digital Conversion and Digital Signal-Processing (DSP) algorithms, the AS5163 provides
accurate high-resolution absolute angular position information. For this purpose a Coordinate Rotation Digital Computer
(CORDIC) calculates the angle and the magnitude of the Hall array signals.
The DSP is also used to provide digital information at the outputs that indicate movements of the used magnet towards or
away from the device’s surface.
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
A small low cost diametrically magnetized (two-pole) standard magnet provides the angular position information (see Figure
26).
The AS5163 senses the orientation of the magnetic field and calculates a 14-bit binary code. This code is mapped to a
programmable output characteristic. The type of output is programmable and can be selected as PWM or analog output.
This signal is available at the pin 14 (OUT).
The analog and PWM output can be configured in many ways. The application angular region can be programmed in a user
friendly way. The start angle position T1 and the end point T2 can be set and programmed according the mechanical range
of the application with a resolution of 14 bits. In addition the T1Y and T2Y parameter can be set and programmed according
the application. The transition point 0 to 360 degree can be shifted using the break point parameter BP. This point is
programmable with a high resolution of 14 bits of 360 degrees. The voltage for clamping level low CLL and clamping level
high CLH can be programmed with a resolution of 7 bits. Both levels are individually adjustable.
These parameters are also used to adjust the PWM duty cycle.
The AS5163 provides also a compare function. The internal angular code is compared to a programmable level using
hysteresis. The function is available over the output pin 11 (KDOWN).
The output parameters can be programmed in an OTP register. No additional voltage is required to program the AS5163.
The setting may be overwritten at any time and will be reset to default when power is cycled. To make the setting
permanent, the OTP register must be programmed by using a lock bit the content could be frozen for ever.
The AS5163 is tolerant to magnet misalignment and unwanted external magnetic fields due to differential measurement
technique and Hall sensor conditioning circuitry.
4
Operation
The AS5163 operates at 5V ±10%, using two internal Low-Dropout (LDO) voltage regulators. For operation, the 5V supply is
connected to pin VDD. While VDD3 and VDD5 (LDO outputs) must be buffered by 2.2µF capacitors, the VDD requires a 1µF
capacitor. All capacitors (low ESR ceramic) are supposed to be placed close to the supply pins (see Figure 4).
The VDD3 and VDD5 outputs are intended for internal use only. It must not be loaded with an external load.
5V Operation
2.2µF
VDD5
2.2µF
VDD3
1µF
VDD
LDO
LDO
Internal
VDD4.5V
Internal
VDD3.45V
4.5 - 5.5V
GND
Figure 4: Connections for 5V supply voltages
Note: The pins VDD3 and VDD5 must always be buffered by a capacitor. It must not be left floating, as this may cause
instable internal supply voltages which may lead to larger output jitter of the measured angle.
The supply pins are over voltage protected up to 27 V. In addition the device has a reverse polarity protection.
4.1
4.1.1
VDD Voltage Monitor
VDD Overvoltage Management
If the voltage applied to the VDD pin exceeds the over-voltage upper threshold for longer than the detection time the device
enters a low power mode reducing the power consumption. When the overvoltage event has passed and the voltage applied
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
to the VDD pin falls below the over-voltage lower threshold for longer than the recovery time the device enters the normal
mode.
4.1.2
VDD5 Undervoltage Management
When the voltage applied to the VDD5 pin falls below the under-voltage lower threshold for longer than the VDD5_detection
time the device stops the clock of the digital part and the output drivers are turned off to reduce the power consumption.
When the voltage applied to the VDD5 pin exceeds the VDD5 undervoltage upper threshold for longer than the
VDD5_recovery time the clock is restarted and the output drivers are turned on.
5
Analog Output
By default (after programmed Mem_Lock_AMS OTP bit) the analog output mode is selected. The pin OUT provides an
analog voltage that is proportional to the angle of the rotating magnet and ratiometric to the supply voltage VDD. It can
source or sink currents up to ±8mA in normal operation. Above this limit the short circuit operation mode is activated. Due to
an intelligent approach a permanent short circuit will not damage the device. This is also feasible in a high voltage condition
up to 27 V and at the highest specified ambient temperature.
After the digital signal processing (DSP) a 12-bit Digital-to-Analog converter and output stage provides the output signal.
The DSP maps the application range to the output characteristic. An inversion of the slope is also programmable to allow
inversion of the rotation direction.
The reference voltage for the Digital-to-Analog converter (DAC) is taken internally from VDD / 2. In this mode, the output
voltage is ratiometric to the supply voltage.
An on-chip diagnostic feature force the analog output in the desired failure band. This will happen in case of a broken
supply, too high or low magnetic field, short circuit and overvoltage condition.
The Analog output is selected with the unprogrammed OTP bit OP_MODE(0).
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
5.1
Programming Parameters
The analog output voltage modes are programmable by OTP. Depending on the application, the analog output can be
adjusted. The user can program the following application specific parameters:
T1
Mechanical angle start point
T2
Mechanical angle end point
T1Y
Voltage level at the T1 position
T2Y
Voltage level at the T2 position
CLL
Clamping Level Low
CLH
Clamping Level High
BP
Break point (transition point 0 to 360 degree)
These parameters are input parameters. Over the provided programming software and programmer these parameters are
converted and finally written into the AS5163 128 bit OTP memory.
5.1.1
Application specific angular range programming
The application range can be selected by programming T1 with a related T1Y and T2 with a related T2Y into the AS5163.
The internal gain factor is calculated automatically. The clamping levels CLL and CLH can be programmed independent
from the T1 and T2 position and both levels can be separately adjusted.
Figure 5: Programming of an individual application range
Figure 5 shows a simple example of the selection of the range. The mechanical starting point T1 and the mechanical end
point T2 are defining the mechanical range. A sub range of the internal Cordic output range is used and mapped to the
needed output characteristic. The analog output signal has 12 bit, hence the level T1Y and T2Y can be adjusted with this
resolution. As a result of this level and the calculated slope the clamping region low is defined. The break point BP defines
the transition between CLL and CLH. In this example the BP is set to 0 degree. The BP is also the end point of the clamping
level high CLH. This range is defined by the level CLH and the calculated slope. Both clamping levels can be set
independently form each other. The minimum application range is 10 degrees.
5.1.2
Application specific programming of the break point
The break point BP can be programmed as well with a resolution of 14 bits. This is important when the default transition
point is inside the application range. In such a case the default transition point must be shifted out of the application range.
The parameter BP defines the new position. The function can be used also for an on-off indication.
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
Application range
90 degree
electrical range
T2
mechanical range
T1
100%VDD
CLH
clamping range
high
CLH
0 degree
T2Y
180 degree
T1Y
CLL
CLL
BP
0
clamping range
low
T1
T2
clamping range
low
270 degree
Figure 6: Individual programming of the break point BP
5.1.3
Full Scale Mode
Analogue output Voltage
Without programming the parameters T1 and T2 the AS5163 is in the full scale mode.
Figure 7: Full scale mode
For simplification, Figure 7 describes a linear output voltage from rail to rail (0V to VDD) over the complete rotation range.
In practice, this is not feasible due to saturation effects of the output stage transistors. The actual curve will be rounded
towards the supply rails (as indicated Figure 7).
5.1.4
Resolution of the Parameters
The programming parameters have a wide resolution up to 14 bits.
Parameter
Symbol
Resolution
Note
Mechanical angle start point
T1
14 bits
Mechanical angle stop point
T2
14 bits
Mechanical start voltage level
T1Y
12 bits
Mechanical stop voltage level
T2Y
12 bits
Clamping level low
CLL
7 bits
4096 LSBs is the max. level
Clamping level high
CLH
7 bits
31 LSBs is the min. level
Break point
BP
14 bits
Table 6: Resolution of the programming parameters
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
100
96
Failure Band High
Clamping Region High
CLH
T2Y
Application Region
T1Y
CLL
Clamping Region Low
4
Failure Band Low
0
Figure 8: Overview about the angular output voltage
Figure 8 gives an overview about the different ranges. The failure bands are used to indicate a wrong operation of the
AS5163. This can be caused due to a broken supply line. By using the specified load resistors the output level will remain in
these bands during a fail. It is recommended to set the clamping level CLL above the lower failure band and the clamping
level CLH below the higher failure band.
5.1.5
Analogue Output Diagnostic Mode
Due to the low pin count in the application a wrong operation must be indicated by the output pin OUT. This could be
realized using the failure bands. The failure band is defined with a fixed level. The failure band low is specified from 0 to 4
% of the supply range. The failure band high is defined from 100 to 96 %. Several failures can happen during operation. The
output signal remains in these bands over the specified operating and load conditions. All different failures can be grouped
into the internal alarms (failures) and the application related failures.
CLOAD ≤ 42 nF, RPU= 2k…5.6kOhm
RPD= 2k…5.6kOhm load pull-up
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
Type
Failure mode
Symbol
Out of magnetic range
Application related
failures
Note
Could be switched off by one OTP
bit ALARM_DISABLE
MAGRng
High/Low
Cordic overflow
COF
High/Low
Programmable by OTP bit
DIAG_HIGH.
Offset compensation finished
OCF
High/Low
Programmable by OTP bit
DIAG_HIGH.
Watch dog fail
WDF
High/Low
Programmable by OTP bit
DIAG_HIGH.
Oscillator fail
OF
High/Low
Programmable by OTP bit
DIAG_HIGH.
Overvoltage condition
OV
(too less or too high magnetic input)
Internal alarms
(failures)
Failure band
Broken VDD
BVDD
Broken VSS
BVSS
Short circuit output
SCO
Programmable by OTP bit
DIAG_HIGH.
Dependent on the load resistor
High/Low
Pull up failure band high
Pull down failure band low
High/Low
Switch off short circuit dependent
Table 7: different failure cases of AS5163
For efficient use of diagnostics it is recommended to program to clamping levels CLL and CLH.
5.2
Analog Output Driver Parameters
The output stage is configured in a push-pull output. Therefore it is possible to sink and source currents.
CLOAD≤ 42 nF, RPU= 2k…5.6kOhm
RPD= 2k…5.6kOhm load pull-up
Parameter
Symbol
Min
Short circuit output current (low side driver)
IOUTSCL
Short circuit output current (high side
driver)
Typ
Max
Unit
Note
8
32
mA
VOUT=27V
IOUTSCH
-8
-32
mA
VOUT=0V
Short circuit detection time
TSCDET
20
400
us
output stage turned off
Short circuit recovery time
TSCREC
1.5
15
ms
output stage turned on
Output Leakage current
ILEAKOUT
-20
20
uA
VOUT=5V; VDD=0V
Output voltage broken GND with pull-up
BGNDPU
96
100
%VDD
Output voltage broken GND with pull-down
BGNDPD
0
4
%VDD
Output voltage broken VDD with pull-up
BVDDPU
96
100
%VDD
Output voltage broken VDD with ull-down
BVDDPD
0
4
%VDD
Table 8: General Parameters Output Driver
Note: A Pull-Up/Down load up to 1kOhm with increased diagnostic bands from 0%-6% and 94%-100%.
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
Parameter
Output Voltage Range
Symbol
Min
VOUT
4
Typ
Max
Unit
96
% VDD
10
LSB
Output Integral nonlinearity
VOUTINL
Output Differential nonlinearity
VOUTDNL
-10
10
LSB
Output Offset
VOUTOFF
-50
50
mV
Update rate of the Output
VOUTUD
Output Step Response
VOUTSTEP
Output Voltage Temperature drift
VOUTDRIFT
Output ratiometricity error
VOUTRATE
Noise
VOUTNOISE
100
us
Note
at 2048 LSB level
info parameter
Between 10% and 90 %,
RPUOUT =1kOhm,
CLOUT=1nF; VDD=5V
of value at mid code;
info parameter
555
us
-1
1
%
-1.5
1.5
%VDD
0.04*VDD≤VOUT≤0.96*VDD
10
mVpp
1Hz…30kHz;
at 2048 LSB level
Table 9: Electrical parameters for the analogue output stage
6
Pulse Width Modulation (PWM) Output
The AS5163 provides a pulse width modulated output (PWM), whose duty cycle is proportional to the measured angle. This
output format is selectable over the OTP memory OP_MODE(0) bit. If output pin OUT is configured as open drain
configuration an external load resistor (pull up) is required. The PWM frequency is internally trimmed to an accuracy of
±10% over full temperature range. This tolerance can be cancelled by measuring the ratio between the on and off state. In
addition the programmed clamping levels CLL and CLH will also adjust the PWM signal characteristic.
Figure 9: PWM output signal
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
The PWM frequency can be programmed by the OTP bits PWM_frequency (1:0). Therefore 4 different frequencies are
possible.
Parameter
Symbol
Min
Typ
Max
Unit
Note
PWM
frequency1
fPWM1
123.60
137.33
151.06
Hz
PWM_frequency (1:0) = “00”
PWM
frequency2
fPWM2
247.19
274.66
302.13
Hz
PWM_frequency (1:0) = “01”
PWM
frequency3
fPWM3
494.39
549.32
604.25
Hz
PWM_frequency (1:0) = “10”
PWM
frequency4
fPWM4
988.77
1098.63
1208.50
Hz
PWM_frequency (1:0) = “11”
MIN pulse
width
PWMIN
(1+1)*1/ fPWM
µs
MAX pulse
width
PWMAX
(1+4094)*1/
fPWM
ms
Table 10: PWM signal parameters
Taking into consideration the AC characteristic of the PWM output including load it is recommended to use the clamping
function. The 0 to 4 % and 96 to 100 % range is recommended.
Parameter
Max
Unit
0
0.4
V
IOUT=8mA
ILEAK
-20
20
uA
VOUT=5V
PWM duty cycle range
PWMDC
4
96
%
PWM slew rate
PWMSRF
1
4
V/us
100
mV
Output voltage low
Output leakage
Symbol
Min
PWMVOL
Typ
Note
Between 75 % and 25 %
Voltage difference between VDD of ASIC
and pull-up load supply
2
∆SUPP
RPUOUT = 1kΩ,
CLOUT= 1nF, VDD= 5V
Table 11: Electrical parameters for the PWM output mode
7
Kick Down function
The AS5163 provides a special compare function. Using a programmable angle value with a programmable hysteresis this
function is implemented. It will be indicated over the open drain output pin KDOWN. If the actual angle is above the
programmable value plus the hysteresis, the output is switched to low. The output will remain at low level until the value KD
is reached in the reverse direction.
Figure 10: Kick Down Hysteresis implementation
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
Parameter
Symbol
Resolution
KD
6 bits
Kick down angle
Note
KDHYS (1:0) = “00” 8 LSB hysteresis
Kick down Hysteresis
KDHYS (1:0) = “01” 16 LSB hysteresis
2 bits
KDHYS
KDHYS (1:0) = “10” 32 LSB hysteresis
KDHYS (1:0) = “11” 64 LSB hysteresis
Table 12: Programming parameters for the Kick Down function
Pull up resistance 1k to 5.6K to VDD
Cload max 42nF
Symbol
Min
Max
Unit
Short circuit output current (Low Side
Driver)
Parameter
IOUTSC
6
24
mA
VKDOWN=27V
Short circuit detection time
TSCDET
20
400
us
output stage turned off
Short circuit recovery time
TSCREC
1.5
15
ms
output stage turned on
Output voltage low
KDVOL
0
1.1
V
IKDOWN=6mA
KDILEAK
-20
20
uA
VKDOWN=5V
KDSRF
1
4
V/us
Output leakage
KDOWN slew rate (falling edge)
Typ
2
Note
Between 75 % and 25 %,
RPUKD = 1kΩ, CLKD= 1nF,
VDD= 5V
Table 13: Electrical parameters of the KDOWN output
8
Programming the AS5163
The AS5163 programming is a one-time-programming (OTP) method, based on polysilicon fuses. The advantage of this
method is that no additional programming voltage is needed. The internal LDO provides the current for programming.
The OTP consists of 128 bits; several bits are available for user programming. In addition factory settings are stored in the
OTP memory. Both regions are independently lockable by build in lock bits.
A single OTP cell can be programmed only once. Per default, the cell is “0”; a programmed cell will contain a “1”. While it is
not possible to reset a programmed bit from “1” to “0”, multiple OTP writes are possible, as long as only unprogrammed “0”bits are programmed to “1”.
Independent of the OTP programming, it is possible to overwrite the OTP register temporarily with an OTP write command.
This is possible only if the user lock bit is not programmed.
Due to the programming over the output pin the device will initially start in the communication mode. In this mode the digital
angle value can be read with a specific protocol format. It is a bidirectional communication possible. Parameters can be
written into the device. A programming of the device is triggered by a specific command. With another command (pass2func)
the device can be switched into operation mode (analog or PWM output). In case of a programmed user lock bit the AS5163
automatically starts up in the functional operation mode. No communication of the specific protocol is possible after this.
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
8.1
Hardware Setup
For OTP memory access the pin OUT and the supply connection is required. Without the programmed Mem_Lock_USER
OTP bit the device will start up in the communication mode and will remain into an IDLE operation mode. The pull up
resistor R Communica tion is required during startup. Figure 1 shows the configuration of an AS5163.
Figure 11: Programming schematic of the AS5163
8.2
Protocol timing and commands of single pin interface
During the communication mode the output level is defined by the external pull up resistor R Communication . The output driver of
the device is in tri-state. The bit coding (shown in Figure 12) has been chosen in order to allow the continuous
synchronization during the communication, which can be required due to the tolerance of the internal clock frequency.
Figure 12 shows how the different logic states '0' and '1' are defined. The period of the clock T CLK is defined with 222.2 ns.
The voltage levels V H and V L are CMOS typical.
Each frame is composed by 20 bits. The 4 MSB (CMD) of the frame specifies the type of command that is passed to the
AS5163. 16 data bits contains the communication data. There will be no operation in case of the usage of a not specified
CMD. The sequence is oriented in a way that the LSB of the data is coming first followed by the command. Depending on
the command the number of frames is different. The single pin programming interface block of the AS5163 can operate in
slave communication or master communication mode. In the slave communication mode the AS5163 receives the data
organized in frames. The programming tool is the driver of the single communication line and can pull down the level. In
case of the master communication mode the AS5163 transmits data in the frame format. The single communication line can
be pulled down by the AS5163.
Figure 12: Bit coding of the single pin programming interface
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Figure 13: Protocol Definition
AS5X63
Command
Number
Communication
Mode
CMD
of
Frames
0x0
1
0x9
8
Possible Interface
Description
commands
UNBLOCK
Resets the interface
SLAVE
WRITE128
Writes 128 bits (user + factory settings) into the device
SLAVE
READ128
Read 128 bits (user + factory settings) from the device
SLAVE and MASTER
0xA
9
UPLOAD
Transfers the register content into the OTP memory
SLAVE
0x6
1
DOWNLOAD
Transfers the OTP content to the register content
SLAVE
0x5
1
FUSE
Command for permanent programming
SLAVE
0x4
1
PASS2FUNC
Change operation mode from communication to operation
SLAVE
0x7
1
READ
Read related to the address the user data
SLAVE and MASTER
0xB
2
WRITE
Write related to the address the user data
SLAVE
0xC
1
(0x1)
Table 14: OTP commands and communication interface modes
Note: The command CMD 0x2 is reserved for AMS test purpose.
When single pin programming interface bus is in high impedance state the logical level of the bus is held by the pull up
resistor R Communica tion . Each communication begins by a condition of the bus level which is called START. This is done by
forcing the bus in logical low level (done by the programmer or AS5163 depending on the communication mode). Afterwards
the bit information of the command is transmitted as shown in Figure 14.
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
Figure 14: Bus timing for the WRITE128 command
Figure 15: Bus timing for the READ128 command
In case of READ or READ128 command (Figure 15) the idle phase between the command and the answer is 10 TBIT (TSW).
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MSB
LSB
MSB
LSB
MSB
MSB
LSB
LSB
MSB
LSB
AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
Figure 16: Bus timing for the READ commands
In case of a WRITE command, the device stays in slave communication mode and will not switch to master communication
mode.
When using other commands like DOWNLOAD, UPLOAD, etc. instead of READ or WRITE, it does not matter what is written
in the address fields (ADDR1, ADDR2).
8.2.1
Unblock
The Unblock command can be used to reset only the one-wire interface of the AS5163 in order to recover the possibility to
communicate again without the need of a POR after a stacking event due to noise on the bus line or misalignment with the
AS5163 protocol.
The command is composed by a not idle phase of at least 6 TBIT followed by a packet with all 20 bits at zero (see picture
below).
Figure 17: Unblock sequence
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
8.2.2
WRITE128
Figure 18 shows the format of the frame and the command:
DATA1
DATA0
MSB LSB
LSB
CMD
MSB LSB
1
DATA3
DATA2
MSB LSB
LSB
DATA5
DATA6
MSB LSB
DATA11
DATA10
DATA13
0
0
MSB
0
0
0
CMD
1
LSB
MSB
0
MSB LSB
DATA14
MSB LSB
0
CMD
DATA12
MSB LSB
DATA15
0
MSB LSB
1
LSB
MSB
0
MSB LSB
MSB LSB
0
CMD
1
LSB
0
CMD
DATA8
LSB
0
MSB
0
MSB LSB
1
DATA9
0
CMD
1
LSB
MSB
0
MSB LSB
MSB LSB
1
CMD
DATA4
MSB LSB
DATA7
0
MSB LSB
1
LSB
MSB
0
MSB
0
0
0
CMD
MSB LSB
1
MSB
0
0
0
Figure 18: Frame organisation of the WRITE128 command
The command contains 8 frames. With this command the AS5163 is only receiving frames. This command will transfer the
data in the special function registers (SFRs) of the device. The data is not permanent programmed using this command.
Table 15 and Table 16 describe the organization of the OTP data bits.
The access is performed with CMD field set to 0x9. The next 7 frames with CMD field set to 0x1. The 2 bytes of the first
command will be written at address 0 and 1 of the SFRs, the 2 bytes of the second at address 2 and 3 and so on in order to
cover all the 16 bytes of the 128 SFRs.
Note: It is important to complete always the command. All 8 frames are needed. In case of a wrong command or a
communication error a power on reset must be performed.
The device will be delivered with the programmed Mem_Lock_AMS OTP bit. This bit locks the content of the factory
settings. It is impossible to overwrite this particular region. The written information will be ignored.
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8.2.3
READ128
Figure 19 shows the format of the frame and the command:
Figure 19: Frame organisation of the READ128 command
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
The command is composed by a first frame transmitted to the AS5163. The device is in slave communication mode. The
device remains for the time T SW ITCH in IDLE mode before changing into the master communication mode. The AS5163 starts
to send 8 frames. This command will read the SFRs. The numbering of the data bytes correlates with the address of the
related SFR.
An even parity bit is used to guarantee a correct data transmission. Each parity (P) is related to the frame data content of
the 16 bit word. The MSB of the CMD dummy (P) is reserved for the parity information.
8.2.4
DOWNLOAD
Figure 20 shows the format of the frame.
DO NOT CARE
DO NOT CARE
MSB LSB
LSB
CMD
MSB LSB
1
MSB
0
1
0
Figure 20: Frame Organisation of the DOWNLOAD command
The command consists of one frame received by the AS5163 (slave communication mode). The OTP cell fuse content will be
downloaded into the SFRs.
The access is performed with CMD field set to 0x5.
8.2.5
UPLOAD
Figure 21 shows the format of the frame:
DO NOT CARE
DO NOT CARE
MSB LSB
LSB
CMD
MSB LSB
0
MSB
1
1
0
Figure 21: Frame organisation of the UPLOAD command
The command consists of one frame received by the AS5163 (slave communication mode) and transfers the data from the
SFRs into the OTP fuse cells. The OTP fuses are not permanent programmed using this command.
The access is performed with CMD field set to 0x6.
8.2.6
FUSE
Figure 22 shows the format of the frame:
DO NOT CARE
LSB
DO NOT CARE
MSB LSB
CMD
MSB LSB
0
MSB
0
1
0
Figure 22: Frame organisation of the FUSE command
The command consists of one frame received by the AS5163 (slave communication mode) and it is giving the trigger to
permanent program the non volatile fuse elements.
The access is performed with CMD field set to 0x4.
Note: After this command the device starts to program automatically the build in programming procedure. It is not allowed to
send other commands during this programming time. This time is specified to 4ms after the last CMD bit.
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
8.2.7
PASS2FUNC
Figure 23 shows the format of the frame:
DO NOT CARE
DO NOT CARE
MSB LSB
LSB
CMD
MSB LSB
1
MSB
1
1
0
Figure 23: Frame organisation of the PASS2FUNC command
The command consists of one frame received by the AS5163 (slave communication mode). This command stops the
communication receiving mode, releases the reset of the DSP of the AS5163 device and starts to work in functional mode
with the values of the SFR currently written.
The access is performed with CMD field set to 0x7.
8.2.8
READ
Figure 24 shows the format of the frame:
Figure 24: Frame organisation of the READ command
The command is composed by a first frame sent to the AS5163. The device is in slave communication mode. The device
remains for the time T SW ITCH in IDLE mode before changing into the master communication mode. The AS5163 starts to send
the second frame transmitted by the AS5163.
The access is performed with CMD field set to 0xB.
When the AS5163 has received the first frame it sends a frame with data value of the address specified in the field of the
first frame.
Table 17 shows the possible readable data information for the AS5163 device.
An even parity bit is used to guarantee a correct data transmission. The parity bit (P) is generated by the 16 data bits. The
MSB of the CMD dummy (P) is reserved for the parity information.
8.2.9
WRITE
Figure 25 shows the format of the frame:
DATA
LSB
ADDR
MSB LSB
CMD
MSB LSB
0
MSB
0
1
1
Figure 25: Frame organisation of the WRITE command
The command consists of one frame received by the AS5163 (slave communication mode). The data byte will be written to
the address. The access is performed with CMD field set to 0xC.
Table 17 shows the possible write data information for the AS5163 device.
Note: It is not recommended to access OTP memory addresses using this command.
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
8.3
OTP Programming Data
Data Byte Bit Nr.
DATA15
(0x0F)
Factory Settings
DATA14
(0x0E)
DATA13
(0x0D)
DATA12
(0x0C)
DATA11
(0x0B)
Custom er Settings
DATA10
(0x0A)
DATA9
(0x09)
DATA8
(0x08)
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Symbol
Default
AMS_Test
AMS_Test
AMS_Test
AMS_Test
AMS_Test
AMS_Test
AMS_Test
AMS_Test
AMS_Test
AMS_Test
AMS_Test
AMS_Test
ChipID<0>
ChipID<1>
ChipID<2>
ChipID<3>
ChipID<4>
ChipID<5>
ChipID<6>
ChipID<7>
ChipID<8>
ChipID<9>
ChipID<10>
ChipID<11>
ChipID<12>
ChipID<13>
ChipID<14>
ChipID<15>
ChipID<16>
ChipID<17>
ChipID<18>
ChipID<19>
ChipID<20>
MemLock_AMS
KD<0>
KD<1>
KD<2>
KD<3>
KD<4>
KD<5>
ClampLow<0>
ClampLow<1>
ClampLow<2>
ClampLow<3>
ClampLow<4>
ClampLow<5>
ClampLow<6>
DITH_DISABLE
ClampHi<0>
ClampHi<1>
ClampHi<2>
ClampHi<3>
ClampHi<4>
ClampHi<5>
ClampHi<6>
DIAG_HIGH
OffsetIn<0>
OffsetIn<1>
OffsetIn<2>
OffsetIn<3>
OffsetIn<4>
OffsetIn<5>
OffsetIn<6>
OffsetIn<7>
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
FS
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Description
AMS Test area
Chip ID
Lock of the Factory Setting Area
Kick Down Threshold
Clamping Level Low
DAC12/DAC10 Mode
Clamping Level High
Diagnostic Mode, default =0 for Failure Band Low
Offset
Table 15: OTP Data Organisation Part 1
Note: Factory settings (FS) are used for testing and programming at AMS. These settings are locked (only read access
possbile).
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
DATA7
(0x07)
DATA6
(0x06)
DATA5
(0x05)
DATA4
(0x04)
DATA3
(0x003)
DATA2
(0x02)
DATA1
(0x01)
DATA0
(0x00)
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
OffsetIn<8>
OffsetIn<9>
OffsetIn<10>
OffsetIn<11>
OffsetIn<12>
OffsetIn<13>
OP_Mode<0>
OP_Mode<1>
OffsetOut<0>
OffsetOut<1>
OffsetOut<2>
OffsetOut<3>
OffsetOut<4>
OffsetOut<5>
OffsetOut<6>
OffsetOut<7>
OffsetOut<8>
OffsetOut<9>
OffsetOut<10>
OffsetOut<11>
KDHYS<0>
KDHYS<1>
PWM Frequency<0>
PWM Frequency<1>
BP<0>
BP<1>
BP<2>
BP<3>
BP<4>
BP<5>
BP<6>
BP<7>
BP<8>
BP<9>
BP<10>
BP<11>
BP<12>
BP<13>
FAST_SLOW
EXT_RANGE
Gain<0>
Gain<1>
Gain<2>
Gain<3>
Gain<4>
Gain<5>
Gain<6>
Gain<7>
Gain<8>
Gain<9>
Gain<10>
Gain<11>
Gain<12>
Gain<13>
Invert_slope
Lock_OTPCUST
redundancy<0>
redundancy<1>
redundancy<2>
redundancy<3>
redundancy<4>
redundancy<5>
redundancy<6>
redundancy<7>
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Offset
Selection of Analog="00" or PWM="01"
Output Offset
Kick Down Hysteresis
select the PWM frequency (4 frequencies)
Break Point
Output Data Rate
enables a wider z-Range
Gain
Clockwise/counterclockwise rotation
Customer Memory Lock
Redundancy Bits
Table 16: OTP Data Organisation Part 2
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
Data Content:
•
Redundancy (7:0): For a better programming reliability a redundancy is implemented. In case, the programming of
one bit failed this function can be used. With an address (7:0) one bit can be selected and programmed.
•
Lock_OTPCUST = 1, locks the customer area in the OTP and the device is starting up from now on in operating
mode.
•
Invert_Slope = 1, inverts the output characteristic in analog output mode.
•
Gain (7:0): With this value one can adjust the steepness of the output slope.
•
EXT_RANGE = 1, provides a wider z-Range of the magnet by turning off the alarm function.
•
FAST_SLOW = 1, improves the noise performance due to internal filtering.
•
BP (13:0): The breakpoint can be set with resolution of 14 bit.
•
PWM Frequency (1:0): 4 different frequency settings possible. Please refer to Table 10.
•
KDHYS (1:0) avoids flickering at the KDOWN output (pin 11). For settings refer to Table 12.
•
OffsetOut (11:0) Output characteristic parameter
•
ANALOG_PWM = 1, selects the PWM output mode.
•
OffsetIn (13:0) Output characteristic parameter
•
DIAG_HIGH = 1: In case of an error, the signal goes into high failure-band.
•
ClampHI (6:0) sets the clamping level high with respect to VDD.
•
DITH_DISABLE disables filter at DAC
•
ClampLow (6:0) sets the clamping level low with respect to VDD.
•
KD (5:0) sets the kick-down level with respect to VDD.
8.4
Read/Write user data
R/W
USER
DATA
Area Region
Address
Address
0x10
16
Bit7
Bit6
0x11
17
0
0
0x12
18
OCF
COF
0x17
23
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
DSP_RES
R1K_10K
CORDIC_OUT[7:0]
CORDIC_OUT[13:8]
0
0
0
AGC_VALUE[7:0]
0
Read only
Read and Write
Table 17: Read/Write data
Data Content:
Data only for read:
•
CORDIC_OUT(13:0): 14 bit absolute angular position data.
•
OCF (Offset Compensation Finished): logic high indicates the finished Offset Compensation Algorithm. As soon as
this bit is set, the AS5163 has completed the startup and the data is valid.
•
COF (Cordic Overflow): Logic high indicates an out of range error in the CORDIC part. When this bit is set, the
CORDIC_OUT(13:0) data is invalid. The absolute output maintains the last valid angular value. This alarm may be
resolved by bringing the magnet within the X-Y-Z tolerance limits.
•
AGC_VALUE (7:0) magnetic field indication.
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
Data for write and read:
•
DSP_RES resets the DSP part of the AS5163 the default value is 0. This is active low. The interface is not affected
by this reset.
•
R1K_10K defines the threshold level for the OTP fuses. Can bit can be changed for verification purpose. A
verification of the programming of the fuses is possible. The verification is mandatory after programming.
8.5
Programming Procedure
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Pull-up on out pin;
VDD=5V;
Wait startup time, device enters communication mode;
Write128 command: the trimming bits are written in the SFR memory;
Read128 command: the trimming bits are read back;
Upload command: the SFR memory is transferred into the OTP RAM;
Fuse command: the OTP RAM is written in the Poly Fuse cells.
Wait fuse time (6 ms);
Write command (R1K_10K=1): Poly Fuse cells are transferred into the RAM cells compared with 10KOhm resistor;
Download command: the OTP RAM is transferred into the SFR memory;
Read128 command: the fused bits are read back;
Write command (R1K_10K=0): Poly Fuse cells are transferred into the RAM cells compared with 1KOhm resistor;
Download command: the OTP RAM is transferred into the SFR memory;
Read128 command: the fused bits are read back;
Pass2Func command: go back in normal mode.
For Further information please refer to Application Note AN_AS5163-10.
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
9
Choosing the Proper Magnet
The AS5163 works with a variety of different magnets in size and shape. A typical magnet could be 6mm in diameter and
≥2.5mm in height. Magnetic materials such as rare earth AlNiCo/SmCo5 or NdFeB are recommended. The magnetic field
strength perpendicular to the die surface has to be in the range of ±30mT…±70mT (peak).
The magnet’s field strength should be verified using a gauss-meter. The magnetic field B v at a given distance, along a
concentric circle with a radius of 1.1mm (R1), should be in the range of ±30mT…±70mT (see Figure 26).
typ. 6mm diameter
N
S
Magnet axis
R1
Magnet axis
Vertical field
component
N
S
R1 concentric circle;
radius 1.1mm
Vertical field
component
Bv
(30…70mT)
0
360
36 0
Figure 26: Typical magnet (6x3mm) and magnetic field distribution
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
9.1
Physical Placement of the Magnet
The best linearity can be achieved by placing the center of the magnet exactly over the defined center of the chip as shown
in the drawing below:
3.2 mm
3.2 mm
1
2.5 mm
Defined
center
Rd
2.5 mm
Area of recommended maximum
magnet misalignment
Figure 27: Defined chip center and magnet displacement radius
9.2
Magnet Placement
The magnet’s center axis should be aligned within a displacement radius R d of 0.25mm (larger magnets allow more
displacement) from the defined center of the IC.
The magnet may be placed below or above the device. The distance should be chosen such that the magnetic field on the
die surface is within the specified limits (see Figure 27). The typical distance “z” between the magnet and the package
surface is 0.5mm to 1.5mm, provided the use of the recommended magnet material and dimensions (6mm x 3mm). Larger
distances are possible, as long as the required magnetic field strength stays within the defined limits.
However, a magnetic field outside the specified range may still produce usable results, but the out-of-range condition will be
indicated by an alarm forcing the output into the failure band.
N
S
Package surface
Die surface
0.2299±0.100
0.2341±0.100
0.7701±0.150
Figure 28: Vertical placement of the magnet
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
10 Package Drawings and Markings
14-Lead Thin Shrink Small Outline Package TSSOP-14
Figure 29: Package Dimensions and Marking
Dimensions
Marking: AYWWIZZ
mm
A: Pb-Free Identifier
inch
Symbol
Min
Typ
A
Max
Min
Typ
1.2
Max
Y: Last Digit of Manufacturing Year
.047
WW: Manufacturing Week
A1
0.05
0.10
0.15
.002
.004
.006
I: Plant Identifier
A2
0.8
1
1.05
0.031
0.039
0.041
ZZ: Traceability Code
b
0.19
0.30
0.007
D
4.9
5
5.1
0.193
0.197
0.201
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
e
0.012
0.65
.0256
Table 18: Package Dimensions
JEDEC Package Outline Standard:
MO - 153
Thermal Resistance R th(j-a) :
89 K/W in still air, soldered on PCB
IC's marked with a white dot or the
11 Ordering Information
The devices are available as standard products, shown in Table 19.
Model
Description
Delivery
Form
Package
AS5163HTSU
12 –Bit Programmable Magnetic Rotary Encoder
Tubes
TSSOP 14
Table 19: Ordering Information
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AS5163 12-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
12 Revision History
Revision
Date
Owner
Description
1.1
04-Nov-2008
rfu, mub
1.2
23-Feb-2009
rfu
2.02
19-May-2009
rfu, mub
2.1
14-July-2009
rfu
rename ALARM_DISABLE to EXT_RANGE, add Rev.History table
2.2
05-Nov-2009
rfu
Update of Digital Protocol (Chapter 7)
2.3
27-Nov-2009
rfu
Remove Digital Protocol (Chapter 7)
2.4
10-Dec-2009
rfu
Update of Benefits
First draft
Timing in communication-protocol, corrections of OTP-table, new
structure of chapters
Draft for ES2 + Errata Sheet
Contact
Headquarters
austriamicrosystems AG
A 8141 Schloss Premstätten, Austria
Phone:
+43 3136 500 0
Fax:
+43 3136 525 01
www.austriamicrosystems.com
Copyrights
Copyright © 1997-2009, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe.
Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged,
translated, stored, or used without the prior written consent of the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
This product is protected by U.S. Patent No. 7,095,228.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its
Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the
information set forth herein or regarding the freedom of the described devices from patent infringement.
austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore,
prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information.
This product is intended for use in normal commercial applications. Applications requiring extended temperature range,
unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining
equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application.
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However,
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