ANPEC APW7207CTI-TRG

APW7207
1MHz, High-Efficiency, Step-Up Converter for 2 to 6 White LEDs
Features
General Description
•
Wide Input Voltage from 2.5V to 6V
•
0.2V Reference Voltage
The APW7207 is a current-mode and fixed frequency
boost converter with an integrated N-FET to drive up to 6
•
Fixed 1MHz Switching Frequency
•
High Efficiency up to 88%
•
100Hz to 100kHz PWM Brightness Control Fre-
white LEDs in series.
The series connection allows the LED current to be identical for uniform brightness. Its low on-resistance of NFET and feedback voltage reduces power loss and
achieves high efficiency. Fast 1MHz current-mode PWM
quency
operation is available for input and output capacitors and
a small inductor while minimizing ripple on the input
•
Open-LED Protection
•
Under-Voltage Lockout Protection
•
Over-Temperature Protection
•
<1µA Quiescent Current During Shutdown
•
TSOT-23-6A Packages
•
Lead Free and Green Devices Available
supply. The OVP pin monitors the output voltage and stops
switching if exceeds the over-voltage threshold. An internal soft-start circuit eliminates the inrush current during
start-up.
The APW7207 also integrates under-voltage lockout,
over-temperature protection, and current limit circuits.
The APW7207 is available in TSOT-23-6A packages.
(RoHS Compliant)
Applications
Pin Configuration
•
White LED Display Backlighting
•
Cell Phone and Smart Phone
LX 1
•
PDA, PMP, and MP3
•
Digital Camera
6 VIN
GND 2
5 OVP
FB 3
4 EN
TSOT-23-6A
(Top View)
Simplified Application Circuit
VIN
VOUT
L1
22µH
C1
6
2.2µF
2
OFF ON
4
VIN
GND
EN
LX
OVP
FB
1
5
C2
1µF
Up to 6
WLEDs
3
R1
10Ω
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
1
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APW7207
Ordering and Marking Information
Package Code
CT : TSOT-23-6A
Operating Ambient Temperature Range
I : -40 to 85 oC
Handling Code
TR : Tape & Reel
Assembly Material
G : Halogen and Lead Free Device
APW7207
Assembly Material
Handling Code
Temperature Range
Package Code
APW7207 CT :
X - Date Code
W07X
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings (Note 1)
Symbol
VIN
Parameter
Rating
-0.3 ~ 7
V
FB, EN to GND Voltage
-0.3 ~ VIN
V
VLX
LX to GND Voltage
-0.3 ~ 30
V
VOVP
OVP to GND Voltage
-0.3 ~ 28
V
TJ
VIN Supply Voltage (VIN to GND)
Unit
Maximum Junction Temperature
TSTG
Storage Temperature
TSDR
Maximum Lead Soldering Temperature, 10 Seconds
150
°C
-65 ~ 150
°C
260
°C
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics
Symbol
θJA
Parameter
Junction to Ambient Thermal Resistance. (Note 2)
TSOT-23-6A
Typical Value
Unit
220
°C/W
Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Recommended Operating Conditions (Note 3)
Symbol
VIN
VOUT
Parameter
VIN Input Voltage
Converter Output Voltage
Range
Unit
2.5~ 6
V
Up to 23
V
µF
CIN
Input Capacitor
2.2 or higher
COUT
Output capacitor
0.47 or higher
µF
6.8 ~ 22
µH
L1
Inductor
TA
Ambient Temperature
-40 ~ 85
°C
TJ
Junction Temperature
-40 ~ 125
°C
Note 3: Refer to the application circuit for further information.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
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APW7207
Electrical Characteristics
Refer to figure 1 in the “Typical Application Circuits”. These specifications apply over VIN = 3.6V, TA = -40 ~ 85°C unless otherwise
noted.
Symbol
Parameter
Test Conditions
APW7207
Min.
Typ.
Max.
TA = -40 ~ 85°C, TJ = -40 ~ 125°C
2.5
-
6
VFB = 0.3V, no switching
Unit
SUPPLY VOLTAGE AND CURRENT
VIN
Input Voltage Range
IDD1
IDD2
V
70
100
130
µA
FB = GND, switching
-
1
2
mA
EN = GND
-
-
1
µA
VIN Rising
2.2
2.3
2.48
V
50
100
150
mV
Regulated Feedback Voltage
190
200
210
mV
FB Input Current
-50
-
50
nA
0.8
1.0
1.2
MHz
-
0.6
1.2
Ω
1.0
1.2
-
A
Input DC bias current
ISD
UNDER VOLTAGE LOCKOUT
UVLO Threshold Voltage
UVLO Hysteresis Voltage
REFERENCE AND OUTPUT VOLTAGES
VREF
IFB
INTERNAL POWER SWITCH
FSW
Switching Frequency
RON
Power Switch On Resistance
ILIM
Power Switch Current Limit
LX Leakage Current
DMAX
FB=GND
VEN=0V, VLX=0V or 5V, VIN = 5V
-1
-
1
µA
92
95
98
%
Over Voltage Threshold
23
25
27
V
OVP Hysteresis
1
-
4
V
-
-
45
µA
High-Level Input Voltage of EN
1
-
-
V
Low-Level Input Voltage of EN
-
-
0.4
V
VEN= 0~5V, VIN = 5V
-1
-
1
µA
TJ Rising
-
150
-
°C
-
40
-
°C
LX Maximum Duty Cycle
OUTPUT OVER VOLTAGE PROTECTION
VOVP
OVP Leakage Current
VOVP =24V
ENABLE AND SHUTDOWN
VTEN
ILEN
EN Leakage Current
OVER-TEMPERATURE PROTECTION
TOTP
Over-Temperature Protection
Over-Temperature Protection Hysteresis
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
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APW7207
Typical Operating Characteristics
(Refer to figure 1 in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, 6WLEDs unless otherwise specified)
Efficiency vs. WLED Current
95
90
90
85
85
80
80
Efficiency (η)
Efficiency (η)
Efficiency vs. WLED Current
95
75
VIN=5V
70
VIN=4.2V
65
75
VIN=5V
70
VIN=4.2V
65
VIN=3.6V
60
VIN=3.6V
60
VIN=3.3V
55
≅ 19.3V@20mA
6 WLEDs
VIN=3.3V
50
50
0
5
10
15
20
25
30
0
5
WLED Current, ILED (mA)
15
20
25
30
WLED Current, ILED (mA)
WLED Current vs. PWM Duty Cycle
1.2
Switching Frequency, FSW (MHz)
18
WLED Current, ILED (mA)
10
Switching Frequency vs. Supply
Voltage
20
16
14
12
10
8
100kHz
6
4
1kHz
2
100Hz
0
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
0
20
40
60
80
100
2.5
3
PWM Duty Cycle (%)
3.5
4
4.5
5
5.5
6
Supply Voltage, VIN (V)
WLED Current vs. Supply Voltage
Switch ON Resistance vs. Supply
Voltage
21.0
Switch ON Resistance, RON (Ω)
20.8
WLED Current, ILED (mA)
4 WLEDs ≅ 13V@20mA
η=POUT/PIN
55
η=POUT/PIN
20.6
20.4
20.2
20.0
19.8
19.6
19.4
19.2
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
19.0
2.5
3
3.5
4
4.5
5
5.5
6
2.5
Supply Voltage, VIN (V)
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
3
3.5
4
4.5
5
5.5
6
Supply Voltage, VIN (V)
4
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APW7207
Operating Waveforms
(Refer to the application circuit in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, 6WLEDs unless otherwise
specified)
Start-up
Start-up
1
1
VEN
VEN
VIN
VIN
VOUT
2
2
VOUT
3
3
IIN, 0.1A/Div
IIN, 0.1A/Div
4
4
4WLEDs, L=22µH, VIN=3.6V, ILED=20mA
6WLEDs, L=22µH, VIN=3.6V, ILED=20mA
CH1: VEN, 2V/Div, DC
CH2: VIN, 2V/Div, DC
CH3: VOUT, 10V/Div, DC
CH4: IIN, 0.1A/Div, DC
Time: 1ms/Div
CH1: VEN, 2V/Div, DC
CH2: VIN, 2V/Div, DC
CH3: VOUT, 10V/Div, DC
CH4: IIN, 0.1A/Div, DC
Time: 1ms/Div
Normal Operating Waveform
Open-LED Protection
VLX, 20V/Div, DC
1
VOUT, 10V/Div
VOUT, 50mV/Div, AC
2
1
IL, 0.1A/Div
3
6WLEDs, L=22µH, VIN=3.6V, ILED=20mA
CH1: VLX, 20V/Div, DC
CH2: VOUT, 50mV/Div, AC
CH3: IL, 0.1A/Div, DC
Time: 1µs/Div
CH1: VOUT, 10V/Div, DC
Time: 20ms/Div
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
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APW7207
Pin Description
PIN
NO.
FUNCTION
NAME
1
LX
2
GND
Switch pin. Connect this pin to inductor/diode here.
3
FB
Feedback Pin. Reference voltage is 0.2V. Connect this pin to cathode of the lowest LED and
resistor (R1). Calculate resistor value according to R1=0.2V/ILED.
4
EN
Enable Control Input. Forcing this pin above 1.0V enables the device, or forcing this pin below 0.4V
to shut it down. In shutdown, all functions are disabled to decrease the supply current below 1µA.
Do not leave this pin floating.
5
OVP
Over-Voltage Protection pin. OVP is connected to the output capacitor of the converter.
6
VIN
Main Supply Pin. Must be closely decoupled to the GND with a 2.2µF or greater ceramic capacitor.
Power and signal ground pin.
Block Diagram
VIN
EN
OVP
UVLO
LX
Gate Driver
Control Logic
OverTemperature
Protection
Slope
Compensation
Current
limit
Current Sense
Amplifier
ICMP
Error
Amplifier
Σ
Oscillator
FB
GND
COMP
EAMP
SoftStart
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
6
VREF
0.2V
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APW7207
Typical Application Circuits
VIN
VIN
VOUT
L1
C1
2.2µF
6
2
4
OFF ON
22µH
LX
VIN
OVP
GND
1
C1
2.2µF
C2
1µF
FB
6
Up to 6
WLEDs
2
5
100Hz~100kHz
APW7207
EN
VOUT
L1
22µH
GND
LX
OVP
1
C2
1µF
EN
FB
3
Duty=100%, ILED=20mA
R1
10Ω
R1
10Ω
Duty=0%, LED off
Figure 1. Typical 6 WLEDs
Application
Figure 2. Brightness control using a PWM
signal applies to EN
VIN
VOUT
L1
10µH
C1
10µF
6
Enable(EN)
2
Q1
BSS138
PWM Brightness Control
VIN
6S2P
WLEDs
LX
GND
OVP
1
C2
10µF
R3
1MΩ
ILED1
ILED2
5
APW7207
4
EN
FB
3
100Hz~100kHz
Duty=100%, ILED1/2 ≅ 20mA
Up to 6
WLEDs
5
APW7207
4
3
VIN
R1
5.1Ω
R2
100kΩ
Duty=0%, LED off
Figure 3. Separate Enable and PWM Brightness Control Using a MOSFET
VIN
L1
4.5V~6V
10µH
C1
10µF
6
2
4
OFF ON
VIN
GND
VOUT
LX
OVP
1
C2
10µF
9 Strings
total
5
APW7207
EN
FB
3
R1
1.1Ω
Figure 4. Circuit for driving 27 WLEDs
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
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APW7207
Function Description
Main Control Loop
Over-Temperature Protection (OTP)
The APW7207 is a constant frequency current-mode
The over-temperature circuit limits the junction temperature of the APW7207. When the junction temperature ex-
switching regulator. During normal operation, the internal N-channel power MOSFET is turned on each cycle
ceeds 150 ο C, a thermal sensor turns off the power
MOSFET, allowing the devices to cool. The thermal sen-
when the oscillator sets an internal RS latch and turned
off when an internal comparator (ICMP) resets the latch.
sor allows the converters to start a soft-start process and
regulate the output voltage again after the junction tem-
The peak inductor current at which ICMP resets the RS
latch is controlled by the voltage on the COMP node, which
perature cools by 40οC. The OTP is designed with a 40οC
hysteresis to lower the average Junction Temperature
is the output of the error amplifier (EAMP). An external
resistive divider connected between VOUT and ground al-
(TJ) during continuous thermal overload conditions, increasing the lifetime of the device.
lows the EAMP to receive an output feedback voltage VFB
at FB pin. When the load current increases, it causes a
Enable/Shutdown
slightly decrease in VFB relative to the 0.2V reference, which
in turn causes the COMP voltage to increase until the
Driving EN to ground places the APW7207 in shutdown
average inductor current matches the new load current.
mode. When in shutdown, the internal power MOSFET
turns off, all internal circuitry shuts down and the quiescnet
VIN Under-Voltage Lockout (UVLO)
supply current reduces to 1µA maximum.
The Under-Voltage Lockout (UVLO) circuit compares the
This pin also could be used as a digital input allowing
brightness control using a PWM signal from 100Hz to
input voltage at VIN with the UVLO threshold (2.3V rising,
typical) to ensure the input voltage is high enough for
100kHz. The 0% duty cycle of PWM signal corresponds to
zero LEDs current and 100% corresponds to full one.
reliable operation. The 100mV (typ) hysteresis prevents
supply transients from causing a restart. Once the input
Open-LED Protection
voltage exceeds the UVLO rising threshold, start-up
begins. When the input voltage falls below the UVLO fall-
In driving LED applications, the feedback voltage on FB
pin falls down if one of the LEDs, in series, is failed.
ing threshold, the controller turns off the converter.
Meanwhile, the converter unceasingly boosts the output
voltage like a open-loop operation. Therefore, an over-
Soft-Start
The APW7207 has a built-in soft-start to control the N-
voltage protection (OVP), monitoring the output voltage
via OVP pin, is integrated into the chip to prevent the LX
channel MOSFET current rise during start-up. During softstart, an internal ramp, connected to one of the inverting
and the output voltages from exceeding their maximum
voltage ratings. When the voltage on the OVP pin rises
inputs, raise up to replace the output voltage of error amplifier until the ramp voltage reaches the VCOMP.
above the OVP threshold (28V typical), the converter stops
switching and prevents the output voltage from rising.
Current-Limit Protection
The converter can work again when the falling OVP voltage falls below the OVP voltage threshold.
The APW7207 monitors the inductor current, flowing
through the N-channel MOSFET, and limits the current
peak at current-limit level to prevent loads and the
APW7207 from damages during overload or short-circuit
conditions.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
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APW7207
Application Information
The peak inductor current is calculated as the following
equation:
Input Capacitor Selection
The input capacitor (CIN) reduces the ripple of the input
current drawn from the input supply and reduces noise
injection into the IC. The reflected ripple voltage will be
smaller when an input capacitor with larger capacitance
is used. For reliable operation, it is recommended to
select the capacitor with maximum voltage rating at least
IPEAK = IIN(MAX ) +
VIN
1.2 times of the maximum input voltage. The capacitors
should be placed close to the VIN and GND.
1 VIN ⋅ (VOUT − VIN )
⋅
2 VOUT ⋅ L ⋅ FSW
IL
IIN
LX
N-FET
CIN
IOUT
D1
VOUT
ESR
ISW
COUT
Inductor Selection
Selecting an inductor with low dc resistance reduces con-
IL
duction losses and achieves high efficiency. The efficiency
is moderated whilst using small chip inductor which op-
ILIM
IPEAK
erates with higher inductor core losses. Therefore, it is
∆IL
necessary to take further consideration while choosing
an adequate inductor. Mainly, the inductor value deter-
IIN
mines the inductor ripple current: larger inductor value
results in smaller inductor ripple current and lower con-
ISW
duction losses of the converter. However, larger inductor
value generates slower load transient response. A reasonable design rule is to set the ripple current, ∆IL, to be
30% to 50% of the maximum average inductor current,
IL(AVG). The inductor value can be obtained as below,
 V
L ≥  IN
 VOUT
ID
2

VOUT − VIN
η
 ×
×
 F ⋅I
 ∆IL 
SW OUT (MAX )



 IL (AVG ) 


IOUT
Output Capacitor Selection
where
The current-mode control scheme of the APW7207 al-
VIN = input voltage
lows the usage of tiny ceramic capacitors. The higher
capacitor value provides good load transients response.
VOUT = output voltage
Ceramic capacitors with low ESR values have the lowest
output voltage ripple and are recommended. If required,
FSW = switching frequency in MHz
IOUT = maximum output current in amp.
tantalum capacitors may be used as well. The output ripple
is the sum of the voltages across the ESR and the ideal
η = Efficiency
∆IL /IL(AVG) = inductor ripple current/average current
output capacitor.
(0.3 to 0.5 typical)
To avoid the saturation of the inductor, the inductor should
be rated at least for the maximum input current of the
Δ VOUT = ΔVESR + ΔVCOUT
converter plus the inductor ripple current. The maximum
input current is calculated as below:
∆VCOUT ≈
IIN(MAX ) =
V
− VIN 

⋅  OUT

V
⋅
 OUT FSW 
∆VESR ≈ IPEAK ⋅ RESR
IOUT (MAX ) ⋅ VOUT
VIN ⋅ η
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
IOUT
COUT
where IPEAK is the peak inductor current.
9
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APW7207
Application Information (Cont.)
Output Capacitor Selection (Cont.)
For ceramic capacitor application, the output voltage ripple
is dominated by the ∆VCOUT. When choosing the input and
output ceramic capacitors, the X5R or X7R with their good
t e m p e r a t u r e an d v o l t a g e c h a r ac t e r i s t i c s a r e
recommended.
Diode Selection
To achieve high efficiency, a Schottky diode must be used.
The current rating of the diode must meet the peak current rating of the converter.
Setting the LED Current
In figure 1, the converter regulates the voltage on FB pin,
connected with the cathod of the lowest LED and the current-sense resistor R1, at 0.2V (typical). Therefore, the
current (ILED), flowing via the LEDs and the R1, is calculated by the following equation:
ILED = 0.2V/R1
Recommended Inductor Selection
Designator
Manufacturer
Part Number
Inductance (µH)
Max DCR (Ω)
Saturation
Current (A)
Dimensions
L x W x H (mm3)
L1
GOTREND
GTSD-53-100
10
0.09
1.3
5x5x3
Recommended Capacitor Selection
Designator
Manufacturer
Part Number
Capacitance (µF)
TC Code
Rated Voltage (V)
Case size
C1
Murata
GRM188C70J22
5KE20
2.2
X7S
6.3
0603
C1
Murata
GRM219C80J10
6KE39
10
X6S
6.3
0805
C2
Murata
GRM21BR71H10
5KA12
1.0
X7R
50
0805
C2
Murata
GRM31CR61E10
6KA12
10
X5R
25
1206
Recommended Diode Selection
Designator
Manufacturer
Part Number
D1
Zowie
MSCD104
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
Maximum average forward Maximum repetitive peak
rectified current (A)
reverse voltage (V)
1.0
10
40
Case size
0805
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APW7207
Application Information (Cont.)
Layout Consideration
For all switching power supplies, the layout is an important step in the design; especially at high peak currents
and switching frequencies. If the layout is not carefully
done, the regulator might show noise problems and duty
cycle jitter.
1. The input capacitor should be placed close to the VIN
and GND. Connecting the capacitor with VIN and GND
pins by short and wide tracks without using any vias for
filtering and minimizing the input voltage ripple.
2. The inductor should be placed as close as possible to
the LX pin to minimize length of the copper tracks as
well as the noise coupling into other circuits.
3. Since the feedback pin and network is a high impedance circuit, the feedback network should be routed
away from the inductor. The feedback pin and feedback network should be shielded with a ground plane
or track to minimize noise coupling into this circuit.
4. A star ground connection or ground plane minimizes
ground shifts and noise is recommended.
Via To OVP
L1
To Anode of
WLEDs
VOUT
D1
C1
VIN
C2
LX
Via To VOUT
R1
VEN
From Cathod of
WLEDs
Refer to Fig. 1
Figure 5. Optimize APW7207 Layout
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
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APW7207
Package Information
TSOT-23-6A
D
e
E
E1
SEE VIEW A
b
c
0.25
A
GAUGE PLANE
SEATING PLANE
L
A1
A2
e1
VIEW A
S
Y
M
B
O
L
TSOT-23-6A
INCHES
MILLIMETERS
MIN.
MAX.
0.70
A1
A2
A
MIN.
MAX.
1.00
0.028
0.039
0.01
0.10
0.000
0.004
0.70
0.90
0.028
0.035
0.020
b
0.30
0.50
0.012
c
0.08
0.20
0.003
0.008
D
2.70
3.10
0.106
0.122
E
2.60
3.00
0.102
0.118
E1
1.40
1.80
0.055
0.071
e
0.95 BSC
e1
1.90 BSC
L
0
0.037 BSC
0.075 BSC
0.30
0.60
0°
8°
0.012
0.024
0°
8°
Note : Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
12
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APW7207
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
TSOT-23-6A
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
4.0±0.10
4.0±0.10
(mm)
Devices Per Unit
Package Type
TSOT-23-6A
Unit
Tape & Reel
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
Quantity
3000
13
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APW7207
Taping Direction Information
TSOT-23-6A
USER DIRECTION OF FEED
AAAX
AAAX
AAAX
AAAX
AAAX
AAAX
AAAX
Classification Profile
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
14
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APW7207
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3°C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness
<2.5 mm
≥2.5 mm
Volume mm
<350
235 °C
220 °C
3
Volume mm
≥350
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
15
Description
5 Sec, 245°C
1000 Hrs, Bias @ 125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
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APW7207
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Dec., 2009
16
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