APW7178 1.5MHz, 1A Synchronous Buck Regulator Features General Description • 1A Output Current • Wide 2.7V~6.0V Input Voltage APW7178 is a 1.5MHz high efficiency monolithic synchronous buck regulator. Design with current mode scheme, • Fixed 1.5MHz Switching Frequency • Low Dropout Operating at 100% Duty Cycle • 25µA Quiescent Current • Synchronous Rectifier • 0.6V Reference Voltage • <0.5µA Input Current During Shutdown • Short-Circuit Protection • Over-Temperature Protection • Available in TDFN2x2-6 Packages • Lead Free and Green Devices Available the APW7178 is stable with ceramic output capacitor. Input voltage from 2.7V to 6.0V makes the APW7178 ideally suited for single Li-Ion battery powered applications. 100% duty cycle provides low dropout operation, extending battery life in portable electrical devices. The internally fixed 1.5MHz operating frequency allows the using of small surface mount inductors and capacitors. The synchronous switches included inside increase the efficiency and eliminate the need of an external Schottky diode. The APW7178 is available in TDFN2x2-6 packages. (RoHS Compliant) Simplified Application Circuit Applications VIN • HD STB • BT Mouse • PND Instrument • Portable Instrument L1 2.2µH APW7178 IIN C1 4.7µF (MLCC) VOUT SW VIN PS R1 C3 C2 10µF (MLCC) RUN FB GND R2 R1 ≤ 1MΩ is recommended Pin Configuration R2 ≤ 200KΩ is recommended APW7178 APW7178-10/12/18/33 L1 PS 1 6 FB/VOUT RUN 2 5 GND VIN 3 4 SW VIN 2.2µH IIN VIN C1 4.7µF (MLCC) TDFN2x2-6 (Top View) VOUT SW PS C2 10µF (MLCC) RUN VOUT GND ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 1 www.anpec.com.tw APW7178 Ordering and Marking Information Voltage Code APW7178 10: 1.0V 12: 1.2V 18: 1.8V 33: 3.3V Blank : Adjustable Version Package Code QB: TDFN2x2-6 Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device Assembly Material Handling Code Temperature Range Package Code Voltage Code W78 X X - Date Code APW7178-10QB : 78δ X X - Date Code APW7178-12QB : 785 X X - Date Code APW7178-18QB : 78C X X - Date Code APW7178-33QB : 78R X X - Date Code APW7178QB : Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Absolute Maximum Ratings (Note 1) Symbol VIN Parameter Input Bias Supply Voltage (VIN to GND) RUN, FB, SW to GND Voltage PD Power Dissipation Maximum Junction Temperature TSTG Storage Temperature TSDR Maximum Lead Soldering Temperature, 10 Seconds Rating Unit -0.3 ~ 7 V -0.3 ~ VIN+0.3 V Internally Limited W 150 o -65 ~ 150 o 260 o C C C Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics Symbol θJA Parameter Typical Value Junction-to-Ambient Resistance in Free Air (Note 2) TDFN2x2-6 Unit o 165 C/W Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. Recommended Operating Conditions (Note 3) Symbol VIN Parameter Input Bias Supply Voltage (VIN to GND) Range Unit 2.7 ~ 6 V VOUT Converter Output Voltage 0.6 ~ VIN V IOUT Converter Output Current 0~1 A L1 Converter Output Inductor 1.0 ~ 10 µH Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 2 www.anpec.com.tw APW7178 Recommended Operating Conditions (Note 3) (Cont.) Parameter Range Unit Converter Input Capacitor 4.7 ~100 µF Converter Output Capacitor 4.7 ~100 µF Ambient Temperature -40 ~ 85 o -40 ~ 125 o Symbol CIN COUT TA TJ Junction Temperature C C Note 3: Refer to the typical application circuit Electrical Characteristics Unless otherwise specified, these specifications apply over VIN=3.6V and TA= 25 oC. Symbol Parameter APW7178 Test Conditions Unit Min. Typ. Max. 2.7 - 6 V SUPPLY VOLTAGE AND CURRENT VIN Input Voltage Range IQ Quiescent Current VFB = 0.7V - 25 40 µA ISD Shutdown Input Current RUN = GND - - 0.5 µA UVLO Threshold 2.1 2.35 2.6 V UVLO Hysteresis - 0.1 - V 0.588 0.6 0.612 V 0.98 1.0 1.02 V 1.176 1.2 1.224 V 1.764 1.8 1.836 V 3.234 3.3 3.366 V -2.5 - +2.5 % -50 - 50 nA 1.2 1.5 1.8 MHz - kHz POWER-ON-RESET (POR) and LOCKOUT VOLTAGE THRESHOLDS REFERENCE VOLTAGE VREF Reference Voltage Output Voltage Accuracy IFB APW7178 VIN=2.7V~6V, TA = -40~85 oC APW7178-10 VIN=2.7V~6V, TA = -40~85 oC APW7178-12 VIN=2.7V~6V, TA = -40~85 oC APW7178-18 VIN=2.7V~6V, TA = -40~85 oC APW7178-33 VIN=2.7V~6V, TA = -40~85 oC 0A < IOUT < 1A FB Input Current INTERNAL POWER MOSFETS FSW Switching Frequency Foldback Frequency VFB = 0.1V - 210 Foldback Threshold Voltage on FB VFB Falling - 0.2 - V - 50 - mV - Ω Foldback Hysteresis RP-FET High Side N-FET Switch ON Resistance ISW =200mA - 0.28 RN-FET Low Side P-FET Switch ON Resistance ISW =200mA - 0.25 - Ω Minimum On-Time - - 100 ns Maximum Duty Cycle - - 100 % 1.4 1.6 - A PROTECTION ILIM Maximum Inductor Current-Limit IP-FET, 2.7V≦VIN≦6V TOTP Over-Temperature Protection TJ Rising - 150 - Over-Temperature Protection Hysteresis TJ Falling - 30 - Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 3 °C www.anpec.com.tw APW7178 Electrical Characteristics (Cont.) Unless otherwise specified, these specifications apply over VIN=3.6V and TA= 25 oC. Symbol Parameter APW7178 Test Conditions Min. Typ. Unit Max. START-UP AND SHUTDOWN TSS Soft-Start Duration (Note 4) - 0.7 - ms RUN Input High Threshold VIN = 2.7V~6V - - 1 V RUN Input Low Threshold VIN = 2.7V~6V 0.4 - - V RUN Leakage Current VRUN = 5V, VIN = 5V -1 - 1 µA PS Input High Threshold VIN = 2.7V~6V - - 2 V PS Input Low Threshold VIN = 2.7V~6V 0.4 - - V Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 4 www.anpec.com.tw APW7178 Typical Operating Characteristics (Refer to the application circuit in the section “Typical Application Circuits”, VIN=3.6V, VOUT=1.8V, TA=25oC unless Efficiency vs. Load Current 100 100 90 90 80 80 Efficiency (%) Efficiency (%) otherwise specified ) Efficiency vs. Load Current 70 60 VIN=3.3V VIN=5V 50 40 60 VOUT = 1.2V L = 2.2µH COUT = 10µF 30 20 20 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 1 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Load Current, IOUT(A) Supply Voltage vs. ON Resistance 0.35 35 RP-FET 0.30 30 ON Resistance(Ω) Quiescent Current, IDD(µA) 1 Load Current, IOUT(A) Supply Voltage vs. Quiescent Current 40 25 20 15 10 0.25 0.20 RN-FET 0.15 0.10 0.05 5 0 VIN=3.3V VIN=5V 50 40 VOUT = 1.8V L = 2.2µH COUT = 10µF 30 70 2 2.5 3 3.5 4 4.5 5 5.5 0.00 6 Supply Voltage, VIN(V) 2.5 3 3.5 4 4.5 5 5.5 6 Supply Voltage, VIN(V) Supply Voltage vs. Reference Voltage 0.65 2 Reference Voltage, VREF(V) 0.64 0.63 0.62 0.61 0.6 0.59 0.58 0.57 0.56 0.55 2 2.5 3 3.5 4 4.5 5 5.5 6 Supply Voltage, VIN (V) Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 5 www.anpec.com.tw APW7178 Operating Waveforms (Refer to the application circuit in the section “Typical Application Circuits”, VIN=3.6V, VOUT=1.8V, TA=25oC unless otherwise specified) Soft Start Load Transient Response 1A 1 VRUN 300mA 1 VOUT ,1V/Div, DC 2 IOUT, 0.5A/Div, DC VOUT ,100mV/Div, AC 2 3 IIN, 200mA/Div L=2.2µH, VIN=5V, VOUT=1.8V, COUT=10µF L=2.2µH, VIN=5V, COUT=10µF Time: 100µs/Div Time: 100µs/Div Normal Operation 2.5V 1.5V VIN, 0.5V/Div 1 VSW ,2V/Div, DC 2 VOUT ,20mV/Div, AC VOUT,200mV/Div,AC IL, 500mV/Div, DC 3 L=2.2µH, VINI=5V, VOUT=1.2V, COUT=10µF = 100mA OUT Time: 500ns/Div Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 6 www.anpec.com.tw APW7178 Pin Description PIN FUNCTION NO. NAME 1 PS Pulse Frequency Mode Select. Pulling this pin to logic high forces Buck converter to enter PWM mode. Pulling it low places the IC into automatic mode which depends on the output load current to operate in either PFM(Pulse Frequency Modulation) or PWM mode automatic switching. 2 RUN Enable Control Input. Forcing this pin above 1.0V enables the device. Forcing this pin below 0.4V shuts it down. In shutdown, all functions are disabled to decrease the supply current below 0.5µA. Do not leave RUN pin floating. 3 VIN Device and Converter Supply Pin. Must be closely decoupled to GND with a 4.7µF or greater ceramic capacitor. 4 SW Switch Node Connected to Inductor. This pin connects to the drains of the internal main and synchronous power MOSFETs switches. 5 GND 6 FB/VOUT Power and Signal Ground. In the adjustable version, feedback function is available. The feedback voltage is decided by an external resistive divider across the output. In the fixed version, an internal resistive divider divides the output voltage down for comparison to the internal reference voltage. Block Diagram Current Sense Amplifier RUN VIN Shutdown Control Logic Control SW OverTemperature Protection Gate Driver Current -Limit Slope Compensation ZeroCrossing Comparator ∑ Oscillator GND PS Error Amplifier ICMP COMP FB (APW7178) EAMP VOUT (APW7178-XX) SoftStart Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 7 VREF 0.6V www.anpec.com.tw APW7178 Typical Application Circuit APW7178 VIN L1 2.2µH IIN SW VIN C1 4.7µF (MLCC) VOUT PS C2 10µF (MLCC) R1 C3 RUN FB GND R2 APW7178-10/12/18/33 VIN IIN VOUT SW VIN C1 4.7µF (MLCC) L1 2.2µH R1 ≤ 1MΩ is recommended R2 ≤ 200KΩ is recommended C2 10µF (MLCC) PS RUN VOUT GND Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 8 www.anpec.com.tw APW7178 Function Description Main Control Loop Dropout Operation The APW7178 is a constant frequency, synchronous rec- As the input supply voltage decreases to a value approaching the output voltage, the duty cycle increases tifier and current-mode switching regulator. In normal operation, the internal P-channel power MOSFET is toward the maximum on time. Further, reduction of the supply voltage forces the main switch to remain on for turned on each cycle. The peak inductor current at which ICMP turn off the P-FET is controlled by the voltage on the more than one cycle until it reaches 100% duty cycle. The input voltage minus the voltage drop will determine the COMP node, which is the output of the error amplifier (EAMP). An external resistive divider connected between output voltage across the P-FET and the inductor. An important detail to remember is that on resistance of VOUT and ground allows the EAMP to receive an output feedback voltage VFB at FB pin. When the load current P-FET switch will increase at low input supply voltage. Therefore, the user should calculate the power dissipa- increases, it causes a slightly decrease in VFB relative to the 0.6V reference, which in turn causes the COMP volt- tion when the APW7178 is used at 100% duty cycle with age to increase until the average inductor current matches the new load current. low input voltage. Over-Temperature Protection (OTP) Enable/Shutdown Driving RUN to the ground places the APW7178 in shut- The over-temperature circuit limits the junction temperature of the APW7178. When the junction temperature ex- down mode. When in shutdown, the internal power MOSFETs turn off, all internal circuitry shuts down and ceeds 150oC, a thermal sensor turns off the both power MOSFETs, allowing the devices to cool. The thermal sen- the quiescent supply current reduces to 0.5µA maximum. sor allows the converters to start a soft-start process and regulate the output voltage again after the junction tem- Pulse Frequency Modulation Mode (PFM) perature cools by 30oC. The OTP is designed with a 30oC hysteresis to lower the average Junction Temperature The APW7178 is a fixed frequency, peak current mode PWM step-down converter. At light loads, the APW7178 (TJ) during continuous thermal overload conditions, increasing the lifetime of the device. will automatically enter in pulse frequency mode operation to reduce the dominant switching losses. In PFM operation, the inductor current may reach zero or reverse on each pulse. A zero current comparator turn off the NFET, forcing DCM operation at light load. These controls get very low quiescent current, help to maintain high efficiency over the complete load range. Slope Compensation and Inductor Peak Current The APW7178 is a peak current mode PWM step down converter. To prevent sub-harmonic oscillations, the APW7178 sense the peak current and add slope compensation to stable the converter. It is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. Normally, this results in a reduction of maximum inductor peak current for duty cycles > 40%. However, the APW7178 uses a special scheme that counteracts this compensating ramp, which allows the maximum inductor peak current to remain unaffected throughout all duty cycles. Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 9 www.anpec.com.tw APW7178 Application Information Input Capacitor Selection shown in “Typical Application Circuits”. A suggestion of Because buck converters have a pulsating input current, a low ESR input capacitor is required. This results in the maximum value of R2 is 200kΩ to keep the minimum current that provides enough noise rejection ability through best input voltage filtering, minimizing the interference with other circuits caused by high input voltage spikes. the resistor divider. The output voltage can be calculated as below: Also, the input capacitor must be sufficiently large to stabilize the input voltage during heavy load transients. For R1 R1 VOUT = VREF ⋅ 1 + = 0.6 ⋅ 1 + R2 R2 good input voltage filtering, usually a 4.7µF input capacitor is sufficient. It can be increased without any limit for VOUT better input-voltage filtering. Ceramic capacitors show better performance because of the low ESR value, and R1≤1MΩ they are less sensitive against voltage transients and spikes compared to tantalum capacitors. Place the input FB R2 ≤ 200kΩ APW7178 capacitor as close as possible to the input and GND pin of the device for better performance. GND Inductor Selection Output Capacitor Selection For high efficiencies, the inductor should have a low DC The current-mode control scheme of the APW7178 allows the use of tiny ceramic capacitors. The higher ca- resistance to minimize conduction losses. Especially at high-switching frequencies the core material has a higher pacitor value provides the good load transients response. impact on efficiency. When using small chip inductors, the efficiency is reduced mainly due to higher inductor Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. If required, core losses. This needs to be considered when selecting the appropriate inductor. The inductor value deter- tantalum capacitors may be used as well. The output ripple is the sum of the voltages across the ESR and the mines the inductor ripple current. The larger the inductor value, the smaller the inductor ripple current and the lower ideal output capacitor. the conduction losses of the converter. Conversely, larger inductor values cause a slower load transient response. ∆VOUT A reasonable starting point for setting ripple current, ∆IL, is 40% of maximum output current. The recommended V VOUT ⋅ 1 − OUT VIN ≅ FSW ⋅ L 1 ⋅ ESR + 8 ⋅ FSW ⋅ COUT When choosing the input and output ceramic capacitors, inductor value can be calculated as below: choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage char- V VOUT 1 − OUT VIN L≥ FSW ⋅ ∆IL acteristics of all the ceramics for a given value and size. VIN IL(MAX) = IOUT(MAX) + 1/2 x ∆IL IIN IP-FET To avoid the saturation of the inductor, the inductor should IL be rated at least for the maximum output current of the converter plus the inductor ripple current. CIN Output Voltage Setting P-FET VOUT SW N-FET In the adjustable version, the output voltage is set by a resistive divider. The external resistive divider is con- IOUT ESR COUT nected to the output, allowing remote voltage sensing as Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 10 www.anpec.com.tw APW7178 Application Information (Cont.) Output Capacitor Selection (Cont.) The maximum power dissipation on the device can be shown as the following figure: IL 0.8 Maximum Power Disspation (W) ILIM IPEAK ∆IL IOUT IP-FET 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 -25 0 25 50 75 100 125 150 Junction Temperature (oC) Thermal Consideration Layout Consideration In most applications, the APW7178 does not dissipate much heat due to its high efficiency. But, in applications For all switching power supplies, the layout is an impor- where the APW7178 is running at high ambient temperature with low supply voltage and high duty cycles, the heat tant step in the design; especially at high peak currents and switching frequencies. If the layout is not carefully dissipated may exceed the maximum junction tempera- done, the regulator might show noise problems and duty cycle jitter. ture of the part. If the junction temperature reaches approximately 150°C, both power switches will be turned 1. The input capacitor should be placed close to the VIN and GND. Connecting the capacitor and VIN/GND with off and the SW node will become high impedance. To avoid the APW7178 from exceeding the maximum junc- short and wide trace without any via holes for good input voltage filtering. The distance between VIN/GND tion temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to deter- to capacitor less than 2mm respectively is recommended. mine whether the power dissipated exceeds the maximum junction temperature of the part. The power dissi- 2. To minimize copper trace connections that can inject noise into the system, the inductor should be placed pated by the part is approximated: as close as possible to the SW pin to minimize the noise coupling into other circuits. PD ≅ IOUT2 x (RP-FET x D+RN-FET x (1-D)) The temperature rise is given by: 3. The output capacitor should be place closed to VOUT and GND. TR = (PD)(θJA) 4. Since the feedback pin and network is a high impedance circuit the feedback network should be routed Where PD is the power dissipated by the regulator, D is duty cycle of main switch away from the inductor. The feedback pin and feedback network should be shielded with a ground plane D = VOUT/VIN The θJA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, or trace to minimize noise coupling into this circuit. 5. A star ground connection or ground plane minimizes TJ, is given by: ground shifts and noise is recommended. TJ = TA + TR Where TA is the ambient temperature. Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 11 www.anpec.com.tw APW7178 Package Information TDFN2x2-6 A b E D D2 A1 A3 L K E2 Pin 1 Corner e TDFN2x2-6 S Y M B O L MIN. MAX. MIN. MAX. A 0.70 0.80 0.028 0.031 A1 0.00 0.05 0.000 0.002 0.007 MILLIMETERS A3 INCHES 0.20 REF 0.008 REF 0.012 b 0.18 0.30 D 1.90 2.10 0.075 0.083 0.063 D2 1.00 1.60 0.039 E 1.90 2.10 0.075 0.083 E2 0.60 1.00 0.024 0.039 0.45 0.012 e 0.65 BSC L 0.30 K 0.20 0.026 BSC 0.018 0.008 Note : 1. Followed from JEDEC MO-229 WCCC. Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 12 www.anpec.com.tw APW7178 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application TDFN2x2-6 A H T1 C d D W E1 F 178.0±2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.0±0.20 1.75±0.10 3.5±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 4.0±0.10 4.0±0.10 2.0±0.05 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.40 2.35 MIN 2.35 MIN 1.30±0.20 (mm) Devices Per Unit Package Type Unit Quantity TDFN2x2-6 Tape & Reel 3000 Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 13 www.anpec.com.tw APW7178 Taping Direction Information TDFN2x2-6 USER DIRECTION OF FEED Classification Profile Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 14 www.anpec.com.tw APW7178 Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3 °C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) Package Thickness <2.5 mm ≥2.5 mm Volume mm <350 235 °C 220 °C 3 Volume mm ≥350 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 15 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA www.anpec.com.tw APW7178 Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2011 16 www.anpec.com.tw