TI TMS3472ADW

TMS3472A
SERIAL DRIVER
SOCS025B – FEBRUARY 1991
•
•
•
•
•
•
TTL-Compatible Inputs
CCD-Compatible Outputs
Variable-Output Slew Rates With External
Resistor Control
Frame-Transfer Operation
Solid-State Reliability
Adjustable Clock Levels
description
DW PACKAGE
(TOP VIEW)
DLADJ
GND
PD
SRG2,3IN
SRG1IN
TRGIN
2,3PC1
2,3PC2
SSR
VSS
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
VSS
1PC2
1PC1
VCC
SRG3OUT
SRG2OUT
SRG1OUT
TRGOUT
VCC
TSR
The TMS3472A serial driver is a monolithic
9
12
CMOS integrated circuit designed to drive the
10
11
serial-register gate (SRGn) and transfer-gate
(TRG) inputs of the Texas Instruments (TI)
TC241 (monochrome) CCD image sensor. The TMS3472A interfaces the TI TMS3471C or a user-defined
timing generator to the TC241; it receives TTL signals from the timing generator and outputs level-shifted and
slew-rate-adjusted signals to the image sensor. The TMS3472A contains three noninverting serial drivers and
one noninverting transfer driver as well as circuitry for slew-rate adjustment.
The voltage levels on SRG1OUT, SRG2OUT, SRG3OUT, and TRGOUT are controlled by the levels on VSS and
VCC. DLADJ, PD, SRG1IN, SRG2,3IN, and TRGIN are TTL compatible. A high level on PD allows the TMS3472
to operate normally with the level-shifted and slew-rate-adjusted outputs following the inputs. When PD is low,
the device is in a low power-consumption mode and all outputs are at VCC.
The slew rate of SRG1OUT, SRG2OUT, and SRG3OUT is controlled by connecting a resistor between VCC and
SSR. The TRGOUT slew rate is controlled by connecting a resistor between VCC and TSR. The larger the
resistor values, the longer the rise and fall times are.
The TMS3472A is available in a 20-pin surface-mount package (DW) and is characterized for operation from
– 20°C to 45°C.
This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These
circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C,
Method 3015; however, precautions should be taken to avoid application of any voltage higher than maximum-rated voltages to these
high-impedance circuits. During storage or handling, the device leads should be shorted together or the device should be placed in
conductive foam. In a circuit, unused inputs should always be connected to an appropriated logic voltage level, preferably either VCC or ground.
Specific guidelines for handling devices of this type are contained in the publication Guidelines for Handling Electrostatic-Discharge-Sensitive
(ESDS) Devices and Assemblies available from Texas Instruments.
TI is a trademark of Texas Instruments Incorporated.
Copyright  1991, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
TMS3472A
SERIAL DRIVER
SOCS025B – FEBRUARY 1991
functional block diagram
PD
POWER DOWN
1PC1
PLL1
Phase Control
1PC2
Phase Control
DLADJ
Delay Adjust
TTL/CCD
S1
SRG1IN
SSR
SRG1OUT
SR
2,3PC1
PLL2,3
Phase Control
2,3PC2
Phase Control
Delay Adjust
TTL/CCD
S2
SRG2OUT
SR
TTL/CCD
S3
SRG2,3IN
SRG3OUT
SR
TTL/CCD
T
TRGIN
TSR
2
TRGOUT
SR
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TMS3472A
SERIAL DRIVER
SOCS025B – FEBRUARY 1991
logic symbol†
PD
SSR
DLADJ
1PC1
1PC2
SRG1IN
2,3PC1
2,3PC2
SRG2,3IN
CCD Driver
3
Pwr Dwn
9
Ser Slew
1
Ser Delay Adj
18
Phase
19
TTL/CCD
[S1]
5
7
Phase
8
4
TRGIN
6
TSR
11
PLL1
Slew
14
SRG1OUT
PLL2,3
TTL/CCD
[S2]
15
TTL/CCD
[S3]
16
TTL/CCD
[T]
13
SRG2OUT
SRG3OUT
TRGOUT
† This symbol is in accordance with ANSI/IEEE Std 91-1984.
Terminal Functions
TERMINAL
I/O
NAME
NO.
DLADJ
1
GND
2
2,3PC1‡
2,3PC2‡
7
I
8
I
1PC1‡
1PC2‡
18
I
19
I
I
DESCRIPTION
Delay adjust for all serial-register gates
Ground
Phase adjust control for SRG2OUT
Phase-adjust
SRG2OUT, SRG3OUT
Phase adjust control for SRG1OUT
Phase-adjust
PD
3
I
Power down
SRG1IN
5
I
Serial-register gate 2 and 3 in
SRG2,3IN
4
I
Serial-register gate 1 in
SRG1OUT
14
O
Serial-register gate 1 out
SRG2OUT
15
O
Serial-register gate 2 out
SRG3OUT
16
O
Serial-register gate 3 out
SSR
9
I
Serial-register gate out slew-rate adjust
TRGIN
6
I
Transfer gate in
TRGOUT
13
O
Transfer gate out
TSR
VCC§
11
I
Transfer gate out slew-rate adjust
12
I
VCC§
VSS§
17
I
10
I
VSS§
20
I
Positive supply voltage
Negative supply voltage
‡ A 270-pF capacitor should be connected between terminals 7 and 8 and between
terminals 18 and 19.
§ All terminals of the same name should be connected together externally.
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3
TMS3472A
SERIAL DRIVER
SOCS025B – FEBRUARY 1991
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Positive supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 V
Negative supply voltage, VSS (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –11.1 V
Continuous total power dissipation at (or below), TA ≤ 25°C:
Unmounted device (see Figure 1) . . . . . . . . . . . . . . 825 mW
Mounted device (see Figure 1) . . . . . . . . . . . . . . . . 1150 mW
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 20°C to 45°C
Storage temperature range, TSTG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to GND.
2. The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for
voltage levels only.
POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
1500
1400
Mounted Device
(see Note A)
PD – Power Dissipation – mW
1300
1200
1100
1000
900
800
700
600
500
400
300
Unmounted Device
200
100
0
0
10
20
30
40
50
60
70
TA – Free-Air Temperature – °C
Figure 1
NOTE A: The mounted-device derating curve of Figure 1 is obtained under the following conditions:
The board is 50 mm by 50 mm by 1.6 mm thick.
The board material is glass epoxy.
The copper thickness of all the etch runs is 35 microns.
Etch run dimensions – All 20 etch runs are 0.4 mm by 22 mm.
Each chip is soldered to the board.
An aluminum cooling fin 10 mm by 10 mm by 1 mm thick is coupled to the chip with thermal paste.
4
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TMS3472A
SERIAL DRIVER
SOCS025B – FEBRUARY 1991
recommended operating conditions
MIN
NOM
MAX
0
1
2.2
V
–11.1
– 10.4
– 9.7
V
2
5
2.5
5
Positive supply voltage, VCC†
Negative supply voltage, VSS (see Note 2)†
High level input voltage,
High-level
voltage VIH
Low level input voltage,
Low-level
voltage VIL
DLADJ, SRG1IN, SRG2,3IN, TRGIN
PD
V
DLADJ, SRG1IN, SRG2,3IN, TRGIN
0
0.8
PD
0
0.9
Slope-bias resistance
UNIT
10
50
V
kΩ
Operating free-air temperature, TA
– 20
45
°C
† VCC and VSS have 100-mA current limits. Adequate decoupling capacitors are required from these pins to ground.
NOTE 2: The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for voltage
levels only.
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)‡
PARAMETER
VOH
High-level output voltage
VOL
Low-level output voltage
IIH
IIL
High-level input current
ISS
Low-level input current
Supply current
TEST CONDITIONS
IOH (serial) = 48 mA (peak),
IOH (transfer) = 67 mA (peak)
IOL (serial) = 48 mA (peak),
IOL (transfer) = 32 mA (peak)
VIH = 5 V
VIL = 0
No load, PD at 0 V
Average load
MIN
TYP
MAX
UNIT
VCC– 0.5
VCC
VCC+ 0.5
V
VSS– 0.6
VSS
VSS+ 0.8
V
50
µA
± 10
µA
– 0.85
– 55
mA
‡ These parameters are measured with TA = 25°C, VSS = –10.3 V, VCC = 2.1 V, slope-bias resistance on SSR and TSR = 22 kΩ, frequency of
SRG1OUT, SRG2OUT, and SRG3OUT = 4.8 MHz, and frequency of TRGOUT = 2.1 MHz. The load is a TC241 monochrome CCD image sensor.
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5
TMS3472A
SERIAL DRIVER
SOCS025B – FEBRUARY 1991
switching characteristics for SRG1OUT, SRG2OUT, and SRG3OUT
PARAMETER
TEST CONDITIONS
MIN
Jitter
td1
td2
15
See Figure 2
td3
tw(H) Pulse duration, high
tw(L)
See Note 3
Pulse duration, low
MAX
UNIT
2
ns
30
ns
37
ns
82
ns
35
ns
65
ns
Slew rate
400
V/µs
Noise amplitude
300
mV
NOTE 3: These parameters are measured with TA = 25°C, VSS = –10.3 V, VCC = 2.1 V, slope-bias resistance on SSR = 22 kΩ, and frequency
of SRG1OUT, SRG2OUT, and SRG3OUT = 4.8 MHz. The load is a TC241 monochrome CCD image sensor.
switching characteristics for TRGOUT
PARAMETER
tr
tf
Rise time
Fall time
TEST CONDITIONS
See Note 4
MIN
MAX
UNIT
135
185
ns
50
100
ns
NOTE 4: These parameters are measured with TA = 25°C, VSS = –10.3 V, VCC = 2.1 V, slope-bias resistance on TSR = 22 kΩ, and frequency
of TRGOUT = 2.1 MHz. The load is a TC241 monochrome CCD image sensor.
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TMS3472A
SERIAL DRIVER
SOCS025B – FEBRUARY 1991
PARAMETER MEASUREMENT INFORMATION
SRG1IN or
SRG2,3IN
50%
50%
105 ns
td1
td2
td3
SRG1OUT,
SRG2OUT,
or SRG3OUT
VCC – 0.5 V
VSS + 1.2 V
tw(H)
tw(L)
VSS + 0.8 V
Noise
300 mV max
Figure 2. Serial-Register-Gate Timing Diagram
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7
TMS3472A
SERIAL DRIVER
SOCS025B – FEBRUARY 1991
MECHANICAL DATA
DW/R-PDSO-G**
PLASTIC WIDE-BODY SMALL-OUTLINE PACKAGE
20 PIN SHOWN
A
20
11
PINS**
16
20
24
28
A MIN
0.400
(10,16)
0.500
(12,70)
0.600
(15,24)
0.700
(17,78)
A MAX
0.410
(10,41)
0.510
(12,95)
0.610
(15,49)
0.710
(18,03)
DIM
0.419 (10,65)
0.400 (10,15)
0.299 (7,59)
0.293 (7,45)
10
1
0.104 (2,65)
0.093 (2,35)
0.012 (0,30)
0.004 (0,10)
0.364 (9,24)
0.338 (8,58)
Seating Plane
0.004 (0,10)
0.020 (0,51)
0.014 (0,35)
0°– 8°
0.012 (0,30)
0.009 (0,23)
0.050 (1,27)
0.016 (0,40)
0.010 (0,25) M
0.050 (1,27)
4040000/A–10/93
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
8
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Copyright  1998, Texas Instruments Incorporated