XTR XTR XTR115 XTR116 116 115 SBOS124A – JANUARY 2000 – REVISED NOVEMBER 2003 4-20mA CURRENT LOOP TRANSMITTERS FEATURES APPLICATIONS ● LOW QUIESCENT CURRENT: 200µA ● 5V REGULATOR FOR EXTERNAL CIRCUITS ● VREF FOR SENSOR EXCITATION: XTR115: 2.5V XTR116: 4.096V ● LOW SPAN ERROR: 0.05% ● LOW NONLINEARITY ERROR: 0.003% ● WIDE LOOP SUPPLY RANGE: 7.5V to 36V ● SO-8 PACKAGE ● 2-WIRE, 4-20mA CURRENT LOOP TRANSMITTER ● SMART TRANSMITTER ● INDUSTRIAL PROCESS CONTROL ● TEST SYSTEMS ● COMPATIBLE WITH HART MODEM ● CURRENT AMPLIFIER ● VOLTAGE-TO-CURRENT AMPLIFIER DESCRIPTION used for offsetting or to excite transducers. A current return pin (IRET) senses any current used in external circuitry to assure an accurate control of the output current. The XTR115 is a fundamental building block of smart sensors using 4-to-20mA current transmission. The XTR115 and XTR116 are specified for operation over the extended industrial temperature range, –40°C to +85°C. The XTR115 and XTR116 are precision current output converters designed to transmit analog 4-to-20mA signals over an industry standard current loop. They provide accurate current scaling and output current limit functions. The on-chip voltage regulator (5V) can be used to power external circuitry. A precision on-chip VREF (2.5V for XTR115 and 4.096V for XTR116) can be XTR115 XTR116 VREG +5V +5V Regulator 8 VREF XTR115: 2.5V XTR116: 4.096V V+ 7 Voltage Reference 1 VLOOP RIN B 6 IIN 2 RL A1 + E 5 VIN – RLIM 3 IRET R1 2.475kΩ R2 25Ω IO = 100 VIN RIN 4 I = 100 • IIN Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright © 2000-2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com SPECIFICATIONS At TA = +25°C, V+ = 24V, RIN = 20kΩ, and TIP29C external transistor, unless otherwise noted. XTR115U XTR116U PARAMETER OUTPUT Output Current Equation Output Current, Linear Range Over-Scale Limit Under-Scale Limit SPAN Span (Current Gain) Error (1) vs Temperature Nonlinearity INPUT Offset Voltage (Op Amp) vs Temperature vs Supply Voltage, V+ Bias Current vs Temperature Noise: 0.1Hz to 10Hz CONDITIONS IO ILIM IMIN VOS IREG = 0, IREF = 0 32 0.2 IIN = 250µA to 25mA TA = –40°C to +85°C IIN = 250µA to 25mA 100 ±0.05 ±3 ±0.003 MIN 25 ✻ TYP MAX UNITS ✻ ✻ 0.25 ✻ ✻ ✻ mA mA mA ±0.2 ±20 ±0.01 ✻ ✻ ✻ ✻ ±0.4 ✻ ±0.02 A/A % ppm/°C % IIN = 40µA TA = –40°C to +85°C V+ = 7.5V to 36V ±100 ±0.7 ±0.1 –35 150 0.6 CLOOP = 0, RL = 0 380 3.2 ✻ ✻ kHz mA/µs 2.5 4.096 ±0.05 ±20 ±1 ±100 10 16 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ V V % ppm/°C ppm/V ppm/mA µVp-p mA IB en IREF = 0 TA = –40°C to +85°C V+ = 7.5V to 36V IREF = 0mA to 2.5mA VREG(2) Voltage Voltage Accuracy vs Temperature vs Supply Voltage, V+ vs Output Current Short-Circuit Current MAX IO = IIN • 100 S VREF(2) XTR115 XTR116 Voltage Accuracy vs Temperature vs Supply Voltage, V+ vs Load Noise: 0.1Hz to 10Hz Short-Circuit Current TEMPERATURE RANGE Specification Operating Storage Thermal Resistance TYP 0.25 DYNAMIC RESPONSE Small Signal Bandwidth Slew Rate POWER SUPPLY Specified Voltage Range Quiescent Current Over Temperature, –40°C to +85°C MIN XTR115UA XTR116UA IREG = 0 TA = –40°C to +85°C V+ = 7.5V to 36V ±250 ±3 ±2 ✻ ✻ ✻ ✻ ✻ ✻ ±0.25 ±35 ±10 ✻ ✻ ✻ ✻ 5 ±0.05 ±0.1 ±0.1 1 See Typical Curves 12 ±500 ±6 ✻ ±0.5 ±75 ✻ ✻ µV µV/°C µV/V nA pA/°C µVp-p V V mV/°C mV/V ✻ mA V+ ✻ +24 +7.5 200 240 –40 –55 –55 θJA 150 +36 250 300 ✻ +85 +125 +125 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ V V µA µA ✻ ✻ ✻ °C °C °C °C/W ✻ Specifications the same as XTR115U and XTR116U. NOTES: (1) Does not include initial error or TCR of RIN. (2) Voltage measured with respect to IRET pin. 2 XTR115, XTR116 www.ti.com SBOS124A ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION Top View SO-8 VREF 1 8 VREG IIN 2 7 V+ IRET 3 6 B (Base) IO 4 5 E (Emitter) Power Supply, V+ (referenced to IO pin) .......................................... 40V Input Voltage (referenced to IRET pin) ........................................ 0V to V+ Output Current Limit ............................................................... Continuous VREG, Short-Circuit .................................................................. Continuous VREF, Short-Circuit .................................................................. Continuous Operating Temperature ................................................ –55°C to +125°C Storage Temperature Range ....................................... –55°C to +125°C Lead Temperature (soldering, 10s) .............................................. +300°C Junction Temperature ................................................................... +165°C NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. ELECTROSTATIC DISCHARGE SENSITIVITY PACKAGE/ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. XTR115, XTR116 SBOS124A www.ti.com 3 TYPICAL PERFORMANCE CURVES At TA = +25°C, V+ = 24V, RIN = 20kΩ, and TIP29C external transistor, unless otherwise noted. CURRENT GAIN vs FREQUENCY QUIESCENT CURRENT vs TEMPERATURE 260 Quiescent Current (µA) Gain (dB) 40 COUT = 0 RL = 0Ω 30 COUT = 10nF RL = 250Ω 20 10 240 (V+) = 36V 220 (V+) = 24V 200 (V+) = 7.5V 180 160 10k 1M 100k –75 –50 –25 Frequency (Hz) 0 25 50 75 100 125 Temperature (°C) REFERENCE VOLTAGE vs TEMPERATURE OVER-SCALE CURRENT vs TEMPERATURE 0.1 34 Over-Scale Current (mA) ∆ Reference Voltage (%) With External Transistor 0 –0.1 –0.2 33 32 V+ = 36V 31 V+ = 7.5V 30 V+ = 24V 29 –0.3 28 –75 –50 –25 0 25 50 75 100 125 –75 Temperature (°C) –50 –25 0 25 50 75 100 125 Temperature (°C) VREG VOLTAGE vs VREG CURRENT 5.5 +125°C VREG Voltage (V) –55°C +25°C –55°C 5.0 +25°C Sinking Current Sourcing Current +125°C 4.5 –1 0 1 2 3 4 IREG Current (mA) 4 XTR115, XTR116 www.ti.com SBOS124A APPLICATIONS INFORMATION The XTR115 and XTR116 are identical devices except for the reference voltage output, pin 1. This voltage is available for external circuitry and is not used internally. Further discussions that apply to both devices will refer to the “XTR115/6.” Figure 1 shows basic circuit connections with representative simplified input circuitry. The XTR115/6 is a two-wire current transmitter. Its input signal (pin 2) controls the output current. A portion of this current flows into the V+ power supply, pin 7. The remaining current flows in Q1. External input circuitry connected to the XTR115/6 can be powered from VREG or VREF. Current drawn from these terminals must be returned to IRET, pin 3. This IRET pin is a “local ground” for input circuitry driving the XTR115/6. The XTR115/6 is a current-input device with a gain of 100. A current flowing into pin 2 produces IO = 100 • IIN. The input voltage at the IIN pin is zero (referred to the IRET pin). A voltage input is created with an external input resistor, as shown. Common full-scale input voltages range from 1V and upward. Full-scale inputs greater than 0.5V are recommend to minimize the effect of offset voltage and drift of A1. EXTERNAL TRANSISTOR The external transistor, Q1, conducts the majority of the fullscale output current. Power dissipation in this transistor can approach 0.8W with high loop voltage (40V) and 20mA output current. The XTR115/6 is designed to use an external transistor to avoid on-chip thermal-induced errors. Heat produced by Q1 will still cause ambient temperature changes that can affect the XTR115/6. To minimize these effects, locate Q1 away from sensitive analog circuitry, including XTR115/6. Mount Q1 so that heat is conducted to the outside of the transducer housing. The XTR115/6 is designed to use virtually any NPN transistor with sufficient voltage, current and power rating. Case style and thermal mounting considerations often influence the choice for any given application. Several possible choices are listed in Figure 1. A MOSFET transistor will not improve the accuracy of the XTR115/6 and is not recommended. XTR115 XTR116 IREG 5V XTR115: 2.5V XTR116: 4.096V IO VREG +5V Regulator 8 IREF VREF(1) V+ 7 Voltage Reference 1 VLOOP Input Circuitry VIN RIN 20kΩ IIN B IIN 6 2 Q1 10nF RL A1 E 5 RLIM 3 All return current from IREG and IREF IRET R1 2.475kΩ R2 25Ω IO 4 I = 100 • IIN For IO = 4mA to 20mA IIN = 40µA to 200µA With RIN = 20kΩ VIN = 0.8V to 4V NOTE: (1) See also Figure 5. Possible choices for Q1 (see text). TYPE PACKAGE 2N4922 TIP29C TIP31B TO-225 TO-220 TO-220 FIGURE 1. Basic Circuit Connections. XTR115, XTR116 SBOS124A www.ti.com 5 MINIMUM-SCALE CURRENT The quiescent current of the XTR115/6 (typically 200µA) is the lower limit of its output current. Zero input current (IIN = 0) will produce an IO equal to the quiescent current. Output current will not begin to increase until IIN > IQ /100. Current drawn from VREF or VREG will add to this minimum output current. This means that more than 3.7mA is available to power external circuitry while still allowing the output current to go below 4mA. OFFSETTING THE INPUT A low scale of 4mA is produced by creating a 40µA input current. This can be created with the proper value resistor from VREF (Figure 2), or by generating offset in the input drive circuitry. MAXIMUM OUTPUT CURRENT The XTR115/6 provides accurate, linear output up to 25mA. Internal circuitry limits the output current to approximately 32mA to protect the transmitter and loop power/measurement circuitry. It is possible to extend the output current range of the XTR115/6 by connecting an external resistor from pin 3 to pin 5, to change the current limit value. Since all output current must flow through internal resistors, it is possible to damage with excessive current. Output currents greater than 45mA may cause permanent damage. VREG XTR115 XTR116 VREF RIN VO D/A XTR115 VREG VREG VREF Voltage Reference 40µA XTR115 XTR116 VREF R0 62.5kΩ Digital Control IIN IO D/A ≈ 2.5V Optical Isolation IIN IRET A1 0 to 160µA IRET R1 2.475kΩ Digital Control ≈ 5V µC PWM Out VREG Filter XTR115 XTR116 RIN Optical Isolation IRET FIGURE 2. Creating Low-Scale Offset. 6 FIGURE 3. Digital Control Methods. XTR115, XTR116 www.ti.com SBOS124A REVERSE-VOLTAGE PROTECTION The XTR115/6 low compliance voltage rating (7.5V) permits the use of various voltage protection methods without compromising operating range. Figure 4 shows a diode bridge circuit which allows normal operation even when the voltage connection lines are reversed. The bridge causes a two diode drop (approximately 1.4V) loss in loop supply voltage. This results in a compliance voltage of approximately 9V—satisfactory for most applications. A diode can be inserted in series with the loop supply voltage and the V+ pin to protect against reverse output connection lines with only a 0.7V loss in loop supply voltage. OVER-VOLTAGE SURGE PROTECTION Remote connections to current transmitters can sometimes be subjected to voltage surges. It is prudent to limit the maximum surge voltage applied to the XTR115/6 to as low as practical. Various zener diode and surge clamping diodes are specially designed for this purpose. Select a clamp diode with as low a voltage rating as possible for best protection. For example, a 36V protection diode will assure proper transmitter operation at normal loop voltages, yet will provide an appropriate level of protection against voltage surges. Characterization tests on several production lots showed no damage with loop supply voltages up to 65V. 8 V+ VREG 1 RIN 2 RADIO FREQUENCY INTERFERENCE The long wire lengths of current loops invite radio frequency interference. RF can be rectified by the input circuitry of the XTR115/6 or preceding circuitry. This generally appears as an unstable output current that varies with the position of loop supply or input wiring. Interference may also enter at the input terminals. For integrated transmitter assemblies with short connection to the sensor, the interference more likely comes from the current loop connections. Maximum VPS must be less than minimum voltage rating of zener diode. 7 VREF IIN VIN XTR115 XTR116 B E 3 Most surge protection zener diodes have a diode characteristic in the forward direction that will conduct excessive current, possibly damaging receiving-side circuitry if the loop connections are reversed. If a surge protection diode is used, a series diode or diode bridge should be used for protection against reversed connections. IRET IO 6 Q1 0.01µF D1(1) 1N4148 Diodes RL 5 VPS The diode bridge causes a 1.4V loss in loop supply voltage. 4 NOTE: (1) Zener Diode 36V: 1N4753A or Motorola P6KE39A. Use lower voltage zener diodes with loop power supply voltages less than 30V for increased protection. See “Over-Voltage Surge Protection.” FIGURE 4. Reverse Voltage Operation and Over-Voltage Surge Protection. XTR115, XTR116 SBOS124A www.ti.com 7 If capacitive loading must be placed on the VREF pin, one of the compensation schemes shown below must be used to ensure stable operation. Values of capacitance must remain within the given ranges. RISO(1) 10Ω ILOAD (0-2.5mA) + CHF (10pF to 0.5µF) XTR115 XTR116 IO VREG +5V Regulator 8 CLF (2.2µF to 22µF) VREF V+ 7 Voltage Reference 1 VLOOP OR B IIN 6 2 + ILOAD (0-2.5mA) CHF (10pF to 0.5µF) CLF(1) (2.2µF to 22µF) E 5 RLIM 3 IRET RCOMP(1) 50Ω RL A1 R1 2.475kΩ R2 25Ω IO = 100 VIN RIN 4 I = 100 • IIN NOTE: (1) Required compensation components. FIGURE 5. Stable Operation with Capacitive Load on VREF. 8 XTR115, XTR116 www.ti.com SBOS124A PACKAGE OPTION ADDENDUM www.ti.com 24-Jan-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) XTR115U ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 115U XTR115U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 115U XTR115U/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 115U XTR115UA ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 115U A XTR115UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 115U A XTR115UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 115U A XTR115UAE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 115U A XTR115UG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 115U XTR116U ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 116U XTR116U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 116U XTR116U/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 116U XTR116UA ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 116U A XTR116UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 116U A XTR116UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 116U A Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 24-Jan-2013 Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) XTR116UAE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 116U A XTR116UG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR XTR 116U (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Only one of markings shown within the brackets will appear on the physical device. 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