SN74LV4051A-Q1 SCLS520D – AUGUST 2003 – REVISED JUNE 2011 www.ti.com 8-CHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER Check for Samples: SN74LV4051A-Q1 FEATURES 1 • • • • • • • • Qualified for Automotive Applications 2-V to 5.5-V VCC Operation Supports Mixed-Mode Voltage Operation on All Ports High On-Off Output-Voltage Ratio Low Crosstalk Between Switches Individual Switch Controls Extremely Low Input Current Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II DESCRIPTION This 8-channel CMOS analog multiplexer/demultiplexer is designed for 2-V to 5.5-V VCC operation. The SN74LV4051A handles both analog and digital signals. Each channel permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction. Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. ORDERING INFORMATION (1) PACKAGE (2) TA –40°C to 105°C –40°C to 125°C (1) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING SOIC − D Tape and reel SN74LV4051ATDRQ1 L4051AQ SOIC − DW Tape and reel SN74LV4051ATDWRQ1 L4051AQ TSSOP – PW Tape and reel SN74LV4051ATPWRQ1 L4051AQ TSSOP – PW Tape and reel SN74LV4051AQPWRQ1 4051AQ1 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. FUNCTION TABLE INPUTS A ON CHANNEL L L Y0 L H Y1 H L Y2 H H Y3 L L Y4 H L H Y5 H H L Y6 L H H H Y7 H X X X None INH C B L L L L L L L L L H L L 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2011, Texas Instruments Incorporated SN74LV4051A-Q1 SCLS520D – AUGUST 2003 – REVISED JUNE 2011 www.ti.com LOGIC DIAGRAM (POSITIVE LOGIC) 2 Copyright © 2003–2011, Texas Instruments Incorporated SN74LV4051A-Q1 SCLS520D – AUGUST 2003 – REVISED JUNE 2011 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VCC –0.5 V to 7 V Supply voltage range (2) –0.5 V to 7 V VI Input voltage range VIO Switch I/O voltage range (2) IIK Input clamp current VI < 0 –20 mA IIOK I/O diode current VIO < 0 –50 mA IT Switch through current VIO = 0 to VCC ±25 mA (3) –0.5 V to VCC + 0.5 V ±50 mA Continuous current through VCC or GND D package θJA Package thermal impedance, junction to free air Tstg (1) (2) (3) (4) (4) 95°C/W DW package 75°C/W PW package 108°C/W –65°C to 150°C Storage temperature range Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. This value is limited to 5.5 V maximum. The package thermal impedance is calculated in accordance with JESD 51-7. RECOMMENDED OPERATING CONDITIONS (1) VCC Supply voltage VCC = 2 V VIH High-level input voltage MIN MAX 2 (2) 5.5 Low-level input voltage V 1.5 VCC = 2.3 V to 2.7 V VCC × 0.7 VCC = 3 V to 3.6 V VCC × 0.7 VCC = 4.5 V to 5.5 V VCC × 0.7 VCC = 2 V VIL UNIT V 0.5 VCC = 2.3 V to 2.7 V VCC × 0.3 VCC = 3 V to 3.6 V VCC × 0.3 VCC = 4.5 V to 5.5 V VCC × 0.3 V VI Control input voltage 0 5.5 V VIO Input/output voltage 0 VCC V Δt/Δv Input transition rise or fall rate VCC = 2.3 V to 2.7 V 200 VCC = 3 V to 3.6 V 100 VCC = 4.5 V to 5.5 V TA Operating free-air temperature TA Operating free-air temperature (1) (2) SN74LV4051ATDRQ1,SN74LV4051ATDWRQ1 SN74LV4051ATPWRQ1 SN74LV4051AQPWRQ1 ns/V 20 –40 105 –40 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. With supply voltages at or near 2 V, the analog switch on-state resistance becomes very nonlinear. It is recommended that only digital signals be transmitted at these low supply voltages. Copyright © 2003–2011, Texas Instruments Incorporated 3 SN74LV4051A-Q1 SCLS520D – AUGUST 2003 – REVISED JUNE 2011 www.ti.com ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN ron ron(p) On-state switch resistance Peak on-state resistance IT = 2 mA, VI = VCC or GND, VINH = VIL (see Figure 1) IT = 2 mA, VI = VCC or GND, VINH = VIL Δron Difference in on-state resistance between switch IT = 2 mA, VI = VCC or GND, VINH = VIL II Control input current VI = 5.5 V or GND IS(off) TA = -40 to 105°C TA = 25°C TYP MAX MIN TA = -40 to 125°C MAX MIN UNIT MAX 2.3 V 38 180 225 225 3V 30 150 190 190 4.5 V 22 75 100 100 2.3 V 113 500 600 600 3V 54 180 225 225 4.5 V 31 100 125 125 2.3 V 2.1 30 40 40 3V 1.4 20 30 30 4.5 V 1.3 Ω Ω Ω 15 20 20 0 V to 5.5 V ±0.1 ±1 ±2 μA Off-state switch leakage current VI = VCC and VO = GND, or VI = GND and VO = VCC, VINH = VIH (see Figure 2) 5.5 V ±0.1 ±1 ±2 μA IS(on) On-state switch leakage current VI = VCC or GND, VINH = VIL (see Figure 3) 5.5 V ±0.1 ±1 ±2 μA ICC Supply current VI = VCC or GND 5.5 V 20 40 μA CIC Control input capacitance f = 10 MHz 3.3 V 2 pF CIS Common terminal capacitance 3.3 V 23.4 pF COS Switch terminal capacitance 3.3 V 5.7 pF CF Feedthrough capacitance 0.5 pF 4 Copyright © 2003–2011, Texas Instruments Incorporated SN74LV4051A-Q1 SCLS520D – AUGUST 2003 – REVISED JUNE 2011 www.ti.com SWITCHING CHARACTERISTICS VCC = 3.3 V ± 0.3 V, over recommended operating free-air temperature range (unless otherwise noted) tPLH tPHL tPZH tPZL tPHZ tPLZ TA = -40 to 105°C TA = 25°C TA = -40 to 125°C FROM (INPUT) TO (OUTPUT) TEST CONDITIONS Propagation delay time COM or Yn Yn or COM CL = 50 pF (see Figure 4) 2.5 9 12 14 ns Enable delay time INH COM or Yn CL = 50 pF (see Figure 5) 5.5 20 25 25 ns Disable delay time INH COM or Yn CL = 50 pF (see Figure 5) 8.8 20 25 25 ns PARAMETER MIN TYP MAX MIN MAX MIN UNIT MAX SWITCHING CHARACTERISTICS VCC = 5 V ± 0.5 V, over recommended operating free-air temperature range (unless otherwise noted) tPLH tPHL tPZH tPZL tPHZ tPLZ TA = -40 to 105°C TA = 25°C TA = -40 to 125°C FROM (INPUT) TO (OUTPUT) TEST CONDITIONS Propagation delay time COM or Yn Yn or COM CL = 50 pF (see Figure 4) 1.5 6 8 10 ns Enable delay time INH COM or Yn CL = 50 pF (see Figure 5) 4 14 18 18 ns Disable delay time INH COM or Yn CL = 50 pF (see Figure 5) 6.2 14 18 18 ns PARAMETER MIN TYP MAX MIN MAX MIN UNIT MAX ANALOG SWITCH CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER Frequency response (switch on) Crosstalk (control input to signal output) Feedthrough attenuation (switch off) Sine-wave distortion (1) (2) FROM (INPUT) TO (OUTPUT) COM or Yn Yn or COM INH COM or Yn COM or Yn COM or Yn Yn or COM Yn or COM TEST CONDITIONS VCC TA = 25°C MIN TYP CL = 50 pF, RL = 600 Ω, fin = 1 MHz (sine wave) (1) (see Figure 6) 2.3 V 20 3V 25 4.5 V 35 CL = 50 pF, RL = 600 Ω, fin = 1 MHz (square wave) (seeFigure 7 ) 2.3 V 20 3V 35 4.5 V 60 CL = 50 pF, RL = 600 Ω, fin = 1 MHz (2) (see Figure 8) 2.3 V –45 3V –45 4.5 V –45 2.3 V 0.1 3V 0.1 4.5 V 0.1 CL = 50 pF, RL = 10 kΩ, fin = 1 kkHz (sine wave) (see Figure 9) VI = 2 Vp-p VI = 2.5 Vp-p VI = 4 Vp-p MAX UNIT MHz mV dB % Adjust fin voltage to obtain 0-dBm output. Increase fin frequency until dB meter reads −3 dB. Adjust fin voltage to obtain 0-dBm input. OPERATING CHARACTERISTICS VCC = 3.3 V, TA = 25°C (unless otherwise noted) PARAMETER Cpd Power dissipation capacitance Copyright © 2003–2011, Texas Instruments Incorporated TEST CONDITIONS CL = 50 pF, f = 10 MHz TYP UNIT 5.9 pF 5 SN74LV4051A-Q1 SCLS520D – AUGUST 2003 – REVISED JUNE 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION = x W – Figure 1. On-State Resistance Test Circuit Figure 2. Off-State Switch Leakage-Current Test Circuit Figure 3. On-State Switch Leakage-Current Test Circuit W Figure 4. Propagation Delay Time, Signal Input to Signal Output 6 Copyright © 2003–2011, Texas Instruments Incorporated SN74LV4051A-Q1 SCLS520D – AUGUST 2003 – REVISED JUNE 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) W W ≈ ≈ ≈ – ≈ Figure 5. Switching Time (tPZL, tPLZ, tPZH, tPHZ), Control to Signal Output m W Figure 6. Frequency Response (Switch On) Copyright © 2003–2011, Texas Instruments Incorporated 7 SN74LV4051A-Q1 SCLS520D – AUGUST 2003 – REVISED JUNE 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) W W Figure 7. Crosstalk (Control Input, Switch Output) m W W Figure 8. Feedthrough Attenuation (Switch Off) m m W Figure 9. Sine-Wave Distortion 8 Copyright © 2003–2011, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 24-Jan-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) CLV4051ATDWRG4Q1 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 L4051AQ CLV4051ATPWRG4Q1 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 L4051AQ SN74LV4051AQPWRQ1 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 4051AQ1 SN74LV4051ATDRQ1 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 L4051AQ SN74LV4051ATDWRQ1 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 L4051AQ SN74LV4051ATPWRQ1 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 L4051AQ (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Only one of markings shown within the brackets will appear on the physical device. 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OTHER QUALIFIED VERSIONS OF SN74LV4051A-Q1 : • Catalog: SN74LV4051A • Enhanced Product: SN74LV4051A-EP NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant CLV4051ATPWRG4Q1 TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LV4051AQPWRQ1 TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LV4051ATPWRQ1 TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CLV4051ATPWRG4Q1 TSSOP PW 16 2000 367.0 367.0 35.0 SN74LV4051AQPWRQ1 TSSOP PW 16 2000 367.0 367.0 35.0 SN74LV4051ATPWRQ1 TSSOP PW 16 2000 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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